Tue, 02 Sep 2014 12:48:45 -0700
8055494: Add C2 x86 intrinsic for BigInteger::multiplyToLen() method
Summary: Add new C2 intrinsic for BigInteger::multiplyToLen() on x86 in 64-bit VM.
Reviewed-by: roland
1 /*
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3 * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
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5 * This code is free software; you can redistribute it and/or modify it
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23 */
25 #include "precompiled.hpp"
26 #include "memory/allocation.inline.hpp"
27 #include "opto/addnode.hpp"
28 #include "opto/connode.hpp"
29 #include "opto/memnode.hpp"
30 #include "opto/mulnode.hpp"
31 #include "opto/phaseX.hpp"
32 #include "opto/subnode.hpp"
34 // Portions of code courtesy of Clifford Click
37 //=============================================================================
38 //------------------------------hash-------------------------------------------
39 // Hash function over MulNodes. Needs to be commutative; i.e., I swap
40 // (commute) inputs to MulNodes willy-nilly so the hash function must return
41 // the same value in the presence of edge swapping.
42 uint MulNode::hash() const {
43 return (uintptr_t)in(1) + (uintptr_t)in(2) + Opcode();
44 }
46 //------------------------------Identity---------------------------------------
47 // Multiplying a one preserves the other argument
48 Node *MulNode::Identity( PhaseTransform *phase ) {
49 register const Type *one = mul_id(); // The multiplicative identity
50 if( phase->type( in(1) )->higher_equal( one ) ) return in(2);
51 if( phase->type( in(2) )->higher_equal( one ) ) return in(1);
53 return this;
54 }
56 //------------------------------Ideal------------------------------------------
57 // We also canonicalize the Node, moving constants to the right input,
58 // and flatten expressions (so that 1+x+2 becomes x+3).
59 Node *MulNode::Ideal(PhaseGVN *phase, bool can_reshape) {
60 const Type *t1 = phase->type( in(1) );
61 const Type *t2 = phase->type( in(2) );
62 Node *progress = NULL; // Progress flag
63 // We are OK if right is a constant, or right is a load and
64 // left is a non-constant.
65 if( !(t2->singleton() ||
66 (in(2)->is_Load() && !(t1->singleton() || in(1)->is_Load())) ) ) {
67 if( t1->singleton() || // Left input is a constant?
68 // Otherwise, sort inputs (commutativity) to help value numbering.
69 (in(1)->_idx > in(2)->_idx) ) {
70 swap_edges(1, 2);
71 const Type *t = t1;
72 t1 = t2;
73 t2 = t;
74 progress = this; // Made progress
75 }
76 }
78 // If the right input is a constant, and the left input is a product of a
79 // constant, flatten the expression tree.
80 uint op = Opcode();
81 if( t2->singleton() && // Right input is a constant?
82 op != Op_MulF && // Float & double cannot reassociate
83 op != Op_MulD ) {
84 if( t2 == Type::TOP ) return NULL;
85 Node *mul1 = in(1);
86 #ifdef ASSERT
87 // Check for dead loop
88 int op1 = mul1->Opcode();
89 if( phase->eqv( mul1, this ) || phase->eqv( in(2), this ) ||
90 ( op1 == mul_opcode() || op1 == add_opcode() ) &&
91 ( phase->eqv( mul1->in(1), this ) || phase->eqv( mul1->in(2), this ) ||
92 phase->eqv( mul1->in(1), mul1 ) || phase->eqv( mul1->in(2), mul1 ) ) )
93 assert(false, "dead loop in MulNode::Ideal");
94 #endif
96 if( mul1->Opcode() == mul_opcode() ) { // Left input is a multiply?
97 // Mul of a constant?
98 const Type *t12 = phase->type( mul1->in(2) );
99 if( t12->singleton() && t12 != Type::TOP) { // Left input is an add of a constant?
100 // Compute new constant; check for overflow
101 const Type *tcon01 = ((MulNode*)mul1)->mul_ring(t2,t12);
102 if( tcon01->singleton() ) {
103 // The Mul of the flattened expression
104 set_req(1, mul1->in(1));
105 set_req(2, phase->makecon( tcon01 ));
106 t2 = tcon01;
107 progress = this; // Made progress
108 }
109 }
110 }
111 // If the right input is a constant, and the left input is an add of a
112 // constant, flatten the tree: (X+con1)*con0 ==> X*con0 + con1*con0
113 const Node *add1 = in(1);
114 if( add1->Opcode() == add_opcode() ) { // Left input is an add?
115 // Add of a constant?
116 const Type *t12 = phase->type( add1->in(2) );
117 if( t12->singleton() && t12 != Type::TOP ) { // Left input is an add of a constant?
118 assert( add1->in(1) != add1, "dead loop in MulNode::Ideal" );
119 // Compute new constant; check for overflow
120 const Type *tcon01 = mul_ring(t2,t12);
121 if( tcon01->singleton() ) {
123 // Convert (X+con1)*con0 into X*con0
124 Node *mul = clone(); // mul = ()*con0
125 mul->set_req(1,add1->in(1)); // mul = X*con0
126 mul = phase->transform(mul);
128 Node *add2 = add1->clone();
129 add2->set_req(1, mul); // X*con0 + con0*con1
130 add2->set_req(2, phase->makecon(tcon01) );
131 progress = add2;
132 }
133 }
134 } // End of is left input an add
135 } // End of is right input a Mul
137 return progress;
138 }
140 //------------------------------Value-----------------------------------------
141 const Type *MulNode::Value( PhaseTransform *phase ) const {
142 const Type *t1 = phase->type( in(1) );
143 const Type *t2 = phase->type( in(2) );
144 // Either input is TOP ==> the result is TOP
145 if( t1 == Type::TOP ) return Type::TOP;
146 if( t2 == Type::TOP ) return Type::TOP;
148 // Either input is ZERO ==> the result is ZERO.
149 // Not valid for floats or doubles since +0.0 * -0.0 --> +0.0
150 int op = Opcode();
151 if( op == Op_MulI || op == Op_AndI || op == Op_MulL || op == Op_AndL ) {
152 const Type *zero = add_id(); // The multiplicative zero
153 if( t1->higher_equal( zero ) ) return zero;
154 if( t2->higher_equal( zero ) ) return zero;
155 }
157 // Either input is BOTTOM ==> the result is the local BOTTOM
158 if( t1 == Type::BOTTOM || t2 == Type::BOTTOM )
159 return bottom_type();
161 #if defined(IA32)
162 // Can't trust native compilers to properly fold strict double
163 // multiplication with round-to-zero on this platform.
164 if (op == Op_MulD && phase->C->method()->is_strict()) {
165 return TypeD::DOUBLE;
166 }
167 #endif
169 return mul_ring(t1,t2); // Local flavor of type multiplication
170 }
173 //=============================================================================
174 //------------------------------Ideal------------------------------------------
175 // Check for power-of-2 multiply, then try the regular MulNode::Ideal
176 Node *MulINode::Ideal(PhaseGVN *phase, bool can_reshape) {
177 // Swap constant to right
178 jint con;
179 if ((con = in(1)->find_int_con(0)) != 0) {
180 swap_edges(1, 2);
181 // Finish rest of method to use info in 'con'
182 } else if ((con = in(2)->find_int_con(0)) == 0) {
183 return MulNode::Ideal(phase, can_reshape);
184 }
186 // Now we have a constant Node on the right and the constant in con
187 if( con == 0 ) return NULL; // By zero is handled by Value call
188 if( con == 1 ) return NULL; // By one is handled by Identity call
190 // Check for negative constant; if so negate the final result
191 bool sign_flip = false;
192 if( con < 0 ) {
193 con = -con;
194 sign_flip = true;
195 }
197 // Get low bit; check for being the only bit
198 Node *res = NULL;
199 jint bit1 = con & -con; // Extract low bit
200 if( bit1 == con ) { // Found a power of 2?
201 res = new (phase->C) LShiftINode( in(1), phase->intcon(log2_intptr(bit1)) );
202 } else {
204 // Check for constant with 2 bits set
205 jint bit2 = con-bit1;
206 bit2 = bit2 & -bit2; // Extract 2nd bit
207 if( bit2 + bit1 == con ) { // Found all bits in con?
208 Node *n1 = phase->transform( new (phase->C) LShiftINode( in(1), phase->intcon(log2_intptr(bit1)) ) );
209 Node *n2 = phase->transform( new (phase->C) LShiftINode( in(1), phase->intcon(log2_intptr(bit2)) ) );
210 res = new (phase->C) AddINode( n2, n1 );
212 } else if (is_power_of_2(con+1)) {
213 // Sleezy: power-of-2 -1. Next time be generic.
214 jint temp = (jint) (con + 1);
215 Node *n1 = phase->transform( new (phase->C) LShiftINode( in(1), phase->intcon(log2_intptr(temp)) ) );
216 res = new (phase->C) SubINode( n1, in(1) );
217 } else {
218 return MulNode::Ideal(phase, can_reshape);
219 }
220 }
222 if( sign_flip ) { // Need to negate result?
223 res = phase->transform(res);// Transform, before making the zero con
224 res = new (phase->C) SubINode(phase->intcon(0),res);
225 }
227 return res; // Return final result
228 }
230 //------------------------------mul_ring---------------------------------------
231 // Compute the product type of two integer ranges into this node.
232 const Type *MulINode::mul_ring(const Type *t0, const Type *t1) const {
233 const TypeInt *r0 = t0->is_int(); // Handy access
234 const TypeInt *r1 = t1->is_int();
236 // Fetch endpoints of all ranges
237 int32 lo0 = r0->_lo;
238 double a = (double)lo0;
239 int32 hi0 = r0->_hi;
240 double b = (double)hi0;
241 int32 lo1 = r1->_lo;
242 double c = (double)lo1;
243 int32 hi1 = r1->_hi;
244 double d = (double)hi1;
246 // Compute all endpoints & check for overflow
247 int32 A = lo0*lo1;
248 if( (double)A != a*c ) return TypeInt::INT; // Overflow?
249 int32 B = lo0*hi1;
250 if( (double)B != a*d ) return TypeInt::INT; // Overflow?
251 int32 C = hi0*lo1;
252 if( (double)C != b*c ) return TypeInt::INT; // Overflow?
253 int32 D = hi0*hi1;
254 if( (double)D != b*d ) return TypeInt::INT; // Overflow?
256 if( A < B ) { lo0 = A; hi0 = B; } // Sort range endpoints
257 else { lo0 = B; hi0 = A; }
258 if( C < D ) {
259 if( C < lo0 ) lo0 = C;
260 if( D > hi0 ) hi0 = D;
261 } else {
262 if( D < lo0 ) lo0 = D;
263 if( C > hi0 ) hi0 = C;
264 }
265 return TypeInt::make(lo0, hi0, MAX2(r0->_widen,r1->_widen));
266 }
269 //=============================================================================
270 //------------------------------Ideal------------------------------------------
271 // Check for power-of-2 multiply, then try the regular MulNode::Ideal
272 Node *MulLNode::Ideal(PhaseGVN *phase, bool can_reshape) {
273 // Swap constant to right
274 jlong con;
275 if ((con = in(1)->find_long_con(0)) != 0) {
276 swap_edges(1, 2);
277 // Finish rest of method to use info in 'con'
278 } else if ((con = in(2)->find_long_con(0)) == 0) {
279 return MulNode::Ideal(phase, can_reshape);
280 }
282 // Now we have a constant Node on the right and the constant in con
283 if( con == CONST64(0) ) return NULL; // By zero is handled by Value call
284 if( con == CONST64(1) ) return NULL; // By one is handled by Identity call
286 // Check for negative constant; if so negate the final result
287 bool sign_flip = false;
288 if( con < 0 ) {
289 con = -con;
290 sign_flip = true;
291 }
293 // Get low bit; check for being the only bit
294 Node *res = NULL;
295 jlong bit1 = con & -con; // Extract low bit
296 if( bit1 == con ) { // Found a power of 2?
297 res = new (phase->C) LShiftLNode( in(1), phase->intcon(log2_long(bit1)) );
298 } else {
300 // Check for constant with 2 bits set
301 jlong bit2 = con-bit1;
302 bit2 = bit2 & -bit2; // Extract 2nd bit
303 if( bit2 + bit1 == con ) { // Found all bits in con?
304 Node *n1 = phase->transform( new (phase->C) LShiftLNode( in(1), phase->intcon(log2_long(bit1)) ) );
305 Node *n2 = phase->transform( new (phase->C) LShiftLNode( in(1), phase->intcon(log2_long(bit2)) ) );
306 res = new (phase->C) AddLNode( n2, n1 );
308 } else if (is_power_of_2_long(con+1)) {
309 // Sleezy: power-of-2 -1. Next time be generic.
310 jlong temp = (jlong) (con + 1);
311 Node *n1 = phase->transform( new (phase->C) LShiftLNode( in(1), phase->intcon(log2_long(temp)) ) );
312 res = new (phase->C) SubLNode( n1, in(1) );
313 } else {
314 return MulNode::Ideal(phase, can_reshape);
315 }
316 }
318 if( sign_flip ) { // Need to negate result?
319 res = phase->transform(res);// Transform, before making the zero con
320 res = new (phase->C) SubLNode(phase->longcon(0),res);
321 }
323 return res; // Return final result
324 }
326 //------------------------------mul_ring---------------------------------------
327 // Compute the product type of two integer ranges into this node.
328 const Type *MulLNode::mul_ring(const Type *t0, const Type *t1) const {
329 const TypeLong *r0 = t0->is_long(); // Handy access
330 const TypeLong *r1 = t1->is_long();
332 // Fetch endpoints of all ranges
333 jlong lo0 = r0->_lo;
334 double a = (double)lo0;
335 jlong hi0 = r0->_hi;
336 double b = (double)hi0;
337 jlong lo1 = r1->_lo;
338 double c = (double)lo1;
339 jlong hi1 = r1->_hi;
340 double d = (double)hi1;
342 // Compute all endpoints & check for overflow
343 jlong A = lo0*lo1;
344 if( (double)A != a*c ) return TypeLong::LONG; // Overflow?
345 jlong B = lo0*hi1;
346 if( (double)B != a*d ) return TypeLong::LONG; // Overflow?
347 jlong C = hi0*lo1;
348 if( (double)C != b*c ) return TypeLong::LONG; // Overflow?
349 jlong D = hi0*hi1;
350 if( (double)D != b*d ) return TypeLong::LONG; // Overflow?
352 if( A < B ) { lo0 = A; hi0 = B; } // Sort range endpoints
353 else { lo0 = B; hi0 = A; }
354 if( C < D ) {
355 if( C < lo0 ) lo0 = C;
356 if( D > hi0 ) hi0 = D;
357 } else {
358 if( D < lo0 ) lo0 = D;
359 if( C > hi0 ) hi0 = C;
360 }
361 return TypeLong::make(lo0, hi0, MAX2(r0->_widen,r1->_widen));
362 }
364 //=============================================================================
365 //------------------------------mul_ring---------------------------------------
366 // Compute the product type of two double ranges into this node.
367 const Type *MulFNode::mul_ring(const Type *t0, const Type *t1) const {
368 if( t0 == Type::FLOAT || t1 == Type::FLOAT ) return Type::FLOAT;
369 return TypeF::make( t0->getf() * t1->getf() );
370 }
372 //=============================================================================
373 //------------------------------mul_ring---------------------------------------
374 // Compute the product type of two double ranges into this node.
375 const Type *MulDNode::mul_ring(const Type *t0, const Type *t1) const {
376 if( t0 == Type::DOUBLE || t1 == Type::DOUBLE ) return Type::DOUBLE;
377 // We must be multiplying 2 double constants.
378 return TypeD::make( t0->getd() * t1->getd() );
379 }
381 //=============================================================================
382 //------------------------------Value------------------------------------------
383 const Type *MulHiLNode::Value( PhaseTransform *phase ) const {
384 // Either input is TOP ==> the result is TOP
385 const Type *t1 = phase->type( in(1) );
386 const Type *t2 = phase->type( in(2) );
387 if( t1 == Type::TOP ) return Type::TOP;
388 if( t2 == Type::TOP ) return Type::TOP;
390 // Either input is BOTTOM ==> the result is the local BOTTOM
391 const Type *bot = bottom_type();
392 if( (t1 == bot) || (t2 == bot) ||
393 (t1 == Type::BOTTOM) || (t2 == Type::BOTTOM) )
394 return bot;
396 // It is not worth trying to constant fold this stuff!
397 return TypeLong::LONG;
398 }
400 //=============================================================================
401 //------------------------------mul_ring---------------------------------------
402 // Supplied function returns the product of the inputs IN THE CURRENT RING.
403 // For the logical operations the ring's MUL is really a logical AND function.
404 // This also type-checks the inputs for sanity. Guaranteed never to
405 // be passed a TOP or BOTTOM type, these are filtered out by pre-check.
406 const Type *AndINode::mul_ring( const Type *t0, const Type *t1 ) const {
407 const TypeInt *r0 = t0->is_int(); // Handy access
408 const TypeInt *r1 = t1->is_int();
409 int widen = MAX2(r0->_widen,r1->_widen);
411 // If either input is a constant, might be able to trim cases
412 if( !r0->is_con() && !r1->is_con() )
413 return TypeInt::INT; // No constants to be had
415 // Both constants? Return bits
416 if( r0->is_con() && r1->is_con() )
417 return TypeInt::make( r0->get_con() & r1->get_con() );
419 if( r0->is_con() && r0->get_con() > 0 )
420 return TypeInt::make(0, r0->get_con(), widen);
422 if( r1->is_con() && r1->get_con() > 0 )
423 return TypeInt::make(0, r1->get_con(), widen);
425 if( r0 == TypeInt::BOOL || r1 == TypeInt::BOOL ) {
426 return TypeInt::BOOL;
427 }
429 return TypeInt::INT; // No constants to be had
430 }
432 //------------------------------Identity---------------------------------------
433 // Masking off the high bits of an unsigned load is not required
434 Node *AndINode::Identity( PhaseTransform *phase ) {
436 // x & x => x
437 if (phase->eqv(in(1), in(2))) return in(1);
439 Node* in1 = in(1);
440 uint op = in1->Opcode();
441 const TypeInt* t2 = phase->type(in(2))->isa_int();
442 if (t2 && t2->is_con()) {
443 int con = t2->get_con();
444 // Masking off high bits which are always zero is useless.
445 const TypeInt* t1 = phase->type( in(1) )->isa_int();
446 if (t1 != NULL && t1->_lo >= 0) {
447 jint t1_support = right_n_bits(1 + log2_intptr(t1->_hi));
448 if ((t1_support & con) == t1_support)
449 return in1;
450 }
451 // Masking off the high bits of a unsigned-shift-right is not
452 // needed either.
453 if (op == Op_URShiftI) {
454 const TypeInt* t12 = phase->type(in1->in(2))->isa_int();
455 if (t12 && t12->is_con()) { // Shift is by a constant
456 int shift = t12->get_con();
457 shift &= BitsPerJavaInteger - 1; // semantics of Java shifts
458 int mask = max_juint >> shift;
459 if ((mask & con) == mask) // If AND is useless, skip it
460 return in1;
461 }
462 }
463 }
464 return MulNode::Identity(phase);
465 }
467 //------------------------------Ideal------------------------------------------
468 Node *AndINode::Ideal(PhaseGVN *phase, bool can_reshape) {
469 // Special case constant AND mask
470 const TypeInt *t2 = phase->type( in(2) )->isa_int();
471 if( !t2 || !t2->is_con() ) return MulNode::Ideal(phase, can_reshape);
472 const int mask = t2->get_con();
473 Node *load = in(1);
474 uint lop = load->Opcode();
476 // Masking bits off of a Character? Hi bits are already zero.
477 if( lop == Op_LoadUS &&
478 (mask & 0xFFFF0000) ) // Can we make a smaller mask?
479 return new (phase->C) AndINode(load,phase->intcon(mask&0xFFFF));
481 // Masking bits off of a Short? Loading a Character does some masking
482 if (can_reshape &&
483 load->outcnt() == 1 && load->unique_out() == this) {
484 if (lop == Op_LoadS && (mask & 0xFFFF0000) == 0 ) {
485 Node *ldus = new (phase->C) LoadUSNode(load->in(MemNode::Control),
486 load->in(MemNode::Memory),
487 load->in(MemNode::Address),
488 load->adr_type(),
489 TypeInt::CHAR, MemNode::unordered);
490 ldus = phase->transform(ldus);
491 return new (phase->C) AndINode(ldus, phase->intcon(mask & 0xFFFF));
492 }
494 // Masking sign bits off of a Byte? Do an unsigned byte load plus
495 // an and.
496 if (lop == Op_LoadB && (mask & 0xFFFFFF00) == 0) {
497 Node* ldub = new (phase->C) LoadUBNode(load->in(MemNode::Control),
498 load->in(MemNode::Memory),
499 load->in(MemNode::Address),
500 load->adr_type(),
501 TypeInt::UBYTE, MemNode::unordered);
502 ldub = phase->transform(ldub);
503 return new (phase->C) AndINode(ldub, phase->intcon(mask));
504 }
505 }
507 // Masking off sign bits? Dont make them!
508 if( lop == Op_RShiftI ) {
509 const TypeInt *t12 = phase->type(load->in(2))->isa_int();
510 if( t12 && t12->is_con() ) { // Shift is by a constant
511 int shift = t12->get_con();
512 shift &= BitsPerJavaInteger-1; // semantics of Java shifts
513 const int sign_bits_mask = ~right_n_bits(BitsPerJavaInteger - shift);
514 // If the AND'ing of the 2 masks has no bits, then only original shifted
515 // bits survive. NO sign-extension bits survive the maskings.
516 if( (sign_bits_mask & mask) == 0 ) {
517 // Use zero-fill shift instead
518 Node *zshift = phase->transform(new (phase->C) URShiftINode(load->in(1),load->in(2)));
519 return new (phase->C) AndINode( zshift, in(2) );
520 }
521 }
522 }
524 // Check for 'negate/and-1', a pattern emitted when someone asks for
525 // 'mod 2'. Negate leaves the low order bit unchanged (think: complement
526 // plus 1) and the mask is of the low order bit. Skip the negate.
527 if( lop == Op_SubI && mask == 1 && load->in(1) &&
528 phase->type(load->in(1)) == TypeInt::ZERO )
529 return new (phase->C) AndINode( load->in(2), in(2) );
531 return MulNode::Ideal(phase, can_reshape);
532 }
534 //=============================================================================
535 //------------------------------mul_ring---------------------------------------
536 // Supplied function returns the product of the inputs IN THE CURRENT RING.
537 // For the logical operations the ring's MUL is really a logical AND function.
538 // This also type-checks the inputs for sanity. Guaranteed never to
539 // be passed a TOP or BOTTOM type, these are filtered out by pre-check.
540 const Type *AndLNode::mul_ring( const Type *t0, const Type *t1 ) const {
541 const TypeLong *r0 = t0->is_long(); // Handy access
542 const TypeLong *r1 = t1->is_long();
543 int widen = MAX2(r0->_widen,r1->_widen);
545 // If either input is a constant, might be able to trim cases
546 if( !r0->is_con() && !r1->is_con() )
547 return TypeLong::LONG; // No constants to be had
549 // Both constants? Return bits
550 if( r0->is_con() && r1->is_con() )
551 return TypeLong::make( r0->get_con() & r1->get_con() );
553 if( r0->is_con() && r0->get_con() > 0 )
554 return TypeLong::make(CONST64(0), r0->get_con(), widen);
556 if( r1->is_con() && r1->get_con() > 0 )
557 return TypeLong::make(CONST64(0), r1->get_con(), widen);
559 return TypeLong::LONG; // No constants to be had
560 }
562 //------------------------------Identity---------------------------------------
563 // Masking off the high bits of an unsigned load is not required
564 Node *AndLNode::Identity( PhaseTransform *phase ) {
566 // x & x => x
567 if (phase->eqv(in(1), in(2))) return in(1);
569 Node *usr = in(1);
570 const TypeLong *t2 = phase->type( in(2) )->isa_long();
571 if( t2 && t2->is_con() ) {
572 jlong con = t2->get_con();
573 // Masking off high bits which are always zero is useless.
574 const TypeLong* t1 = phase->type( in(1) )->isa_long();
575 if (t1 != NULL && t1->_lo >= 0) {
576 jlong t1_support = ((jlong)1 << (1 + log2_long(t1->_hi))) - 1;
577 if ((t1_support & con) == t1_support)
578 return usr;
579 }
580 uint lop = usr->Opcode();
581 // Masking off the high bits of a unsigned-shift-right is not
582 // needed either.
583 if( lop == Op_URShiftL ) {
584 const TypeInt *t12 = phase->type( usr->in(2) )->isa_int();
585 if( t12 && t12->is_con() ) { // Shift is by a constant
586 int shift = t12->get_con();
587 shift &= BitsPerJavaLong - 1; // semantics of Java shifts
588 jlong mask = max_julong >> shift;
589 if( (mask&con) == mask ) // If AND is useless, skip it
590 return usr;
591 }
592 }
593 }
594 return MulNode::Identity(phase);
595 }
597 //------------------------------Ideal------------------------------------------
598 Node *AndLNode::Ideal(PhaseGVN *phase, bool can_reshape) {
599 // Special case constant AND mask
600 const TypeLong *t2 = phase->type( in(2) )->isa_long();
601 if( !t2 || !t2->is_con() ) return MulNode::Ideal(phase, can_reshape);
602 const jlong mask = t2->get_con();
604 Node* in1 = in(1);
605 uint op = in1->Opcode();
607 // Are we masking a long that was converted from an int with a mask
608 // that fits in 32-bits? Commute them and use an AndINode. Don't
609 // convert masks which would cause a sign extension of the integer
610 // value. This check includes UI2L masks (0x00000000FFFFFFFF) which
611 // would be optimized away later in Identity.
612 if (op == Op_ConvI2L && (mask & CONST64(0xFFFFFFFF80000000)) == 0) {
613 Node* andi = new (phase->C) AndINode(in1->in(1), phase->intcon(mask));
614 andi = phase->transform(andi);
615 return new (phase->C) ConvI2LNode(andi);
616 }
618 // Masking off sign bits? Dont make them!
619 if (op == Op_RShiftL) {
620 const TypeInt* t12 = phase->type(in1->in(2))->isa_int();
621 if( t12 && t12->is_con() ) { // Shift is by a constant
622 int shift = t12->get_con();
623 shift &= BitsPerJavaLong - 1; // semantics of Java shifts
624 const jlong sign_bits_mask = ~(((jlong)CONST64(1) << (jlong)(BitsPerJavaLong - shift)) -1);
625 // If the AND'ing of the 2 masks has no bits, then only original shifted
626 // bits survive. NO sign-extension bits survive the maskings.
627 if( (sign_bits_mask & mask) == 0 ) {
628 // Use zero-fill shift instead
629 Node *zshift = phase->transform(new (phase->C) URShiftLNode(in1->in(1), in1->in(2)));
630 return new (phase->C) AndLNode(zshift, in(2));
631 }
632 }
633 }
635 return MulNode::Ideal(phase, can_reshape);
636 }
638 //=============================================================================
639 //------------------------------Identity---------------------------------------
640 Node *LShiftINode::Identity( PhaseTransform *phase ) {
641 const TypeInt *ti = phase->type( in(2) )->isa_int(); // shift count is an int
642 return ( ti && ti->is_con() && ( ti->get_con() & ( BitsPerInt - 1 ) ) == 0 ) ? in(1) : this;
643 }
645 //------------------------------Ideal------------------------------------------
646 // If the right input is a constant, and the left input is an add of a
647 // constant, flatten the tree: (X+con1)<<con0 ==> X<<con0 + con1<<con0
648 Node *LShiftINode::Ideal(PhaseGVN *phase, bool can_reshape) {
649 const Type *t = phase->type( in(2) );
650 if( t == Type::TOP ) return NULL; // Right input is dead
651 const TypeInt *t2 = t->isa_int();
652 if( !t2 || !t2->is_con() ) return NULL; // Right input is a constant
653 const int con = t2->get_con() & ( BitsPerInt - 1 ); // masked shift count
655 if ( con == 0 ) return NULL; // let Identity() handle 0 shift count
657 // Left input is an add of a constant?
658 Node *add1 = in(1);
659 int add1_op = add1->Opcode();
660 if( add1_op == Op_AddI ) { // Left input is an add?
661 assert( add1 != add1->in(1), "dead loop in LShiftINode::Ideal" );
662 const TypeInt *t12 = phase->type(add1->in(2))->isa_int();
663 if( t12 && t12->is_con() ){ // Left input is an add of a con?
664 // Transform is legal, but check for profit. Avoid breaking 'i2s'
665 // and 'i2b' patterns which typically fold into 'StoreC/StoreB'.
666 if( con < 16 ) {
667 // Compute X << con0
668 Node *lsh = phase->transform( new (phase->C) LShiftINode( add1->in(1), in(2) ) );
669 // Compute X<<con0 + (con1<<con0)
670 return new (phase->C) AddINode( lsh, phase->intcon(t12->get_con() << con));
671 }
672 }
673 }
675 // Check for "(x>>c0)<<c0" which just masks off low bits
676 if( (add1_op == Op_RShiftI || add1_op == Op_URShiftI ) &&
677 add1->in(2) == in(2) )
678 // Convert to "(x & -(1<<c0))"
679 return new (phase->C) AndINode(add1->in(1),phase->intcon( -(1<<con)));
681 // Check for "((x>>c0) & Y)<<c0" which just masks off more low bits
682 if( add1_op == Op_AndI ) {
683 Node *add2 = add1->in(1);
684 int add2_op = add2->Opcode();
685 if( (add2_op == Op_RShiftI || add2_op == Op_URShiftI ) &&
686 add2->in(2) == in(2) ) {
687 // Convert to "(x & (Y<<c0))"
688 Node *y_sh = phase->transform( new (phase->C) LShiftINode( add1->in(2), in(2) ) );
689 return new (phase->C) AndINode( add2->in(1), y_sh );
690 }
691 }
693 // Check for ((x & ((1<<(32-c0))-1)) << c0) which ANDs off high bits
694 // before shifting them away.
695 const jint bits_mask = right_n_bits(BitsPerJavaInteger-con);
696 if( add1_op == Op_AndI &&
697 phase->type(add1->in(2)) == TypeInt::make( bits_mask ) )
698 return new (phase->C) LShiftINode( add1->in(1), in(2) );
700 return NULL;
701 }
703 //------------------------------Value------------------------------------------
704 // A LShiftINode shifts its input2 left by input1 amount.
705 const Type *LShiftINode::Value( PhaseTransform *phase ) const {
706 const Type *t1 = phase->type( in(1) );
707 const Type *t2 = phase->type( in(2) );
708 // Either input is TOP ==> the result is TOP
709 if( t1 == Type::TOP ) return Type::TOP;
710 if( t2 == Type::TOP ) return Type::TOP;
712 // Left input is ZERO ==> the result is ZERO.
713 if( t1 == TypeInt::ZERO ) return TypeInt::ZERO;
714 // Shift by zero does nothing
715 if( t2 == TypeInt::ZERO ) return t1;
717 // Either input is BOTTOM ==> the result is BOTTOM
718 if( (t1 == TypeInt::INT) || (t2 == TypeInt::INT) ||
719 (t1 == Type::BOTTOM) || (t2 == Type::BOTTOM) )
720 return TypeInt::INT;
722 const TypeInt *r1 = t1->is_int(); // Handy access
723 const TypeInt *r2 = t2->is_int(); // Handy access
725 if (!r2->is_con())
726 return TypeInt::INT;
728 uint shift = r2->get_con();
729 shift &= BitsPerJavaInteger-1; // semantics of Java shifts
730 // Shift by a multiple of 32 does nothing:
731 if (shift == 0) return t1;
733 // If the shift is a constant, shift the bounds of the type,
734 // unless this could lead to an overflow.
735 if (!r1->is_con()) {
736 jint lo = r1->_lo, hi = r1->_hi;
737 if (((lo << shift) >> shift) == lo &&
738 ((hi << shift) >> shift) == hi) {
739 // No overflow. The range shifts up cleanly.
740 return TypeInt::make((jint)lo << (jint)shift,
741 (jint)hi << (jint)shift,
742 MAX2(r1->_widen,r2->_widen));
743 }
744 return TypeInt::INT;
745 }
747 return TypeInt::make( (jint)r1->get_con() << (jint)shift );
748 }
750 //=============================================================================
751 //------------------------------Identity---------------------------------------
752 Node *LShiftLNode::Identity( PhaseTransform *phase ) {
753 const TypeInt *ti = phase->type( in(2) )->isa_int(); // shift count is an int
754 return ( ti && ti->is_con() && ( ti->get_con() & ( BitsPerLong - 1 ) ) == 0 ) ? in(1) : this;
755 }
757 //------------------------------Ideal------------------------------------------
758 // If the right input is a constant, and the left input is an add of a
759 // constant, flatten the tree: (X+con1)<<con0 ==> X<<con0 + con1<<con0
760 Node *LShiftLNode::Ideal(PhaseGVN *phase, bool can_reshape) {
761 const Type *t = phase->type( in(2) );
762 if( t == Type::TOP ) return NULL; // Right input is dead
763 const TypeInt *t2 = t->isa_int();
764 if( !t2 || !t2->is_con() ) return NULL; // Right input is a constant
765 const int con = t2->get_con() & ( BitsPerLong - 1 ); // masked shift count
767 if ( con == 0 ) return NULL; // let Identity() handle 0 shift count
769 // Left input is an add of a constant?
770 Node *add1 = in(1);
771 int add1_op = add1->Opcode();
772 if( add1_op == Op_AddL ) { // Left input is an add?
773 // Avoid dead data cycles from dead loops
774 assert( add1 != add1->in(1), "dead loop in LShiftLNode::Ideal" );
775 const TypeLong *t12 = phase->type(add1->in(2))->isa_long();
776 if( t12 && t12->is_con() ){ // Left input is an add of a con?
777 // Compute X << con0
778 Node *lsh = phase->transform( new (phase->C) LShiftLNode( add1->in(1), in(2) ) );
779 // Compute X<<con0 + (con1<<con0)
780 return new (phase->C) AddLNode( lsh, phase->longcon(t12->get_con() << con));
781 }
782 }
784 // Check for "(x>>c0)<<c0" which just masks off low bits
785 if( (add1_op == Op_RShiftL || add1_op == Op_URShiftL ) &&
786 add1->in(2) == in(2) )
787 // Convert to "(x & -(1<<c0))"
788 return new (phase->C) AndLNode(add1->in(1),phase->longcon( -(CONST64(1)<<con)));
790 // Check for "((x>>c0) & Y)<<c0" which just masks off more low bits
791 if( add1_op == Op_AndL ) {
792 Node *add2 = add1->in(1);
793 int add2_op = add2->Opcode();
794 if( (add2_op == Op_RShiftL || add2_op == Op_URShiftL ) &&
795 add2->in(2) == in(2) ) {
796 // Convert to "(x & (Y<<c0))"
797 Node *y_sh = phase->transform( new (phase->C) LShiftLNode( add1->in(2), in(2) ) );
798 return new (phase->C) AndLNode( add2->in(1), y_sh );
799 }
800 }
802 // Check for ((x & ((CONST64(1)<<(64-c0))-1)) << c0) which ANDs off high bits
803 // before shifting them away.
804 const jlong bits_mask = ((jlong)CONST64(1) << (jlong)(BitsPerJavaLong - con)) - CONST64(1);
805 if( add1_op == Op_AndL &&
806 phase->type(add1->in(2)) == TypeLong::make( bits_mask ) )
807 return new (phase->C) LShiftLNode( add1->in(1), in(2) );
809 return NULL;
810 }
812 //------------------------------Value------------------------------------------
813 // A LShiftLNode shifts its input2 left by input1 amount.
814 const Type *LShiftLNode::Value( PhaseTransform *phase ) const {
815 const Type *t1 = phase->type( in(1) );
816 const Type *t2 = phase->type( in(2) );
817 // Either input is TOP ==> the result is TOP
818 if( t1 == Type::TOP ) return Type::TOP;
819 if( t2 == Type::TOP ) return Type::TOP;
821 // Left input is ZERO ==> the result is ZERO.
822 if( t1 == TypeLong::ZERO ) return TypeLong::ZERO;
823 // Shift by zero does nothing
824 if( t2 == TypeInt::ZERO ) return t1;
826 // Either input is BOTTOM ==> the result is BOTTOM
827 if( (t1 == TypeLong::LONG) || (t2 == TypeInt::INT) ||
828 (t1 == Type::BOTTOM) || (t2 == Type::BOTTOM) )
829 return TypeLong::LONG;
831 const TypeLong *r1 = t1->is_long(); // Handy access
832 const TypeInt *r2 = t2->is_int(); // Handy access
834 if (!r2->is_con())
835 return TypeLong::LONG;
837 uint shift = r2->get_con();
838 shift &= BitsPerJavaLong - 1; // semantics of Java shifts
839 // Shift by a multiple of 64 does nothing:
840 if (shift == 0) return t1;
842 // If the shift is a constant, shift the bounds of the type,
843 // unless this could lead to an overflow.
844 if (!r1->is_con()) {
845 jlong lo = r1->_lo, hi = r1->_hi;
846 if (((lo << shift) >> shift) == lo &&
847 ((hi << shift) >> shift) == hi) {
848 // No overflow. The range shifts up cleanly.
849 return TypeLong::make((jlong)lo << (jint)shift,
850 (jlong)hi << (jint)shift,
851 MAX2(r1->_widen,r2->_widen));
852 }
853 return TypeLong::LONG;
854 }
856 return TypeLong::make( (jlong)r1->get_con() << (jint)shift );
857 }
859 //=============================================================================
860 //------------------------------Identity---------------------------------------
861 Node *RShiftINode::Identity( PhaseTransform *phase ) {
862 const TypeInt *t2 = phase->type(in(2))->isa_int();
863 if( !t2 ) return this;
864 if ( t2->is_con() && ( t2->get_con() & ( BitsPerInt - 1 ) ) == 0 )
865 return in(1);
867 // Check for useless sign-masking
868 if( in(1)->Opcode() == Op_LShiftI &&
869 in(1)->req() == 3 &&
870 in(1)->in(2) == in(2) &&
871 t2->is_con() ) {
872 uint shift = t2->get_con();
873 shift &= BitsPerJavaInteger-1; // semantics of Java shifts
874 // Compute masks for which this shifting doesn't change
875 int lo = (-1 << (BitsPerJavaInteger - shift-1)); // FFFF8000
876 int hi = ~lo; // 00007FFF
877 const TypeInt *t11 = phase->type(in(1)->in(1))->isa_int();
878 if( !t11 ) return this;
879 // Does actual value fit inside of mask?
880 if( lo <= t11->_lo && t11->_hi <= hi )
881 return in(1)->in(1); // Then shifting is a nop
882 }
884 return this;
885 }
887 //------------------------------Ideal------------------------------------------
888 Node *RShiftINode::Ideal(PhaseGVN *phase, bool can_reshape) {
889 // Inputs may be TOP if they are dead.
890 const TypeInt *t1 = phase->type( in(1) )->isa_int();
891 if( !t1 ) return NULL; // Left input is an integer
892 const TypeInt *t2 = phase->type( in(2) )->isa_int();
893 if( !t2 || !t2->is_con() ) return NULL; // Right input is a constant
894 const TypeInt *t3; // type of in(1).in(2)
895 int shift = t2->get_con();
896 shift &= BitsPerJavaInteger-1; // semantics of Java shifts
898 if ( shift == 0 ) return NULL; // let Identity() handle 0 shift count
900 // Check for (x & 0xFF000000) >> 24, whose mask can be made smaller.
901 // Such expressions arise normally from shift chains like (byte)(x >> 24).
902 const Node *mask = in(1);
903 if( mask->Opcode() == Op_AndI &&
904 (t3 = phase->type(mask->in(2))->isa_int()) &&
905 t3->is_con() ) {
906 Node *x = mask->in(1);
907 jint maskbits = t3->get_con();
908 // Convert to "(x >> shift) & (mask >> shift)"
909 Node *shr_nomask = phase->transform( new (phase->C) RShiftINode(mask->in(1), in(2)) );
910 return new (phase->C) AndINode(shr_nomask, phase->intcon( maskbits >> shift));
911 }
913 // Check for "(short[i] <<16)>>16" which simply sign-extends
914 const Node *shl = in(1);
915 if( shl->Opcode() != Op_LShiftI ) return NULL;
917 if( shift == 16 &&
918 (t3 = phase->type(shl->in(2))->isa_int()) &&
919 t3->is_con(16) ) {
920 Node *ld = shl->in(1);
921 if( ld->Opcode() == Op_LoadS ) {
922 // Sign extension is just useless here. Return a RShiftI of zero instead
923 // returning 'ld' directly. We cannot return an old Node directly as
924 // that is the job of 'Identity' calls and Identity calls only work on
925 // direct inputs ('ld' is an extra Node removed from 'this'). The
926 // combined optimization requires Identity only return direct inputs.
927 set_req(1, ld);
928 set_req(2, phase->intcon(0));
929 return this;
930 }
931 else if( can_reshape &&
932 ld->Opcode() == Op_LoadUS &&
933 ld->outcnt() == 1 && ld->unique_out() == shl)
934 // Replace zero-extension-load with sign-extension-load
935 return new (phase->C) LoadSNode( ld->in(MemNode::Control),
936 ld->in(MemNode::Memory),
937 ld->in(MemNode::Address),
938 ld->adr_type(), TypeInt::SHORT,
939 MemNode::unordered);
940 }
942 // Check for "(byte[i] <<24)>>24" which simply sign-extends
943 if( shift == 24 &&
944 (t3 = phase->type(shl->in(2))->isa_int()) &&
945 t3->is_con(24) ) {
946 Node *ld = shl->in(1);
947 if( ld->Opcode() == Op_LoadB ) {
948 // Sign extension is just useless here
949 set_req(1, ld);
950 set_req(2, phase->intcon(0));
951 return this;
952 }
953 }
955 return NULL;
956 }
958 //------------------------------Value------------------------------------------
959 // A RShiftINode shifts its input2 right by input1 amount.
960 const Type *RShiftINode::Value( PhaseTransform *phase ) const {
961 const Type *t1 = phase->type( in(1) );
962 const Type *t2 = phase->type( in(2) );
963 // Either input is TOP ==> the result is TOP
964 if( t1 == Type::TOP ) return Type::TOP;
965 if( t2 == Type::TOP ) return Type::TOP;
967 // Left input is ZERO ==> the result is ZERO.
968 if( t1 == TypeInt::ZERO ) return TypeInt::ZERO;
969 // Shift by zero does nothing
970 if( t2 == TypeInt::ZERO ) return t1;
972 // Either input is BOTTOM ==> the result is BOTTOM
973 if (t1 == Type::BOTTOM || t2 == Type::BOTTOM)
974 return TypeInt::INT;
976 if (t2 == TypeInt::INT)
977 return TypeInt::INT;
979 const TypeInt *r1 = t1->is_int(); // Handy access
980 const TypeInt *r2 = t2->is_int(); // Handy access
982 // If the shift is a constant, just shift the bounds of the type.
983 // For example, if the shift is 31, we just propagate sign bits.
984 if (r2->is_con()) {
985 uint shift = r2->get_con();
986 shift &= BitsPerJavaInteger-1; // semantics of Java shifts
987 // Shift by a multiple of 32 does nothing:
988 if (shift == 0) return t1;
989 // Calculate reasonably aggressive bounds for the result.
990 // This is necessary if we are to correctly type things
991 // like (x<<24>>24) == ((byte)x).
992 jint lo = (jint)r1->_lo >> (jint)shift;
993 jint hi = (jint)r1->_hi >> (jint)shift;
994 assert(lo <= hi, "must have valid bounds");
995 const TypeInt* ti = TypeInt::make(lo, hi, MAX2(r1->_widen,r2->_widen));
996 #ifdef ASSERT
997 // Make sure we get the sign-capture idiom correct.
998 if (shift == BitsPerJavaInteger-1) {
999 if (r1->_lo >= 0) assert(ti == TypeInt::ZERO, ">>31 of + is 0");
1000 if (r1->_hi < 0) assert(ti == TypeInt::MINUS_1, ">>31 of - is -1");
1001 }
1002 #endif
1003 return ti;
1004 }
1006 if( !r1->is_con() || !r2->is_con() )
1007 return TypeInt::INT;
1009 // Signed shift right
1010 return TypeInt::make( r1->get_con() >> (r2->get_con()&31) );
1011 }
1013 //=============================================================================
1014 //------------------------------Identity---------------------------------------
1015 Node *RShiftLNode::Identity( PhaseTransform *phase ) {
1016 const TypeInt *ti = phase->type( in(2) )->isa_int(); // shift count is an int
1017 return ( ti && ti->is_con() && ( ti->get_con() & ( BitsPerLong - 1 ) ) == 0 ) ? in(1) : this;
1018 }
1020 //------------------------------Value------------------------------------------
1021 // A RShiftLNode shifts its input2 right by input1 amount.
1022 const Type *RShiftLNode::Value( PhaseTransform *phase ) const {
1023 const Type *t1 = phase->type( in(1) );
1024 const Type *t2 = phase->type( in(2) );
1025 // Either input is TOP ==> the result is TOP
1026 if( t1 == Type::TOP ) return Type::TOP;
1027 if( t2 == Type::TOP ) return Type::TOP;
1029 // Left input is ZERO ==> the result is ZERO.
1030 if( t1 == TypeLong::ZERO ) return TypeLong::ZERO;
1031 // Shift by zero does nothing
1032 if( t2 == TypeInt::ZERO ) return t1;
1034 // Either input is BOTTOM ==> the result is BOTTOM
1035 if (t1 == Type::BOTTOM || t2 == Type::BOTTOM)
1036 return TypeLong::LONG;
1038 if (t2 == TypeInt::INT)
1039 return TypeLong::LONG;
1041 const TypeLong *r1 = t1->is_long(); // Handy access
1042 const TypeInt *r2 = t2->is_int (); // Handy access
1044 // If the shift is a constant, just shift the bounds of the type.
1045 // For example, if the shift is 63, we just propagate sign bits.
1046 if (r2->is_con()) {
1047 uint shift = r2->get_con();
1048 shift &= (2*BitsPerJavaInteger)-1; // semantics of Java shifts
1049 // Shift by a multiple of 64 does nothing:
1050 if (shift == 0) return t1;
1051 // Calculate reasonably aggressive bounds for the result.
1052 // This is necessary if we are to correctly type things
1053 // like (x<<24>>24) == ((byte)x).
1054 jlong lo = (jlong)r1->_lo >> (jlong)shift;
1055 jlong hi = (jlong)r1->_hi >> (jlong)shift;
1056 assert(lo <= hi, "must have valid bounds");
1057 const TypeLong* tl = TypeLong::make(lo, hi, MAX2(r1->_widen,r2->_widen));
1058 #ifdef ASSERT
1059 // Make sure we get the sign-capture idiom correct.
1060 if (shift == (2*BitsPerJavaInteger)-1) {
1061 if (r1->_lo >= 0) assert(tl == TypeLong::ZERO, ">>63 of + is 0");
1062 if (r1->_hi < 0) assert(tl == TypeLong::MINUS_1, ">>63 of - is -1");
1063 }
1064 #endif
1065 return tl;
1066 }
1068 return TypeLong::LONG; // Give up
1069 }
1071 //=============================================================================
1072 //------------------------------Identity---------------------------------------
1073 Node *URShiftINode::Identity( PhaseTransform *phase ) {
1074 const TypeInt *ti = phase->type( in(2) )->isa_int();
1075 if ( ti && ti->is_con() && ( ti->get_con() & ( BitsPerInt - 1 ) ) == 0 ) return in(1);
1077 // Check for "((x << LogBytesPerWord) + (wordSize-1)) >> LogBytesPerWord" which is just "x".
1078 // Happens during new-array length computation.
1079 // Safe if 'x' is in the range [0..(max_int>>LogBytesPerWord)]
1080 Node *add = in(1);
1081 if( add->Opcode() == Op_AddI ) {
1082 const TypeInt *t2 = phase->type(add->in(2))->isa_int();
1083 if( t2 && t2->is_con(wordSize - 1) &&
1084 add->in(1)->Opcode() == Op_LShiftI ) {
1085 // Check that shift_counts are LogBytesPerWord
1086 Node *lshift_count = add->in(1)->in(2);
1087 const TypeInt *t_lshift_count = phase->type(lshift_count)->isa_int();
1088 if( t_lshift_count && t_lshift_count->is_con(LogBytesPerWord) &&
1089 t_lshift_count == phase->type(in(2)) ) {
1090 Node *x = add->in(1)->in(1);
1091 const TypeInt *t_x = phase->type(x)->isa_int();
1092 if( t_x != NULL && 0 <= t_x->_lo && t_x->_hi <= (max_jint>>LogBytesPerWord) ) {
1093 return x;
1094 }
1095 }
1096 }
1097 }
1099 return (phase->type(in(2))->higher_equal(TypeInt::ZERO)) ? in(1) : this;
1100 }
1102 //------------------------------Ideal------------------------------------------
1103 Node *URShiftINode::Ideal(PhaseGVN *phase, bool can_reshape) {
1104 const TypeInt *t2 = phase->type( in(2) )->isa_int();
1105 if( !t2 || !t2->is_con() ) return NULL; // Right input is a constant
1106 const int con = t2->get_con() & 31; // Shift count is always masked
1107 if ( con == 0 ) return NULL; // let Identity() handle a 0 shift count
1108 // We'll be wanting the right-shift amount as a mask of that many bits
1109 const int mask = right_n_bits(BitsPerJavaInteger - con);
1111 int in1_op = in(1)->Opcode();
1113 // Check for ((x>>>a)>>>b) and replace with (x>>>(a+b)) when a+b < 32
1114 if( in1_op == Op_URShiftI ) {
1115 const TypeInt *t12 = phase->type( in(1)->in(2) )->isa_int();
1116 if( t12 && t12->is_con() ) { // Right input is a constant
1117 assert( in(1) != in(1)->in(1), "dead loop in URShiftINode::Ideal" );
1118 const int con2 = t12->get_con() & 31; // Shift count is always masked
1119 const int con3 = con+con2;
1120 if( con3 < 32 ) // Only merge shifts if total is < 32
1121 return new (phase->C) URShiftINode( in(1)->in(1), phase->intcon(con3) );
1122 }
1123 }
1125 // Check for ((x << z) + Y) >>> z. Replace with x + con>>>z
1126 // The idiom for rounding to a power of 2 is "(Q+(2^z-1)) >>> z".
1127 // If Q is "X << z" the rounding is useless. Look for patterns like
1128 // ((X<<Z) + Y) >>> Z and replace with (X + Y>>>Z) & Z-mask.
1129 Node *add = in(1);
1130 if( in1_op == Op_AddI ) {
1131 Node *lshl = add->in(1);
1132 if( lshl->Opcode() == Op_LShiftI &&
1133 phase->type(lshl->in(2)) == t2 ) {
1134 Node *y_z = phase->transform( new (phase->C) URShiftINode(add->in(2),in(2)) );
1135 Node *sum = phase->transform( new (phase->C) AddINode( lshl->in(1), y_z ) );
1136 return new (phase->C) AndINode( sum, phase->intcon(mask) );
1137 }
1138 }
1140 // Check for (x & mask) >>> z. Replace with (x >>> z) & (mask >>> z)
1141 // This shortens the mask. Also, if we are extracting a high byte and
1142 // storing it to a buffer, the mask will be removed completely.
1143 Node *andi = in(1);
1144 if( in1_op == Op_AndI ) {
1145 const TypeInt *t3 = phase->type( andi->in(2) )->isa_int();
1146 if( t3 && t3->is_con() ) { // Right input is a constant
1147 jint mask2 = t3->get_con();
1148 mask2 >>= con; // *signed* shift downward (high-order zeroes do not help)
1149 Node *newshr = phase->transform( new (phase->C) URShiftINode(andi->in(1), in(2)) );
1150 return new (phase->C) AndINode(newshr, phase->intcon(mask2));
1151 // The negative values are easier to materialize than positive ones.
1152 // A typical case from address arithmetic is ((x & ~15) >> 4).
1153 // It's better to change that to ((x >> 4) & ~0) versus
1154 // ((x >> 4) & 0x0FFFFFFF). The difference is greatest in LP64.
1155 }
1156 }
1158 // Check for "(X << z ) >>> z" which simply zero-extends
1159 Node *shl = in(1);
1160 if( in1_op == Op_LShiftI &&
1161 phase->type(shl->in(2)) == t2 )
1162 return new (phase->C) AndINode( shl->in(1), phase->intcon(mask) );
1164 return NULL;
1165 }
1167 //------------------------------Value------------------------------------------
1168 // A URShiftINode shifts its input2 right by input1 amount.
1169 const Type *URShiftINode::Value( PhaseTransform *phase ) const {
1170 // (This is a near clone of RShiftINode::Value.)
1171 const Type *t1 = phase->type( in(1) );
1172 const Type *t2 = phase->type( in(2) );
1173 // Either input is TOP ==> the result is TOP
1174 if( t1 == Type::TOP ) return Type::TOP;
1175 if( t2 == Type::TOP ) return Type::TOP;
1177 // Left input is ZERO ==> the result is ZERO.
1178 if( t1 == TypeInt::ZERO ) return TypeInt::ZERO;
1179 // Shift by zero does nothing
1180 if( t2 == TypeInt::ZERO ) return t1;
1182 // Either input is BOTTOM ==> the result is BOTTOM
1183 if (t1 == Type::BOTTOM || t2 == Type::BOTTOM)
1184 return TypeInt::INT;
1186 if (t2 == TypeInt::INT)
1187 return TypeInt::INT;
1189 const TypeInt *r1 = t1->is_int(); // Handy access
1190 const TypeInt *r2 = t2->is_int(); // Handy access
1192 if (r2->is_con()) {
1193 uint shift = r2->get_con();
1194 shift &= BitsPerJavaInteger-1; // semantics of Java shifts
1195 // Shift by a multiple of 32 does nothing:
1196 if (shift == 0) return t1;
1197 // Calculate reasonably aggressive bounds for the result.
1198 jint lo = (juint)r1->_lo >> (juint)shift;
1199 jint hi = (juint)r1->_hi >> (juint)shift;
1200 if (r1->_hi >= 0 && r1->_lo < 0) {
1201 // If the type has both negative and positive values,
1202 // there are two separate sub-domains to worry about:
1203 // The positive half and the negative half.
1204 jint neg_lo = lo;
1205 jint neg_hi = (juint)-1 >> (juint)shift;
1206 jint pos_lo = (juint) 0 >> (juint)shift;
1207 jint pos_hi = hi;
1208 lo = MIN2(neg_lo, pos_lo); // == 0
1209 hi = MAX2(neg_hi, pos_hi); // == -1 >>> shift;
1210 }
1211 assert(lo <= hi, "must have valid bounds");
1212 const TypeInt* ti = TypeInt::make(lo, hi, MAX2(r1->_widen,r2->_widen));
1213 #ifdef ASSERT
1214 // Make sure we get the sign-capture idiom correct.
1215 if (shift == BitsPerJavaInteger-1) {
1216 if (r1->_lo >= 0) assert(ti == TypeInt::ZERO, ">>>31 of + is 0");
1217 if (r1->_hi < 0) assert(ti == TypeInt::ONE, ">>>31 of - is +1");
1218 }
1219 #endif
1220 return ti;
1221 }
1223 //
1224 // Do not support shifted oops in info for GC
1225 //
1226 // else if( t1->base() == Type::InstPtr ) {
1227 //
1228 // const TypeInstPtr *o = t1->is_instptr();
1229 // if( t1->singleton() )
1230 // return TypeInt::make( ((uint32)o->const_oop() + o->_offset) >> shift );
1231 // }
1232 // else if( t1->base() == Type::KlassPtr ) {
1233 // const TypeKlassPtr *o = t1->is_klassptr();
1234 // if( t1->singleton() )
1235 // return TypeInt::make( ((uint32)o->const_oop() + o->_offset) >> shift );
1236 // }
1238 return TypeInt::INT;
1239 }
1241 //=============================================================================
1242 //------------------------------Identity---------------------------------------
1243 Node *URShiftLNode::Identity( PhaseTransform *phase ) {
1244 const TypeInt *ti = phase->type( in(2) )->isa_int(); // shift count is an int
1245 return ( ti && ti->is_con() && ( ti->get_con() & ( BitsPerLong - 1 ) ) == 0 ) ? in(1) : this;
1246 }
1248 //------------------------------Ideal------------------------------------------
1249 Node *URShiftLNode::Ideal(PhaseGVN *phase, bool can_reshape) {
1250 const TypeInt *t2 = phase->type( in(2) )->isa_int();
1251 if( !t2 || !t2->is_con() ) return NULL; // Right input is a constant
1252 const int con = t2->get_con() & ( BitsPerLong - 1 ); // Shift count is always masked
1253 if ( con == 0 ) return NULL; // let Identity() handle a 0 shift count
1254 // note: mask computation below does not work for 0 shift count
1255 // We'll be wanting the right-shift amount as a mask of that many bits
1256 const jlong mask = (((jlong)CONST64(1) << (jlong)(BitsPerJavaLong - con)) -1);
1258 // Check for ((x << z) + Y) >>> z. Replace with x + con>>>z
1259 // The idiom for rounding to a power of 2 is "(Q+(2^z-1)) >>> z".
1260 // If Q is "X << z" the rounding is useless. Look for patterns like
1261 // ((X<<Z) + Y) >>> Z and replace with (X + Y>>>Z) & Z-mask.
1262 Node *add = in(1);
1263 if( add->Opcode() == Op_AddL ) {
1264 Node *lshl = add->in(1);
1265 if( lshl->Opcode() == Op_LShiftL &&
1266 phase->type(lshl->in(2)) == t2 ) {
1267 Node *y_z = phase->transform( new (phase->C) URShiftLNode(add->in(2),in(2)) );
1268 Node *sum = phase->transform( new (phase->C) AddLNode( lshl->in(1), y_z ) );
1269 return new (phase->C) AndLNode( sum, phase->longcon(mask) );
1270 }
1271 }
1273 // Check for (x & mask) >>> z. Replace with (x >>> z) & (mask >>> z)
1274 // This shortens the mask. Also, if we are extracting a high byte and
1275 // storing it to a buffer, the mask will be removed completely.
1276 Node *andi = in(1);
1277 if( andi->Opcode() == Op_AndL ) {
1278 const TypeLong *t3 = phase->type( andi->in(2) )->isa_long();
1279 if( t3 && t3->is_con() ) { // Right input is a constant
1280 jlong mask2 = t3->get_con();
1281 mask2 >>= con; // *signed* shift downward (high-order zeroes do not help)
1282 Node *newshr = phase->transform( new (phase->C) URShiftLNode(andi->in(1), in(2)) );
1283 return new (phase->C) AndLNode(newshr, phase->longcon(mask2));
1284 }
1285 }
1287 // Check for "(X << z ) >>> z" which simply zero-extends
1288 Node *shl = in(1);
1289 if( shl->Opcode() == Op_LShiftL &&
1290 phase->type(shl->in(2)) == t2 )
1291 return new (phase->C) AndLNode( shl->in(1), phase->longcon(mask) );
1293 return NULL;
1294 }
1296 //------------------------------Value------------------------------------------
1297 // A URShiftINode shifts its input2 right by input1 amount.
1298 const Type *URShiftLNode::Value( PhaseTransform *phase ) const {
1299 // (This is a near clone of RShiftLNode::Value.)
1300 const Type *t1 = phase->type( in(1) );
1301 const Type *t2 = phase->type( in(2) );
1302 // Either input is TOP ==> the result is TOP
1303 if( t1 == Type::TOP ) return Type::TOP;
1304 if( t2 == Type::TOP ) return Type::TOP;
1306 // Left input is ZERO ==> the result is ZERO.
1307 if( t1 == TypeLong::ZERO ) return TypeLong::ZERO;
1308 // Shift by zero does nothing
1309 if( t2 == TypeInt::ZERO ) return t1;
1311 // Either input is BOTTOM ==> the result is BOTTOM
1312 if (t1 == Type::BOTTOM || t2 == Type::BOTTOM)
1313 return TypeLong::LONG;
1315 if (t2 == TypeInt::INT)
1316 return TypeLong::LONG;
1318 const TypeLong *r1 = t1->is_long(); // Handy access
1319 const TypeInt *r2 = t2->is_int (); // Handy access
1321 if (r2->is_con()) {
1322 uint shift = r2->get_con();
1323 shift &= BitsPerJavaLong - 1; // semantics of Java shifts
1324 // Shift by a multiple of 64 does nothing:
1325 if (shift == 0) return t1;
1326 // Calculate reasonably aggressive bounds for the result.
1327 jlong lo = (julong)r1->_lo >> (juint)shift;
1328 jlong hi = (julong)r1->_hi >> (juint)shift;
1329 if (r1->_hi >= 0 && r1->_lo < 0) {
1330 // If the type has both negative and positive values,
1331 // there are two separate sub-domains to worry about:
1332 // The positive half and the negative half.
1333 jlong neg_lo = lo;
1334 jlong neg_hi = (julong)-1 >> (juint)shift;
1335 jlong pos_lo = (julong) 0 >> (juint)shift;
1336 jlong pos_hi = hi;
1337 //lo = MIN2(neg_lo, pos_lo); // == 0
1338 lo = neg_lo < pos_lo ? neg_lo : pos_lo;
1339 //hi = MAX2(neg_hi, pos_hi); // == -1 >>> shift;
1340 hi = neg_hi > pos_hi ? neg_hi : pos_hi;
1341 }
1342 assert(lo <= hi, "must have valid bounds");
1343 const TypeLong* tl = TypeLong::make(lo, hi, MAX2(r1->_widen,r2->_widen));
1344 #ifdef ASSERT
1345 // Make sure we get the sign-capture idiom correct.
1346 if (shift == BitsPerJavaLong - 1) {
1347 if (r1->_lo >= 0) assert(tl == TypeLong::ZERO, ">>>63 of + is 0");
1348 if (r1->_hi < 0) assert(tl == TypeLong::ONE, ">>>63 of - is +1");
1349 }
1350 #endif
1351 return tl;
1352 }
1354 return TypeLong::LONG; // Give up
1355 }