src/share/vm/c1/c1_LIRGenerator.cpp

changeset 7598
ddce0b7cee93
parent 7585
134cdf5e0b8a
child 7854
e8260b6328fb
child 7944
8dddcd728302
     1.1 --- a/src/share/vm/c1/c1_LIRGenerator.cpp	Fri Feb 20 17:05:39 2015 +0000
     1.2 +++ b/src/share/vm/c1/c1_LIRGenerator.cpp	Tue Feb 24 15:04:52 2015 -0500
     1.3 @@ -1,5 +1,5 @@
     1.4  /*
     1.5 - * Copyright (c) 2005, 2013, Oracle and/or its affiliates. All rights reserved.
     1.6 + * Copyright (c) 2005, 2015, Oracle and/or its affiliates. All rights reserved.
     1.7   * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
     1.8   *
     1.9   * This code is free software; you can redistribute it and/or modify it
    1.10 @@ -23,6 +23,7 @@
    1.11   */
    1.12  
    1.13  #include "precompiled.hpp"
    1.14 +#include "c1/c1_Defs.hpp"
    1.15  #include "c1/c1_Compilation.hpp"
    1.16  #include "c1/c1_FrameMap.hpp"
    1.17  #include "c1/c1_Instruction.hpp"
    1.18 @@ -46,10 +47,7 @@
    1.19  #define __ gen()->lir()->
    1.20  #endif
    1.21  
    1.22 -// TODO: ARM - Use some recognizable constant which still fits architectural constraints
    1.23 -#ifdef ARM
    1.24 -#define PATCHED_ADDR  (204)
    1.25 -#else
    1.26 +#ifndef PATCHED_ADDR
    1.27  #define PATCHED_ADDR  (max_jint)
    1.28  #endif
    1.29  
    1.30 @@ -1599,25 +1597,9 @@
    1.31    }
    1.32    assert(addr->is_register(), "must be a register at this point");
    1.33  
    1.34 -#ifdef ARM
    1.35 -  // TODO: ARM - move to platform-dependent code
    1.36 -  LIR_Opr tmp = FrameMap::R14_opr;
    1.37 -  if (VM_Version::supports_movw()) {
    1.38 -    __ move((LIR_Opr)card_table_base, tmp);
    1.39 -  } else {
    1.40 -    __ move(new LIR_Address(FrameMap::Rthread_opr, in_bytes(JavaThread::card_table_base_offset()), T_ADDRESS), tmp);
    1.41 -  }
    1.42 -
    1.43 -  CardTableModRefBS* ct = (CardTableModRefBS*)_bs;
    1.44 -  LIR_Address *card_addr = new LIR_Address(tmp, addr, (LIR_Address::Scale) -CardTableModRefBS::card_shift, 0, T_BYTE);
    1.45 -  if(((int)ct->byte_map_base & 0xff) == 0) {
    1.46 -    __ move(tmp, card_addr);
    1.47 -  } else {
    1.48 -    LIR_Opr tmp_zero = new_register(T_INT);
    1.49 -    __ move(LIR_OprFact::intConst(0), tmp_zero);
    1.50 -    __ move(tmp_zero, card_addr);
    1.51 -  }
    1.52 -#else // ARM
    1.53 +#ifdef CARDTABLEMODREF_POST_BARRIER_HELPER
    1.54 +  CardTableModRef_post_barrier_helper(addr, card_table_base);
    1.55 +#else
    1.56    LIR_Opr tmp = new_pointer_register();
    1.57    if (TwoOperandLIRForm) {
    1.58      __ move(addr, tmp);
    1.59 @@ -1633,7 +1615,7 @@
    1.60                new LIR_Address(tmp, load_constant(card_table_base),
    1.61                                T_BYTE));
    1.62    }
    1.63 -#endif // ARM
    1.64 +#endif
    1.65  }
    1.66  
    1.67  
    1.68 @@ -2121,7 +2103,7 @@
    1.69    } else {
    1.70  #ifdef X86
    1.71      addr = new LIR_Address(base_op, index_op, LIR_Address::Scale(log2_scale), 0, dst_type);
    1.72 -#elif defined(ARM)
    1.73 +#elif defined(GENERATE_ADDRESS_IS_PREFERRED)
    1.74      addr = generate_address(base_op, index_op, log2_scale, 0, dst_type);
    1.75  #else
    1.76      if (index_op->is_illegal() || log2_scale == 0) {
    1.77 @@ -2175,6 +2157,9 @@
    1.78    LIR_Opr base_op = base.result();
    1.79    LIR_Opr index_op = idx.result();
    1.80  
    1.81 +#ifdef GENERATE_ADDRESS_IS_PREFERRED
    1.82 +  LIR_Address* addr = generate_address(base_op, index_op, log2_scale, 0, x->basic_type());
    1.83 +#else
    1.84  #ifndef _LP64
    1.85    if (base_op->type() == T_LONG) {
    1.86      base_op = new_register(T_INT);
    1.87 @@ -2208,6 +2193,7 @@
    1.88    }
    1.89  
    1.90    LIR_Address* addr = new LIR_Address(base_op, index_op, x->basic_type());
    1.91 +#endif // !GENERATE_ADDRESS_IS_PREFERRED
    1.92    __ move(value.result(), addr);
    1.93  }
    1.94  

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