1.1 --- a/src/cpu/x86/vm/c1_Defs_x86.hpp Tue Aug 26 15:49:40 2008 -0700 1.2 +++ b/src/cpu/x86/vm/c1_Defs_x86.hpp Wed Aug 27 00:21:55 2008 -0700 1.3 @@ -36,27 +36,34 @@ 1.4 1.5 // registers 1.6 enum { 1.7 - pd_nof_cpu_regs_frame_map = 8, // number of registers used during code emission 1.8 - pd_nof_fpu_regs_frame_map = 8, // number of registers used during code emission 1.9 - pd_nof_xmm_regs_frame_map = 8, // number of registers used during code emission 1.10 - pd_nof_caller_save_cpu_regs_frame_map = 6, // number of registers killed by calls 1.11 - pd_nof_caller_save_fpu_regs_frame_map = 8, // number of registers killed by calls 1.12 - pd_nof_caller_save_xmm_regs_frame_map = 8, // number of registers killed by calls 1.13 + pd_nof_cpu_regs_frame_map = RegisterImpl::number_of_registers, // number of registers used during code emission 1.14 + pd_nof_fpu_regs_frame_map = FloatRegisterImpl::number_of_registers, // number of registers used during code emission 1.15 + pd_nof_xmm_regs_frame_map = XMMRegisterImpl::number_of_registers, // number of registers used during code emission 1.16 1.17 - pd_nof_cpu_regs_reg_alloc = 6, // number of registers that are visible to register allocator 1.18 +#ifdef _LP64 1.19 + #define UNALLOCATED 4 // rsp, rbp, r15, r10 1.20 +#else 1.21 + #define UNALLOCATED 2 // rsp, rbp 1.22 +#endif // LP64 1.23 + 1.24 + pd_nof_caller_save_cpu_regs_frame_map = pd_nof_cpu_regs_frame_map - UNALLOCATED, // number of registers killed by calls 1.25 + pd_nof_caller_save_fpu_regs_frame_map = pd_nof_fpu_regs_frame_map, // number of registers killed by calls 1.26 + pd_nof_caller_save_xmm_regs_frame_map = pd_nof_xmm_regs_frame_map, // number of registers killed by calls 1.27 + 1.28 + pd_nof_cpu_regs_reg_alloc = pd_nof_caller_save_cpu_regs_frame_map, // number of registers that are visible to register allocator 1.29 pd_nof_fpu_regs_reg_alloc = 6, // number of registers that are visible to register allocator 1.30 1.31 - pd_nof_cpu_regs_linearscan = 8, // number of registers visible to linear scan 1.32 - pd_nof_fpu_regs_linearscan = 8, // number of registers visible to linear scan 1.33 - pd_nof_xmm_regs_linearscan = 8, // number of registers visible to linear scan 1.34 + pd_nof_cpu_regs_linearscan = pd_nof_cpu_regs_frame_map, // number of registers visible to linear scan 1.35 + pd_nof_fpu_regs_linearscan = pd_nof_fpu_regs_frame_map, // number of registers visible to linear scan 1.36 + pd_nof_xmm_regs_linearscan = pd_nof_xmm_regs_frame_map, // number of registers visible to linear scan 1.37 pd_first_cpu_reg = 0, 1.38 - pd_last_cpu_reg = 5, 1.39 + pd_last_cpu_reg = NOT_LP64(5) LP64_ONLY(11), 1.40 pd_first_byte_reg = 2, 1.41 pd_last_byte_reg = 5, 1.42 pd_first_fpu_reg = pd_nof_cpu_regs_frame_map, 1.43 pd_last_fpu_reg = pd_first_fpu_reg + 7, 1.44 pd_first_xmm_reg = pd_nof_cpu_regs_frame_map + pd_nof_fpu_regs_frame_map, 1.45 - pd_last_xmm_reg = pd_first_xmm_reg + 7 1.46 + pd_last_xmm_reg = pd_first_xmm_reg + pd_nof_xmm_regs_frame_map - 1 1.47 }; 1.48 1.49