src/cpu/ppc/vm/macroAssembler_ppc.cpp

changeset 6501
c668f307a4c0
parent 6495
67fa91961822
child 6511
31e80afe3fed
     1.1 --- a/src/cpu/ppc/vm/macroAssembler_ppc.cpp	Mon Jan 06 11:02:21 2014 +0100
     1.2 +++ b/src/cpu/ppc/vm/macroAssembler_ppc.cpp	Tue Jan 07 17:24:59 2014 +0100
     1.3 @@ -206,7 +206,7 @@
     1.4    // The relocation points to the second instruction, the ori,
     1.5    // and the ori reads and writes the same register dst.
     1.6    const int dst = inv_rta_field(inst2);
     1.7 -  assert(is_ori(inst2) && inv_rs_field(inst2) == dst, "must be addi reading and writing dst");
     1.8 +  assert(is_ori(inst2) && inv_rs_field(inst2) == dst, "must be ori reading and writing dst");
     1.9    // Now, find the preceding addis which writes to dst.
    1.10    int inst1 = 0;
    1.11    address inst1_addr = inst2_addr - BytesPerInstWord;
    1.12 @@ -222,8 +222,7 @@
    1.13    int xd = (data >>  0) & 0xffff;
    1.14  
    1.15    set_imm((int *)inst1_addr, (short)(xc)); // see enc_load_con_narrow_hi/_lo
    1.16 -  set_imm((int *)inst2_addr, (short)(xd));
    1.17 -
    1.18 +  set_imm((int *)inst2_addr,        (xd)); // unsigned int
    1.19    return (int)((intptr_t)inst2_addr - (intptr_t)inst1_addr);
    1.20  }
    1.21  
    1.22 @@ -237,7 +236,7 @@
    1.23    // The relocation points to the second instruction, the ori,
    1.24    // and the ori reads and writes the same register dst.
    1.25    const int dst = inv_rta_field(inst2);
    1.26 -  assert(is_ori(inst2) && inv_rs_field(inst2) == dst, "must be addi reading and writing dst");
    1.27 +  assert(is_ori(inst2) && inv_rs_field(inst2) == dst, "must be ori reading and writing dst");
    1.28    // Now, find the preceding lis which writes to dst.
    1.29    int inst1 = 0;
    1.30    address inst1_addr = inst2_addr - BytesPerInstWord;
    1.31 @@ -996,10 +995,10 @@
    1.32  
    1.33        bool has_env = (fd != NULL && fd->env() != NULL);
    1.34        return branch_to(R11, /*and_link=*/true,
    1.35 -                                /*save toc=*/false,
    1.36 -                                /*restore toc=*/false,
    1.37 -                                /*load toc=*/true,
    1.38 -                                /*load env=*/has_env);
    1.39 +                            /*save toc=*/false,
    1.40 +                            /*restore toc=*/false,
    1.41 +                            /*load toc=*/true,
    1.42 +                            /*load env=*/has_env);
    1.43      } else {
    1.44        // It's a friend function. Load the entry point and don't care about
    1.45        // toc and env. Use an optimizable call instruction, but ensure the
    1.46 @@ -1020,10 +1019,10 @@
    1.47        // so do a full call-c here.
    1.48        load_const(R11, (address)fd, R0);
    1.49        return branch_to(R11, /*and_link=*/true,
    1.50 -                                /*save toc=*/false,
    1.51 -                                /*restore toc=*/false,
    1.52 -                                /*load toc=*/true,
    1.53 -                                /*load env=*/true);
    1.54 +                            /*save toc=*/false,
    1.55 +                            /*restore toc=*/false,
    1.56 +                            /*load toc=*/true,
    1.57 +                            /*load env=*/true);
    1.58      } else {
    1.59        // it's a friend function, load the entry point and don't care about
    1.60        // toc and env.
    1.61 @@ -1967,12 +1966,13 @@
    1.62    // Must fence, otherwise, preceding store(s) may float below cmpxchg.
    1.63    // Compare object markOop with mark and if equal exchange scratch1 with object markOop.
    1.64    // CmpxchgX sets cr_reg to cmpX(current, displaced).
    1.65 +  membar(Assembler::StoreStore);
    1.66    cmpxchgd(/*flag=*/flag,
    1.67             /*current_value=*/current_header,
    1.68             /*compare_value=*/displaced_header,
    1.69             /*exchange_value=*/box,
    1.70             /*where=*/oop,
    1.71 -           MacroAssembler::MemBarRel | MacroAssembler::MemBarAcq,
    1.72 +           MacroAssembler::MemBarAcq,
    1.73             MacroAssembler::cmpxchgx_hint_acquire_lock(),
    1.74             noreg,
    1.75             &cas_failed);
    1.76 @@ -2158,7 +2158,7 @@
    1.77    load_const_optimized(Rtmp, (address)byte_map_base, R0);
    1.78    srdi(Robj, Robj, CardTableModRefBS::card_shift);
    1.79    li(R0, 0); // dirty
    1.80 -  if (UseConcMarkSweepGC) release();
    1.81 +  if (UseConcMarkSweepGC) membar(Assembler::StoreStore);
    1.82    stbx(R0, Rtmp, Robj);
    1.83  }
    1.84  
    1.85 @@ -2399,15 +2399,17 @@
    1.86  
    1.87  
    1.88  void MacroAssembler::encode_klass_not_null(Register dst, Register src) {
    1.89 -  if (src == noreg) src = dst;
    1.90 +  Register current = (src != noreg) ? src : dst; // Klass is in dst if no src provided.
    1.91    if (Universe::narrow_klass_base() != 0) {
    1.92 -    load_const(R0, Universe::narrow_klass_base());
    1.93 -    sub(dst, src, R0);
    1.94 +    load_const(R0, Universe::narrow_klass_base(), (dst != current) ? dst : noreg); // Use dst as temp if it is free.
    1.95 +    sub(dst, current, R0);
    1.96 +    current = dst;
    1.97    }
    1.98 -  if (Universe::narrow_klass_shift() != 0 ||
    1.99 -      Universe::narrow_klass_base() == 0 && src != dst) {  // Move required.
   1.100 -    srdi(dst, src, Universe::narrow_klass_shift());
   1.101 +  if (Universe::narrow_klass_shift() != 0) {
   1.102 +    srdi(dst, current, Universe::narrow_klass_shift());
   1.103 +    current = dst;
   1.104    }
   1.105 +  mr_if_needed(dst, current); // Move may be required.
   1.106  }
   1.107  
   1.108  void MacroAssembler::store_klass(Register dst_oop, Register klass, Register ck) {

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