1.1 --- a/src/cpu/x86/vm/x86_64.ad Wed May 21 10:45:07 2008 -0700 1.2 +++ b/src/cpu/x86/vm/x86_64.ad Wed May 21 13:46:23 2008 -0700 1.3 @@ -6063,7 +6063,6 @@ 1.4 instruct loadKlass(rRegP dst, memory mem) 1.5 %{ 1.6 match(Set dst (LoadKlass mem)); 1.7 - predicate(!n->in(MemNode::Address)->bottom_type()->is_ptr_to_narrowoop()); 1.8 1.9 ins_cost(125); // XXX 1.10 format %{ "movq $dst, $mem\t# class" %} 1.11 @@ -6072,23 +6071,17 @@ 1.12 ins_pipe(ialu_reg_mem); // XXX 1.13 %} 1.14 1.15 -// Load Klass Pointer 1.16 -instruct loadKlassComp(rRegP dst, memory mem, rFlagsReg cr) 1.17 -%{ 1.18 - match(Set dst (LoadKlass mem)); 1.19 - predicate(n->in(MemNode::Address)->bottom_type()->is_ptr_to_narrowoop()); 1.20 - effect(KILL cr); 1.21 +// Load narrow Klass Pointer 1.22 +instruct loadNKlass(rRegN dst, memory mem) 1.23 +%{ 1.24 + match(Set dst (LoadNKlass mem)); 1.25 1.26 ins_cost(125); // XXX 1.27 - format %{ "movl $dst, $mem\t# compressed class\n\t" 1.28 - "decode_heap_oop $dst,$dst" %} 1.29 + format %{ "movl $dst, $mem\t# compressed klass ptr\n\t" %} 1.30 ins_encode %{ 1.31 Address addr = build_address($mem$$base, $mem$$index, $mem$$scale, $mem$$disp); 1.32 Register dst = as_Register($dst$$reg); 1.33 __ movl(dst, addr); 1.34 - // klass is never null in the header but this is generated for all 1.35 - // klass loads not just the _klass field in the header. 1.36 - __ decode_heap_oop(dst); 1.37 %} 1.38 ins_pipe(ialu_reg_mem); // XXX 1.39 %} 1.40 @@ -6358,21 +6351,18 @@ 1.41 ins_pipe(ialu_reg); 1.42 %} 1.43 1.44 -instruct loadConN(rRegN dst, immN src, rFlagsReg cr) %{ 1.45 +instruct loadConN(rRegN dst, immN src) %{ 1.46 match(Set dst src); 1.47 - effect(KILL cr); 1.48 1.49 ins_cost(125); 1.50 - format %{ "movq $dst, $src\t# compressed ptr\n\t" 1.51 - "encode_heap_oop_not_null $dst,$dst" %} 1.52 + format %{ "movl $dst, $src\t# compressed ptr" %} 1.53 ins_encode %{ 1.54 address con = (address)$src$$constant; 1.55 Register dst = $dst$$Register; 1.56 if (con == NULL) { 1.57 ShouldNotReachHere(); 1.58 } else { 1.59 - __ movoop(dst, (jobject)$src$$constant); 1.60 - __ encode_heap_oop_not_null(dst); 1.61 + __ set_narrow_oop(dst, (jobject)$src$$constant); 1.62 } 1.63 %} 1.64 ins_pipe(ialu_reg_fat); // XXX 1.65 @@ -6639,7 +6629,7 @@ 1.66 match(Set mem (StoreN mem src)); 1.67 1.68 ins_cost(125); // XXX 1.69 - format %{ "movl $mem, $src\t# ptr" %} 1.70 + format %{ "movl $mem, $src\t# compressed ptr" %} 1.71 ins_encode %{ 1.72 Address addr = build_address($mem$$base, $mem$$index, $mem$$scale, $mem$$disp); 1.73 Register src = as_Register($src$$reg); 1.74 @@ -7143,6 +7133,30 @@ 1.75 %} 1.76 1.77 // Conditional move 1.78 +instruct cmovN_reg(rRegN dst, rRegN src, rFlagsReg cr, cmpOp cop) 1.79 +%{ 1.80 + match(Set dst (CMoveN (Binary cop cr) (Binary dst src))); 1.81 + 1.82 + ins_cost(200); // XXX 1.83 + format %{ "cmovl$cop $dst, $src\t# signed, compressed ptr" %} 1.84 + opcode(0x0F, 0x40); 1.85 + ins_encode(REX_reg_reg(dst, src), enc_cmov(cop), reg_reg(dst, src)); 1.86 + ins_pipe(pipe_cmov_reg); 1.87 +%} 1.88 + 1.89 +// Conditional move 1.90 +instruct cmovN_regU(rRegN dst, rRegN src, rFlagsRegU cr, cmpOpU cop) 1.91 +%{ 1.92 + match(Set dst (CMoveN (Binary cop cr) (Binary dst src))); 1.93 + 1.94 + ins_cost(200); // XXX 1.95 + format %{ "cmovl$cop $dst, $src\t# unsigned, compressed ptr" %} 1.96 + opcode(0x0F, 0x40); 1.97 + ins_encode(REX_reg_reg(dst, src), enc_cmov(cop), reg_reg(dst, src)); 1.98 + ins_pipe(pipe_cmov_reg); 1.99 +%} 1.100 + 1.101 +// Conditional move 1.102 instruct cmovP_reg(rRegP dst, rRegP src, rFlagsReg cr, cmpOp cop) 1.103 %{ 1.104 match(Set dst (CMoveP (Binary cop cr) (Binary dst src))); 1.105 @@ -11055,14 +11069,50 @@ 1.106 ins_pipe(ialu_cr_reg_imm); 1.107 %} 1.108 1.109 + 1.110 +instruct compN_rReg(rFlagsRegU cr, rRegN op1, rRegN op2) 1.111 +%{ 1.112 + match(Set cr (CmpN op1 op2)); 1.113 + 1.114 + format %{ "cmpl $op1, $op2\t# compressed ptr" %} 1.115 + ins_encode %{ __ cmpl(as_Register($op1$$reg), as_Register($op2$$reg)); %} 1.116 + ins_pipe(ialu_cr_reg_reg); 1.117 +%} 1.118 + 1.119 +instruct compN_rReg_mem(rFlagsRegU cr, rRegN src, memory mem) 1.120 +%{ 1.121 + match(Set cr (CmpN src (LoadN mem))); 1.122 + 1.123 + ins_cost(500); // XXX 1.124 + format %{ "cmpl $src, mem\t# compressed ptr" %} 1.125 + ins_encode %{ 1.126 + Address adr = build_address($mem$$base, $mem$$index, $mem$$scale, $mem$$disp); 1.127 + __ cmpl(as_Register($src$$reg), adr); 1.128 + %} 1.129 + ins_pipe(ialu_cr_reg_mem); 1.130 +%} 1.131 + 1.132 instruct testN_reg(rFlagsReg cr, rRegN src, immN0 zero) %{ 1.133 match(Set cr (CmpN src zero)); 1.134 1.135 - format %{ "testl $src, $src" %} 1.136 + format %{ "testl $src, $src\t# compressed ptr" %} 1.137 ins_encode %{ __ testl($src$$Register, $src$$Register); %} 1.138 ins_pipe(ialu_cr_reg_imm); 1.139 %} 1.140 1.141 +instruct testN_reg_mem(rFlagsReg cr, memory mem, immN0 zero) 1.142 +%{ 1.143 + match(Set cr (CmpN (LoadN mem) zero)); 1.144 + 1.145 + ins_cost(500); // XXX 1.146 + format %{ "testl $mem, 0xffffffff\t# compressed ptr" %} 1.147 + ins_encode %{ 1.148 + Address addr = build_address($mem$$base, $mem$$index, $mem$$scale, $mem$$disp); 1.149 + __ cmpl(addr, (int)0xFFFFFFFF); 1.150 + %} 1.151 + ins_pipe(ialu_cr_reg_mem); 1.152 +%} 1.153 + 1.154 // Yanked all unsigned pointer compare operations. 1.155 // Pointer compares are done with CmpP which is already unsigned. 1.156