src/cpu/x86/vm/c1_Runtime1_x86.cpp

changeset 1082
bd441136a5ce
parent 1014
0fbdb4381b99
parent 1079
c517646eef23
child 1730
3cf667df43ef
     1.1 --- a/src/cpu/x86/vm/c1_Runtime1_x86.cpp	Wed Mar 18 11:37:48 2009 -0400
     1.2 +++ b/src/cpu/x86/vm/c1_Runtime1_x86.cpp	Thu Mar 19 09:13:24 2009 -0700
     1.3 @@ -1354,6 +1354,13 @@
     1.4  
     1.5      case slow_subtype_check_id:
     1.6        {
     1.7 +        // Typical calling sequence:
     1.8 +        // __ push(klass_RInfo);  // object klass or other subclass
     1.9 +        // __ push(sup_k_RInfo);  // array element klass or other superclass
    1.10 +        // __ call(slow_subtype_check);
    1.11 +        // Note that the subclass is pushed first, and is therefore deepest.
    1.12 +        // Previous versions of this code reversed the names 'sub' and 'super'.
    1.13 +        // This was operationally harmless but made the code unreadable.
    1.14          enum layout {
    1.15            rax_off, SLOT2(raxH_off)
    1.16            rcx_off, SLOT2(rcxH_off)
    1.17 @@ -1361,9 +1368,10 @@
    1.18            rdi_off, SLOT2(rdiH_off)
    1.19            // saved_rbp_off, SLOT2(saved_rbpH_off)
    1.20            return_off, SLOT2(returnH_off)
    1.21 -          sub_off, SLOT2(subH_off)
    1.22 -          super_off, SLOT2(superH_off)
    1.23 -          framesize
    1.24 +          sup_k_off, SLOT2(sup_kH_off)
    1.25 +          klass_off, SLOT2(superH_off)
    1.26 +          framesize,
    1.27 +          result_off = klass_off  // deepest argument is also the return value
    1.28          };
    1.29  
    1.30          __ set_info("slow_subtype_check", dont_gc_arguments);
    1.31 @@ -1373,19 +1381,14 @@
    1.32          __ push(rax);
    1.33  
    1.34          // This is called by pushing args and not with C abi
    1.35 -        __ movptr(rsi, Address(rsp, (super_off) * VMRegImpl::stack_slot_size)); // super
    1.36 -        __ movptr(rax, Address(rsp, (sub_off  ) * VMRegImpl::stack_slot_size)); // sub
    1.37 -
    1.38 -        __ movptr(rdi,Address(rsi,sizeof(oopDesc) + Klass::secondary_supers_offset_in_bytes()));
    1.39 -        // since size is postive movl does right thing on 64bit
    1.40 -        __ movl(rcx, Address(rdi, arrayOopDesc::length_offset_in_bytes()));
    1.41 -        __ addptr(rdi, arrayOopDesc::base_offset_in_bytes(T_OBJECT));
    1.42 +        __ movptr(rsi, Address(rsp, (klass_off) * VMRegImpl::stack_slot_size)); // subclass
    1.43 +        __ movptr(rax, Address(rsp, (sup_k_off) * VMRegImpl::stack_slot_size)); // superclass
    1.44  
    1.45          Label miss;
    1.46 -        __ repne_scan();
    1.47 -        __ jcc(Assembler::notEqual, miss);
    1.48 -        __ movptr(Address(rsi,sizeof(oopDesc) + Klass::secondary_super_cache_offset_in_bytes()), rax);
    1.49 -        __ movptr(Address(rsp, (super_off) * VMRegImpl::stack_slot_size), 1); // result
    1.50 +        __ check_klass_subtype_slow_path(rsi, rax, rcx, rdi, NULL, &miss);
    1.51 +
    1.52 +        // fallthrough on success:
    1.53 +        __ movptr(Address(rsp, (result_off) * VMRegImpl::stack_slot_size), 1); // result
    1.54          __ pop(rax);
    1.55          __ pop(rcx);
    1.56          __ pop(rsi);
    1.57 @@ -1393,7 +1396,7 @@
    1.58          __ ret(0);
    1.59  
    1.60          __ bind(miss);
    1.61 -        __ movptr(Address(rsp, (super_off) * VMRegImpl::stack_slot_size), NULL_WORD); // result
    1.62 +        __ movptr(Address(rsp, (result_off) * VMRegImpl::stack_slot_size), NULL_WORD); // result
    1.63          __ pop(rax);
    1.64          __ pop(rcx);
    1.65          __ pop(rsi);

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