src/cpu/sparc/vm/c1_LIRAssembler_sparc.cpp

changeset 9614
bb44c0e88235
parent 8563
a3ede966ecfe
child 9637
eef07cd490d4
child 9841
2e636385f137
     1.1 --- a/src/cpu/sparc/vm/c1_LIRAssembler_sparc.cpp	Wed Feb 06 17:32:25 2019 +0100
     1.2 +++ b/src/cpu/sparc/vm/c1_LIRAssembler_sparc.cpp	Wed Feb 06 11:41:51 2019 +0100
     1.3 @@ -579,7 +579,7 @@
     1.4          __ and3(Rscratch, divisor - 1, Rscratch);
     1.5        }
     1.6        __ add(Rdividend, Rscratch, Rscratch);
     1.7 -      __ sra(Rscratch, log2_intptr(divisor), Rresult);
     1.8 +      __ sra(Rscratch, log2_int(divisor), Rresult);
     1.9        return;
    1.10      } else {
    1.11        if (divisor == 2) {

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