1.1 --- /dev/null Thu Jan 01 00:00:00 1970 +0000
1.2 +++ b/src/cpu/x86/vm/c1_FrameMap_x86.cpp Sat Dec 01 00:00:00 2007 +0000
1.3 @@ -0,0 +1,225 @@
1.4 +/*
1.5 + * Copyright 1999-2006 Sun Microsystems, Inc. All Rights Reserved.
1.6 + * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
1.7 + *
1.8 + * This code is free software; you can redistribute it and/or modify it
1.9 + * under the terms of the GNU General Public License version 2 only, as
1.10 + * published by the Free Software Foundation.
1.11 + *
1.12 + * This code is distributed in the hope that it will be useful, but WITHOUT
1.13 + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
1.14 + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
1.15 + * version 2 for more details (a copy is included in the LICENSE file that
1.16 + * accompanied this code).
1.17 + *
1.18 + * You should have received a copy of the GNU General Public License version
1.19 + * 2 along with this work; if not, write to the Free Software Foundation,
1.20 + * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
1.21 + *
1.22 + * Please contact Sun Microsystems, Inc., 4150 Network Circle, Santa Clara,
1.23 + * CA 95054 USA or visit www.sun.com if you need additional information or
1.24 + * have any questions.
1.25 + *
1.26 + */
1.27 +
1.28 +# include "incls/_precompiled.incl"
1.29 +# include "incls/_c1_FrameMap_x86.cpp.incl"
1.30 +
1.31 +const int FrameMap::pd_c_runtime_reserved_arg_size = 0;
1.32 +
1.33 +LIR_Opr FrameMap::map_to_opr(BasicType type, VMRegPair* reg, bool) {
1.34 + LIR_Opr opr = LIR_OprFact::illegalOpr;
1.35 + VMReg r_1 = reg->first();
1.36 + VMReg r_2 = reg->second();
1.37 + if (r_1->is_stack()) {
1.38 + // Convert stack slot to an SP offset
1.39 + // The calling convention does not count the SharedRuntime::out_preserve_stack_slots() value
1.40 + // so we must add it in here.
1.41 + int st_off = (r_1->reg2stack() + SharedRuntime::out_preserve_stack_slots()) * VMRegImpl::stack_slot_size;
1.42 + opr = LIR_OprFact::address(new LIR_Address(rsp_opr, st_off, type));
1.43 + } else if (r_1->is_Register()) {
1.44 + Register reg = r_1->as_Register();
1.45 + if (r_2->is_Register()) {
1.46 + Register reg2 = r_2->as_Register();
1.47 + opr = as_long_opr(reg2, reg);
1.48 + } else if (type == T_OBJECT) {
1.49 + opr = as_oop_opr(reg);
1.50 + } else {
1.51 + opr = as_opr(reg);
1.52 + }
1.53 + } else if (r_1->is_FloatRegister()) {
1.54 + assert(type == T_DOUBLE || type == T_FLOAT, "wrong type");
1.55 + int num = r_1->as_FloatRegister()->encoding();
1.56 + if (type == T_FLOAT) {
1.57 + opr = LIR_OprFact::single_fpu(num);
1.58 + } else {
1.59 + opr = LIR_OprFact::double_fpu(num);
1.60 + }
1.61 + } else if (r_1->is_XMMRegister()) {
1.62 + assert(type == T_DOUBLE || type == T_FLOAT, "wrong type");
1.63 + int num = r_1->as_XMMRegister()->encoding();
1.64 + if (type == T_FLOAT) {
1.65 + opr = LIR_OprFact::single_xmm(num);
1.66 + } else {
1.67 + opr = LIR_OprFact::double_xmm(num);
1.68 + }
1.69 + } else {
1.70 + ShouldNotReachHere();
1.71 + }
1.72 + return opr;
1.73 +}
1.74 +
1.75 +
1.76 +LIR_Opr FrameMap::rsi_opr;
1.77 +LIR_Opr FrameMap::rdi_opr;
1.78 +LIR_Opr FrameMap::rbx_opr;
1.79 +LIR_Opr FrameMap::rax_opr;
1.80 +LIR_Opr FrameMap::rdx_opr;
1.81 +LIR_Opr FrameMap::rcx_opr;
1.82 +LIR_Opr FrameMap::rsp_opr;
1.83 +LIR_Opr FrameMap::rbp_opr;
1.84 +
1.85 +LIR_Opr FrameMap::receiver_opr;
1.86 +
1.87 +LIR_Opr FrameMap::rsi_oop_opr;
1.88 +LIR_Opr FrameMap::rdi_oop_opr;
1.89 +LIR_Opr FrameMap::rbx_oop_opr;
1.90 +LIR_Opr FrameMap::rax_oop_opr;
1.91 +LIR_Opr FrameMap::rdx_oop_opr;
1.92 +LIR_Opr FrameMap::rcx_oop_opr;
1.93 +
1.94 +LIR_Opr FrameMap::rax_rdx_long_opr;
1.95 +LIR_Opr FrameMap::rbx_rcx_long_opr;
1.96 +LIR_Opr FrameMap::fpu0_float_opr;
1.97 +LIR_Opr FrameMap::fpu0_double_opr;
1.98 +LIR_Opr FrameMap::xmm0_float_opr;
1.99 +LIR_Opr FrameMap::xmm0_double_opr;
1.100 +
1.101 +LIR_Opr FrameMap::_caller_save_cpu_regs[] = { 0, };
1.102 +LIR_Opr FrameMap::_caller_save_fpu_regs[] = { 0, };
1.103 +LIR_Opr FrameMap::_caller_save_xmm_regs[] = { 0, };
1.104 +
1.105 +XMMRegister FrameMap::_xmm_regs [8] = { 0, };
1.106 +
1.107 +XMMRegister FrameMap::nr2xmmreg(int rnr) {
1.108 + assert(_init_done, "tables not initialized");
1.109 + return _xmm_regs[rnr];
1.110 +}
1.111 +
1.112 +//--------------------------------------------------------
1.113 +// FrameMap
1.114 +//--------------------------------------------------------
1.115 +
1.116 +void FrameMap::init() {
1.117 + if (_init_done) return;
1.118 +
1.119 + assert(nof_cpu_regs == 8, "wrong number of CPU registers");
1.120 + map_register(0, rsi); rsi_opr = LIR_OprFact::single_cpu(0); rsi_oop_opr = LIR_OprFact::single_cpu_oop(0);
1.121 + map_register(1, rdi); rdi_opr = LIR_OprFact::single_cpu(1); rdi_oop_opr = LIR_OprFact::single_cpu_oop(1);
1.122 + map_register(2, rbx); rbx_opr = LIR_OprFact::single_cpu(2); rbx_oop_opr = LIR_OprFact::single_cpu_oop(2);
1.123 + map_register(3, rax); rax_opr = LIR_OprFact::single_cpu(3); rax_oop_opr = LIR_OprFact::single_cpu_oop(3);
1.124 + map_register(4, rdx); rdx_opr = LIR_OprFact::single_cpu(4); rdx_oop_opr = LIR_OprFact::single_cpu_oop(4);
1.125 + map_register(5, rcx); rcx_opr = LIR_OprFact::single_cpu(5); rcx_oop_opr = LIR_OprFact::single_cpu_oop(5);
1.126 + map_register(6, rsp); rsp_opr = LIR_OprFact::single_cpu(6);
1.127 + map_register(7, rbp); rbp_opr = LIR_OprFact::single_cpu(7);
1.128 +
1.129 + rax_rdx_long_opr = LIR_OprFact::double_cpu(3 /*eax*/, 4 /*edx*/);
1.130 + rbx_rcx_long_opr = LIR_OprFact::double_cpu(2 /*ebx*/, 5 /*ecx*/);
1.131 + fpu0_float_opr = LIR_OprFact::single_fpu(0);
1.132 + fpu0_double_opr = LIR_OprFact::double_fpu(0);
1.133 + xmm0_float_opr = LIR_OprFact::single_xmm(0);
1.134 + xmm0_double_opr = LIR_OprFact::double_xmm(0);
1.135 +
1.136 + _caller_save_cpu_regs[0] = rsi_opr;
1.137 + _caller_save_cpu_regs[1] = rdi_opr;
1.138 + _caller_save_cpu_regs[2] = rbx_opr;
1.139 + _caller_save_cpu_regs[3] = rax_opr;
1.140 + _caller_save_cpu_regs[4] = rdx_opr;
1.141 + _caller_save_cpu_regs[5] = rcx_opr;
1.142 +
1.143 +
1.144 + _xmm_regs[0] = xmm0;
1.145 + _xmm_regs[1] = xmm1;
1.146 + _xmm_regs[2] = xmm2;
1.147 + _xmm_regs[3] = xmm3;
1.148 + _xmm_regs[4] = xmm4;
1.149 + _xmm_regs[5] = xmm5;
1.150 + _xmm_regs[6] = xmm6;
1.151 + _xmm_regs[7] = xmm7;
1.152 +
1.153 + for (int i = 0; i < 8; i++) {
1.154 + _caller_save_fpu_regs[i] = LIR_OprFact::single_fpu(i);
1.155 + _caller_save_xmm_regs[i] = LIR_OprFact::single_xmm(i);
1.156 + }
1.157 +
1.158 + _init_done = true;
1.159 +
1.160 + VMRegPair regs;
1.161 + BasicType sig_bt = T_OBJECT;
1.162 + SharedRuntime::java_calling_convention(&sig_bt, ®s, 1, true);
1.163 + receiver_opr = as_oop_opr(regs.first()->as_Register());
1.164 + assert(receiver_opr == rcx_oop_opr, "rcvr ought to be rcx");
1.165 +}
1.166 +
1.167 +
1.168 +Address FrameMap::make_new_address(ByteSize sp_offset) const {
1.169 + // for rbp, based address use this:
1.170 + // return Address(rbp, in_bytes(sp_offset) - (framesize() - 2) * 4);
1.171 + return Address(rsp, in_bytes(sp_offset));
1.172 +}
1.173 +
1.174 +
1.175 +// ----------------mapping-----------------------
1.176 +// all mapping is based on rbp, addressing, except for simple leaf methods where we access
1.177 +// the locals rsp based (and no frame is built)
1.178 +
1.179 +
1.180 +// Frame for simple leaf methods (quick entries)
1.181 +//
1.182 +// +----------+
1.183 +// | ret addr | <- TOS
1.184 +// +----------+
1.185 +// | args |
1.186 +// | ...... |
1.187 +
1.188 +// Frame for standard methods
1.189 +//
1.190 +// | .........| <- TOS
1.191 +// | locals |
1.192 +// +----------+
1.193 +// | old rbp, | <- EBP
1.194 +// +----------+
1.195 +// | ret addr |
1.196 +// +----------+
1.197 +// | args |
1.198 +// | .........|
1.199 +
1.200 +
1.201 +// For OopMaps, map a local variable or spill index to an VMRegImpl name.
1.202 +// This is the offset from sp() in the frame of the slot for the index,
1.203 +// skewed by VMRegImpl::stack0 to indicate a stack location (vs.a register.)
1.204 +//
1.205 +// framesize +
1.206 +// stack0 stack0 0 <- VMReg
1.207 +// | | <registers> |
1.208 +// ...........|..............|.............|
1.209 +// 0 1 2 3 x x 4 5 6 ... | <- local indices
1.210 +// ^ ^ sp() ( x x indicate link
1.211 +// | | and return addr)
1.212 +// arguments non-argument locals
1.213 +
1.214 +
1.215 +VMReg FrameMap::fpu_regname (int n) {
1.216 + // Return the OptoReg name for the fpu stack slot "n"
1.217 + // A spilled fpu stack slot comprises to two single-word OptoReg's.
1.218 + return as_FloatRegister(n)->as_VMReg();
1.219 +}
1.220 +
1.221 +LIR_Opr FrameMap::stack_pointer() {
1.222 + return FrameMap::rsp_opr;
1.223 +}
1.224 +
1.225 +
1.226 +bool FrameMap::validate_frame() {
1.227 + return true;
1.228 +}
