1.1 --- a/src/os_cpu/solaris_x86/vm/solaris_x86_32.ad Thu Feb 16 11:33:49 2012 -0800
1.2 +++ b/src/os_cpu/solaris_x86/vm/solaris_x86_32.ad Thu Feb 16 17:12:49 2012 -0800
1.3 @@ -1,5 +1,5 @@
1.4 //
1.5 -// Copyright (c) 1999, 2008, Oracle and/or its affiliates. All rights reserved.
1.6 +// Copyright (c) 1999, 2012, Oracle and/or its affiliates. All rights reserved.
1.7 // DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
1.8 //
1.9 // This code is free software; you can redistribute it and/or modify it
1.10 @@ -24,144 +24,3 @@
1.11
1.12 // X86 Solaris Architecture Description File
1.13
1.14 -//----------OS-DEPENDENT ENCODING BLOCK-----------------------------------------------------
1.15 -// This block specifies the encoding classes used by the compiler to output
1.16 -// byte streams. Encoding classes generate functions which are called by
1.17 -// Machine Instruction Nodes in order to generate the bit encoding of the
1.18 -// instruction. Operands specify their base encoding interface with the
1.19 -// interface keyword. There are currently supported four interfaces,
1.20 -// REG_INTER, CONST_INTER, MEMORY_INTER, & COND_INTER. REG_INTER causes an
1.21 -// operand to generate a function which returns its register number when
1.22 -// queried. CONST_INTER causes an operand to generate a function which
1.23 -// returns the value of the constant when queried. MEMORY_INTER causes an
1.24 -// operand to generate four functions which return the Base Register, the
1.25 -// Index Register, the Scale Value, and the Offset Value of the operand when
1.26 -// queried. COND_INTER causes an operand to generate six functions which
1.27 -// return the encoding code (ie - encoding bits for the instruction)
1.28 -// associated with each basic boolean condition for a conditional instruction.
1.29 -// Instructions specify two basic values for encoding. They use the
1.30 -// ins_encode keyword to specify their encoding class (which must be one of
1.31 -// the class names specified in the encoding block), and they use the
1.32 -// opcode keyword to specify, in order, their primary, secondary, and
1.33 -// tertiary opcode. Only the opcode sections which a particular instruction
1.34 -// needs for encoding need to be specified.
1.35 -encode %{
1.36 - // Build emit functions for each basic byte or larger field in the intel
1.37 - // encoding scheme (opcode, rm, sib, immediate), and call them from C++
1.38 - // code in the enc_class source block. Emit functions will live in the
1.39 - // main source block for now. In future, we can generalize this by
1.40 - // adding a syntax that specifies the sizes of fields in an order,
1.41 - // so that the adlc can build the emit functions automagically
1.42 -
1.43 - enc_class solaris_tlsencode (eRegP dst) %{
1.44 - Register dstReg = as_Register($dst$$reg);
1.45 - MacroAssembler* masm = new MacroAssembler(&cbuf);
1.46 - masm->get_thread(dstReg);
1.47 - %}
1.48 -
1.49 - enc_class solaris_breakpoint %{
1.50 - MacroAssembler* masm = new MacroAssembler(&cbuf);
1.51 - // Really need to fix this
1.52 - masm->push(rax);
1.53 - masm->push(rcx);
1.54 - masm->push(rdx);
1.55 - masm->call(RuntimeAddress(CAST_FROM_FN_PTR(address, os::breakpoint)));
1.56 - masm->pop(rdx);
1.57 - masm->pop(rcx);
1.58 - masm->pop(rax);
1.59 - %}
1.60 -
1.61 - enc_class call_epilog %{
1.62 - if( VerifyStackAtCalls ) {
1.63 - // Check that stack depth is unchanged: find majik cookie on stack
1.64 - int framesize = ra_->reg2offset_unchecked(OptoReg::add(ra_->_matcher._old_SP,-3*VMRegImpl::slots_per_word));
1.65 - if(framesize >= 128) {
1.66 - emit_opcode(cbuf, 0x81); // cmp [esp+0],0xbadb1ood
1.67 - emit_d8(cbuf,0xBC);
1.68 - emit_d8(cbuf,0x24);
1.69 - emit_d32(cbuf,framesize); // Find majik cookie from ESP
1.70 - emit_d32(cbuf, 0xbadb100d);
1.71 - }
1.72 - else {
1.73 - emit_opcode(cbuf, 0x81); // cmp [esp+0],0xbadb1ood
1.74 - emit_d8(cbuf,0x7C);
1.75 - emit_d8(cbuf,0x24);
1.76 - emit_d8(cbuf,framesize); // Find majik cookie from ESP
1.77 - emit_d32(cbuf, 0xbadb100d);
1.78 - }
1.79 - // jmp EQ around INT3
1.80 - // QQQ TODO
1.81 - const int jump_around = 11; // size of call to breakpoint (and register preserve), 1 for CC
1.82 - emit_opcode(cbuf,0x74);
1.83 - emit_d8(cbuf, jump_around);
1.84 - // QQQ temporary
1.85 - emit_break(cbuf);
1.86 - // Die if stack mismatch
1.87 - // emit_opcode(cbuf,0xCC);
1.88 - }
1.89 - %}
1.90 -
1.91 -%}
1.92 -
1.93 -// INSTRUCTIONS -- Platform dependent
1.94 -
1.95 -//----------OS and Locking Instructions----------------------------------------
1.96 -
1.97 -// This name is KNOWN by the ADLC and cannot be changed.
1.98 -// The ADLC forces a 'TypeRawPtr::BOTTOM' output type
1.99 -// for this guy.
1.100 -instruct tlsLoadP(eRegP dst, eFlagsReg cr) %{
1.101 - match(Set dst (ThreadLocal));
1.102 - effect(DEF dst, KILL cr);
1.103 -
1.104 - format %{ "MOV $dst, Thread::current()" %}
1.105 - ins_encode( solaris_tlsencode(dst) );
1.106 - ins_pipe( ialu_reg_fat );
1.107 -%}
1.108 -
1.109 -instruct TLS(eRegP dst) %{
1.110 - match(Set dst (ThreadLocal));
1.111 -
1.112 - expand %{
1.113 - tlsLoadP(dst);
1.114 - %}
1.115 -%}
1.116 -
1.117 -// Die now
1.118 -instruct ShouldNotReachHere( )
1.119 -%{
1.120 - match(Halt);
1.121 -
1.122 - // Use the following format syntax
1.123 - format %{ "INT3 ; ShouldNotReachHere" %}
1.124 - // QQQ TODO for now call breakpoint
1.125 - // opcode(0xCC);
1.126 - // ins_encode(Opc);
1.127 - ins_encode(solaris_breakpoint);
1.128 - ins_pipe( pipe_slow );
1.129 -%}
1.130 -
1.131 -
1.132 -
1.133 -// Platform dependent source
1.134 -
1.135 -source %{
1.136 -
1.137 -// emit an interrupt that is caught by the debugger
1.138 -void emit_break(CodeBuffer &cbuf) {
1.139 -
1.140 - // Debugger doesn't really catch this but best we can do so far QQQ
1.141 - MacroAssembler* masm = new MacroAssembler(&cbuf);
1.142 - masm->call(RuntimeAddress(CAST_FROM_FN_PTR(address, os::breakpoint)));
1.143 -}
1.144 -
1.145 -void MachBreakpointNode::emit(CodeBuffer &cbuf, PhaseRegAlloc *ra_) const {
1.146 - emit_break(cbuf);
1.147 -}
1.148 -
1.149 -
1.150 -uint MachBreakpointNode::size(PhaseRegAlloc *ra_) const {
1.151 - return MachNode::size(ra_);
1.152 -}
1.153 -
1.154 -%}
