1.1 --- a/src/cpu/x86/vm/vm_version_x86.cpp Thu Jun 14 14:59:52 2012 -0700
1.2 +++ b/src/cpu/x86/vm/vm_version_x86.cpp Fri Jun 15 01:25:19 2012 -0700
1.3 @@ -467,6 +467,32 @@
1.4 if (!supports_avx ()) // Drop to 0 if no AVX support
1.5 UseAVX = 0;
1.6
1.7 +#ifdef COMPILER2
1.8 + if (UseFPUForSpilling) {
1.9 + if (UseSSE < 2) {
1.10 + // Only supported with SSE2+
1.11 + FLAG_SET_DEFAULT(UseFPUForSpilling, false);
1.12 + }
1.13 + }
1.14 + if (MaxVectorSize > 0) {
1.15 + if (!is_power_of_2(MaxVectorSize)) {
1.16 + warning("MaxVectorSize must be a power of 2");
1.17 + FLAG_SET_DEFAULT(MaxVectorSize, 32);
1.18 + }
1.19 + if (MaxVectorSize > 32) {
1.20 + FLAG_SET_DEFAULT(MaxVectorSize, 32);
1.21 + }
1.22 + if (MaxVectorSize > 16 && UseAVX == 0) {
1.23 + // Only supported with AVX+
1.24 + FLAG_SET_DEFAULT(MaxVectorSize, 16);
1.25 + }
1.26 + if (UseSSE < 2) {
1.27 + // Only supported with SSE2+
1.28 + FLAG_SET_DEFAULT(MaxVectorSize, 0);
1.29 + }
1.30 + }
1.31 +#endif
1.32 +
1.33 // On new cpus instructions which update whole XMM register should be used
1.34 // to prevent partial register stall due to dependencies on high half.
1.35 //
1.36 @@ -544,6 +570,12 @@
1.37 }
1.38 }
1.39
1.40 +#ifdef COMPILER2
1.41 + if (MaxVectorSize > 16) {
1.42 + // Limit vectors size to 16 bytes on current AMD cpus.
1.43 + FLAG_SET_DEFAULT(MaxVectorSize, 16);
1.44 + }
1.45 +#endif // COMPILER2
1.46 }
1.47
1.48 if( is_intel() ) { // Intel cpus specific settings
1.49 @@ -606,15 +638,6 @@
1.50 FLAG_SET_DEFAULT(UsePopCountInstruction, false);
1.51 }
1.52
1.53 -#ifdef COMPILER2
1.54 - if (UseFPUForSpilling) {
1.55 - if (UseSSE < 2) {
1.56 - // Only supported with SSE2+
1.57 - FLAG_SET_DEFAULT(UseFPUForSpilling, false);
1.58 - }
1.59 - }
1.60 -#endif
1.61 -
1.62 assert(0 <= ReadPrefetchInstr && ReadPrefetchInstr <= 3, "invalid value");
1.63 assert(0 <= AllocatePrefetchInstr && AllocatePrefetchInstr <= 3, "invalid value");
1.64
