src/share/vm/opto/superword.cpp

changeset 4134
859c45fb8cea
parent 4115
e626685e9f6c
child 4160
f6badecb7ea7
     1.1 --- a/src/share/vm/opto/superword.cpp	Mon Oct 01 14:50:10 2012 -0700
     1.2 +++ b/src/share/vm/opto/superword.cpp	Tue Oct 02 12:25:13 2012 -0700
     1.3 @@ -1436,10 +1436,9 @@
     1.4        return opd; // input is matching vector
     1.5      }
     1.6      if ((opd_idx == 2) && VectorNode::is_shift(p0)) {
     1.7 -      // No vector is needed for shift count.
     1.8 -      // Vector instructions do not mask shift count, do it here.
     1.9        Compile* C = _phase->C;
    1.10        Node* cnt = opd;
    1.11 +      // Vector instructions do not mask shift count, do it here.
    1.12        juint mask = (p0->bottom_type() == TypeInt::INT) ? (BitsPerInt - 1) : (BitsPerLong - 1);
    1.13        const TypeInt* t = opd->find_int_type();
    1.14        if (t != NULL && t->is_con()) {
    1.15 @@ -1456,8 +1455,8 @@
    1.16            _phase->set_ctrl(cnt, _phase->get_ctrl(opd));
    1.17          }
    1.18          assert(opd->bottom_type()->isa_int(), "int type only");
    1.19 -        // Move non constant shift count into XMM register.
    1.20 -        cnt = new (C) MoveI2FNode(cnt);
    1.21 +        // Move non constant shift count into vector register.
    1.22 +        cnt = VectorNode::shift_count(C, p0, cnt, vlen, velt_basic_type(p0));
    1.23        }
    1.24        if (cnt != opd) {
    1.25          _igvn.register_new_node_with_optimizer(cnt);

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