1.1 --- a/src/cpu/x86/vm/vm_version_x86.cpp Tue Feb 04 17:38:01 2020 +0800
1.2 +++ b/src/cpu/x86/vm/vm_version_x86.cpp Tue Feb 04 18:13:14 2020 +0800
1.3 @@ -553,12 +553,36 @@
1.4 // Use AES instructions if available.
1.5 if (supports_aes()) {
1.6 if (FLAG_IS_DEFAULT(UseAES)) {
1.7 - UseAES = true;
1.8 + FLAG_SET_DEFAULT(UseAES, true);
1.9 }
1.10 - } else if (UseAES) {
1.11 - if (!FLAG_IS_DEFAULT(UseAES))
1.12 + if (!UseAES) {
1.13 + if (UseAESIntrinsics && !FLAG_IS_DEFAULT(UseAESIntrinsics)) {
1.14 + warning("AES intrinsics require UseAES flag to be enabled. Intrinsics will be disabled.");
1.15 + }
1.16 + FLAG_SET_DEFAULT(UseAESIntrinsics, false);
1.17 + } else {
1.18 + if (UseSSE > 2) {
1.19 + if (FLAG_IS_DEFAULT(UseAESIntrinsics)) {
1.20 + FLAG_SET_DEFAULT(UseAESIntrinsics, true);
1.21 + }
1.22 + } else {
1.23 + // The AES intrinsic stubs require AES instruction support (of course)
1.24 + // but also require sse3 mode or higher for instructions it use.
1.25 + if (UseAESIntrinsics && !FLAG_IS_DEFAULT(UseAESIntrinsics)) {
1.26 + warning("X86 AES intrinsics require SSE3 instructions or higher. Intrinsics will be disabled.");
1.27 + }
1.28 + FLAG_SET_DEFAULT(UseAESIntrinsics, false);
1.29 + }
1.30 + }
1.31 + } else if (UseAES || UseAESIntrinsics) {
1.32 + if (UseAES && !FLAG_IS_DEFAULT(UseAES)) {
1.33 warning("AES instructions are not available on this CPU");
1.34 - FLAG_SET_DEFAULT(UseAES, false);
1.35 + FLAG_SET_DEFAULT(UseAES, false);
1.36 + }
1.37 + if (UseAESIntrinsics && !FLAG_IS_DEFAULT(UseAESIntrinsics)) {
1.38 + warning("AES intrinsics are not available on this CPU");
1.39 + FLAG_SET_DEFAULT(UseAESIntrinsics, false);
1.40 + }
1.41 }
1.42
1.43 // Use CLMUL instructions if available.
1.44 @@ -582,16 +606,15 @@
1.45 FLAG_SET_DEFAULT(UseCRC32Intrinsics, false);
1.46 }
1.47
1.48 - // The AES intrinsic stubs require AES instruction support (of course)
1.49 - // but also require sse3 mode for instructions it use.
1.50 - if (UseAES && (UseSSE > 2)) {
1.51 - if (FLAG_IS_DEFAULT(UseAESIntrinsics)) {
1.52 - UseAESIntrinsics = true;
1.53 + // GHASH/GCM intrinsics
1.54 + if (UseCLMUL && (UseSSE > 2)) {
1.55 + if (FLAG_IS_DEFAULT(UseGHASHIntrinsics)) {
1.56 + UseGHASHIntrinsics = true;
1.57 }
1.58 - } else if (UseAESIntrinsics) {
1.59 - if (!FLAG_IS_DEFAULT(UseAESIntrinsics))
1.60 - warning("AES intrinsics are not available on this CPU");
1.61 - FLAG_SET_DEFAULT(UseAESIntrinsics, false);
1.62 + } else if (UseGHASHIntrinsics) {
1.63 + if (!FLAG_IS_DEFAULT(UseGHASHIntrinsics))
1.64 + warning("GHASH intrinsic requires CLMUL and SSE2 instructions on this CPU");
1.65 + FLAG_SET_DEFAULT(UseGHASHIntrinsics, false);
1.66 }
1.67
1.68 if (UseSHA) {
