1.1 --- a/src/cpu/sparc/vm/c1_LIRAssembler_sparc.cpp Mon Nov 14 18:38:03 2011 -0800
1.2 +++ b/src/cpu/sparc/vm/c1_LIRAssembler_sparc.cpp Wed Nov 16 01:39:50 2011 -0800
1.3 @@ -765,7 +765,7 @@
1.4 void LIR_Assembler::vtable_call(LIR_OpJavaCall* op) {
1.5 add_debug_info_for_null_check_here(op->info());
1.6 __ load_klass(O0, G3_scratch);
1.7 - if (__ is_simm13(op->vtable_offset())) {
1.8 + if (Assembler::is_simm13(op->vtable_offset())) {
1.9 __ ld_ptr(G3_scratch, op->vtable_offset(), G5_method);
1.10 } else {
1.11 // This will generate 2 instructions
