src/cpu/sparc/vm/c1_LIRAssembler_sparc.cpp

changeset 3310
6729bbc1fcd6
parent 3248
eba044a722a4
child 3370
2685ea97b89f
child 3391
069ab3f976d3
equal deleted inserted replaced
3309:8c57262447d3 3310:6729bbc1fcd6
763 763
764 764
765 void LIR_Assembler::vtable_call(LIR_OpJavaCall* op) { 765 void LIR_Assembler::vtable_call(LIR_OpJavaCall* op) {
766 add_debug_info_for_null_check_here(op->info()); 766 add_debug_info_for_null_check_here(op->info());
767 __ load_klass(O0, G3_scratch); 767 __ load_klass(O0, G3_scratch);
768 if (__ is_simm13(op->vtable_offset())) { 768 if (Assembler::is_simm13(op->vtable_offset())) {
769 __ ld_ptr(G3_scratch, op->vtable_offset(), G5_method); 769 __ ld_ptr(G3_scratch, op->vtable_offset(), G5_method);
770 } else { 770 } else {
771 // This will generate 2 instructions 771 // This will generate 2 instructions
772 __ set(op->vtable_offset(), G5_method); 772 __ set(op->vtable_offset(), G5_method);
773 // ld_ptr, set_hi, set 773 // ld_ptr, set_hi, set

mercurial