1.1 --- a/src/cpu/x86/vm/assembler_x86_64.hpp Wed Jun 04 13:51:09 2008 -0700 1.2 +++ b/src/cpu/x86/vm/assembler_x86_64.hpp Thu Jun 05 15:57:56 2008 -0700 1.3 @@ -222,6 +222,18 @@ 1.4 static Address make_raw(int base, int index, int scale, int disp); 1.5 1.6 static Address make_array(ArrayAddress); 1.7 + Register base() const { 1.8 + return _base; 1.9 + } 1.10 + 1.11 + Register index() const { 1.12 + return _index; 1.13 + } 1.14 + 1.15 + int disp() const { 1.16 + return _disp; 1.17 + } 1.18 + 1.19 1.20 private: 1.21 bool base_needs_rex() const { 1.22 @@ -1194,6 +1206,9 @@ 1.23 // location (reg. is 1.24 // destroyed) 1.25 1.26 + void g1_write_barrier_pre(Register obj, Register tmp, Register tmp2, bool tosca_live ); 1.27 + void g1_write_barrier_post(Register store_addr, Register new_val, Register tmp, Register tmp2); 1.28 + 1.29 // split store_check(Register obj) to enhance instruction interleaving 1.30 void store_check_part_1(Register obj); 1.31 void store_check_part_2(Register obj);