1.1 --- a/src/cpu/x86/vm/x86_32.ad Wed Jun 24 12:00:51 2009 -0700
1.2 +++ b/src/cpu/x86/vm/x86_32.ad Fri Jun 26 07:26:10 2009 -0700
1.3 @@ -6885,8 +6885,9 @@
1.4 %}
1.5
1.6 // Load Byte (8bit signed) into Long Register
1.7 -instruct loadB2L(eRegL dst, memory mem) %{
1.8 +instruct loadB2L(eRegL dst, memory mem, eFlagsReg cr) %{
1.9 match(Set dst (ConvI2L (LoadB mem)));
1.10 + effect(KILL cr);
1.11
1.12 ins_cost(375);
1.13 format %{ "MOVSX8 $dst.lo,$mem\t# byte -> long\n\t"
1.14 @@ -6917,19 +6918,37 @@
1.15 %}
1.16
1.17 // Load Unsigned Byte (8 bit UNsigned) into Long Register
1.18 -instruct loadUB2L(eRegL dst, memory mem)
1.19 -%{
1.20 +instruct loadUB2L(eRegL dst, memory mem, eFlagsReg cr) %{
1.21 match(Set dst (ConvI2L (LoadUB mem)));
1.22 + effect(KILL cr);
1.23
1.24 ins_cost(250);
1.25 format %{ "MOVZX8 $dst.lo,$mem\t# ubyte -> long\n\t"
1.26 "XOR $dst.hi,$dst.hi" %}
1.27
1.28 ins_encode %{
1.29 - __ movzbl($dst$$Register, $mem$$Address);
1.30 - __ xorl(HIGH_FROM_LOW($dst$$Register), HIGH_FROM_LOW($dst$$Register));
1.31 - %}
1.32 -
1.33 + Register Rdst = $dst$$Register;
1.34 + __ movzbl(Rdst, $mem$$Address);
1.35 + __ xorl(HIGH_FROM_LOW(Rdst), HIGH_FROM_LOW(Rdst));
1.36 + %}
1.37 +
1.38 + ins_pipe(ialu_reg_mem);
1.39 +%}
1.40 +
1.41 +// Load Unsigned Byte (8 bit UNsigned) with mask into Long Register
1.42 +instruct loadUB2L_immI8(eRegL dst, memory mem, immI8 mask, eFlagsReg cr) %{
1.43 + match(Set dst (ConvI2L (AndI (LoadUB mem) mask)));
1.44 + effect(KILL cr);
1.45 +
1.46 + format %{ "MOVZX8 $dst.lo,$mem\t# ubyte & 8-bit mask -> long\n\t"
1.47 + "XOR $dst.hi,$dst.hi\n\t"
1.48 + "AND $dst.lo,$mask" %}
1.49 + ins_encode %{
1.50 + Register Rdst = $dst$$Register;
1.51 + __ movzbl(Rdst, $mem$$Address);
1.52 + __ xorl(HIGH_FROM_LOW(Rdst), HIGH_FROM_LOW(Rdst));
1.53 + __ andl(Rdst, $mask$$constant);
1.54 + %}
1.55 ins_pipe(ialu_reg_mem);
1.56 %}
1.57
1.58 @@ -6960,8 +6979,9 @@
1.59 %}
1.60
1.61 // Load Short (16bit signed) into Long Register
1.62 -instruct loadS2L(eRegL dst, memory mem) %{
1.63 +instruct loadS2L(eRegL dst, memory mem, eFlagsReg cr) %{
1.64 match(Set dst (ConvI2L (LoadS mem)));
1.65 + effect(KILL cr);
1.66
1.67 ins_cost(375);
1.68 format %{ "MOVSX $dst.lo,$mem\t# short -> long\n\t"
1.69 @@ -7004,8 +7024,9 @@
1.70 %}
1.71
1.72 // Load Unsigned Short/Char (16 bit UNsigned) into Long Register
1.73 -instruct loadUS2L(eRegL dst, memory mem) %{
1.74 +instruct loadUS2L(eRegL dst, memory mem, eFlagsReg cr) %{
1.75 match(Set dst (ConvI2L (LoadUS mem)));
1.76 + effect(KILL cr);
1.77
1.78 ins_cost(250);
1.79 format %{ "MOVZX $dst.lo,$mem\t# ushort/char -> long\n\t"
1.80 @@ -7019,6 +7040,38 @@
1.81 ins_pipe(ialu_reg_mem);
1.82 %}
1.83
1.84 +// Load Unsigned Short/Char (16 bit UNsigned) with mask 0xFF into Long Register
1.85 +instruct loadUS2L_immI_255(eRegL dst, memory mem, immI_255 mask, eFlagsReg cr) %{
1.86 + match(Set dst (ConvI2L (AndI (LoadUS mem) mask)));
1.87 + effect(KILL cr);
1.88 +
1.89 + format %{ "MOVZX8 $dst.lo,$mem\t# ushort/char & 0xFF -> long\n\t"
1.90 + "XOR $dst.hi,$dst.hi" %}
1.91 + ins_encode %{
1.92 + Register Rdst = $dst$$Register;
1.93 + __ movzbl(Rdst, $mem$$Address);
1.94 + __ xorl(HIGH_FROM_LOW(Rdst), HIGH_FROM_LOW(Rdst));
1.95 + %}
1.96 + ins_pipe(ialu_reg_mem);
1.97 +%}
1.98 +
1.99 +// Load Unsigned Short/Char (16 bit UNsigned) with a 16-bit mask into Long Register
1.100 +instruct loadUS2L_immI16(eRegL dst, memory mem, immI16 mask, eFlagsReg cr) %{
1.101 + match(Set dst (ConvI2L (AndI (LoadUS mem) mask)));
1.102 + effect(KILL cr);
1.103 +
1.104 + format %{ "MOVZX $dst.lo, $mem\t# ushort/char & 16-bit mask -> long\n\t"
1.105 + "XOR $dst.hi,$dst.hi\n\t"
1.106 + "AND $dst.lo,$mask" %}
1.107 + ins_encode %{
1.108 + Register Rdst = $dst$$Register;
1.109 + __ movzwl(Rdst, $mem$$Address);
1.110 + __ xorl(HIGH_FROM_LOW(Rdst), HIGH_FROM_LOW(Rdst));
1.111 + __ andl(Rdst, $mask$$constant);
1.112 + %}
1.113 + ins_pipe(ialu_reg_mem);
1.114 +%}
1.115 +
1.116 // Load Integer
1.117 instruct loadI(eRegI dst, memory mem) %{
1.118 match(Set dst (LoadI mem));
1.119 @@ -7082,8 +7135,9 @@
1.120 %}
1.121
1.122 // Load Integer into Long Register
1.123 -instruct loadI2L(eRegL dst, memory mem) %{
1.124 +instruct loadI2L(eRegL dst, memory mem, eFlagsReg cr) %{
1.125 match(Set dst (ConvI2L (LoadI mem)));
1.126 + effect(KILL cr);
1.127
1.128 ins_cost(375);
1.129 format %{ "MOV $dst.lo,$mem\t# int -> long\n\t"
1.130 @@ -7099,9 +7153,57 @@
1.131 ins_pipe(ialu_reg_mem);
1.132 %}
1.133
1.134 +// Load Integer with mask 0xFF into Long Register
1.135 +instruct loadI2L_immI_255(eRegL dst, memory mem, immI_255 mask, eFlagsReg cr) %{
1.136 + match(Set dst (ConvI2L (AndI (LoadI mem) mask)));
1.137 + effect(KILL cr);
1.138 +
1.139 + format %{ "MOVZX8 $dst.lo,$mem\t# int & 0xFF -> long\n\t"
1.140 + "XOR $dst.hi,$dst.hi" %}
1.141 + ins_encode %{
1.142 + Register Rdst = $dst$$Register;
1.143 + __ movzbl(Rdst, $mem$$Address);
1.144 + __ xorl(HIGH_FROM_LOW(Rdst), HIGH_FROM_LOW(Rdst));
1.145 + %}
1.146 + ins_pipe(ialu_reg_mem);
1.147 +%}
1.148 +
1.149 +// Load Integer with mask 0xFFFF into Long Register
1.150 +instruct loadI2L_immI_65535(eRegL dst, memory mem, immI_65535 mask, eFlagsReg cr) %{
1.151 + match(Set dst (ConvI2L (AndI (LoadI mem) mask)));
1.152 + effect(KILL cr);
1.153 +
1.154 + format %{ "MOVZX $dst.lo,$mem\t# int & 0xFFFF -> long\n\t"
1.155 + "XOR $dst.hi,$dst.hi" %}
1.156 + ins_encode %{
1.157 + Register Rdst = $dst$$Register;
1.158 + __ movzwl(Rdst, $mem$$Address);
1.159 + __ xorl(HIGH_FROM_LOW(Rdst), HIGH_FROM_LOW(Rdst));
1.160 + %}
1.161 + ins_pipe(ialu_reg_mem);
1.162 +%}
1.163 +
1.164 +// Load Integer with 32-bit mask into Long Register
1.165 +instruct loadI2L_immI(eRegL dst, memory mem, immI mask, eFlagsReg cr) %{
1.166 + match(Set dst (ConvI2L (AndI (LoadI mem) mask)));
1.167 + effect(KILL cr);
1.168 +
1.169 + format %{ "MOV $dst.lo,$mem\t# int & 32-bit mask -> long\n\t"
1.170 + "XOR $dst.hi,$dst.hi\n\t"
1.171 + "AND $dst.lo,$mask" %}
1.172 + ins_encode %{
1.173 + Register Rdst = $dst$$Register;
1.174 + __ movl(Rdst, $mem$$Address);
1.175 + __ xorl(HIGH_FROM_LOW(Rdst), HIGH_FROM_LOW(Rdst));
1.176 + __ andl(Rdst, $mask$$constant);
1.177 + %}
1.178 + ins_pipe(ialu_reg_mem);
1.179 +%}
1.180 +
1.181 // Load Unsigned Integer into Long Register
1.182 -instruct loadUI2L(eRegL dst, memory mem) %{
1.183 +instruct loadUI2L(eRegL dst, memory mem, eFlagsReg cr) %{
1.184 match(Set dst (LoadUI2L mem));
1.185 + effect(KILL cr);
1.186
1.187 ins_cost(250);
1.188 format %{ "MOV $dst.lo,$mem\t# uint -> long\n\t"
1.189 @@ -7695,6 +7797,17 @@
1.190 ins_pipe( ialu_mem_long_reg );
1.191 %}
1.192
1.193 +// Store Long to Integer
1.194 +instruct storeL2I(memory mem, eRegL src) %{
1.195 + match(Set mem (StoreI mem (ConvL2I src)));
1.196 +
1.197 + format %{ "MOV $mem,$src.lo\t# long -> int" %}
1.198 + ins_encode %{
1.199 + __ movl($mem$$Address, $src$$Register);
1.200 + %}
1.201 + ins_pipe(ialu_mem_reg);
1.202 +%}
1.203 +
1.204 // Volatile Store Long. Must be atomic, so move it into
1.205 // the FP TOS and then do a 64-bit FIST. Has to probe the
1.206 // target address before the store (for null-ptr checks)
