1.1 --- a/src/cpu/mips/vm/macroAssembler_mips.cpp Wed Sep 11 12:40:06 2019 +0800
1.2 +++ b/src/cpu/mips/vm/macroAssembler_mips.cpp Fri Sep 27 11:31:13 2019 +0800
1.3 @@ -4241,3 +4241,44 @@
1.4
1.5 return code_offset;
1.6 }
1.7 +
1.8 +void MacroAssembler::clear_jweak_tag(Register possibly_jweak) {
1.9 + const int32_t inverted_jweak_mask = ~static_cast<int32_t>(JNIHandles::weak_tag_mask);
1.10 + STATIC_ASSERT(inverted_jweak_mask == -2); // otherwise check this code
1.11 + // The inverted mask is sign-extended
1.12 + move(AT, inverted_jweak_mask);
1.13 + andr(possibly_jweak, AT, possibly_jweak);
1.14 +}
1.15 +
1.16 +void MacroAssembler::resolve_jobject(Register value,
1.17 + Register thread,
1.18 + Register tmp) {
1.19 + assert_different_registers(value, thread, tmp);
1.20 + Label done, not_weak;
1.21 + beq(value, R0, done); // Use NULL as-is.
1.22 + delayed()->nop();
1.23 + move(AT, JNIHandles::weak_tag_mask); // Test for jweak tag.
1.24 + andr(AT, value, AT);
1.25 + beq(AT, R0, not_weak);
1.26 + delayed()->nop();
1.27 + // Resolve jweak.
1.28 + ld(value, value, -JNIHandles::weak_tag_value);
1.29 + verify_oop(value);
1.30 + #if INCLUDE_ALL_GCS
1.31 + if (UseG1GC) {
1.32 + g1_write_barrier_pre(noreg /* obj */,
1.33 + value /* pre_val */,
1.34 + thread /* thread */,
1.35 + tmp /* tmp */,
1.36 + true /* tosca_live */,
1.37 + true /* expand_call */);
1.38 + }
1.39 + #endif // INCLUDE_ALL_GCS
1.40 + b(done);
1.41 + delayed()->nop();
1.42 + bind(not_weak);
1.43 + // Resolve (untagged) jobject.
1.44 + ld(value, value, 0);
1.45 + verify_oop(value);
1.46 + bind(done);
1.47 +}
