1.1 --- a/src/cpu/sparc/vm/vm_version_sparc.cpp Thu May 01 15:02:46 2014 -0700 1.2 +++ b/src/cpu/sparc/vm/vm_version_sparc.cpp Wed Apr 30 14:14:01 2014 -0700 1.3 @@ -1,5 +1,5 @@ 1.4 /* 1.5 - * Copyright (c) 1997, 2013, Oracle and/or its affiliates. All rights reserved. 1.6 + * Copyright (c) 1997, 2014, Oracle and/or its affiliates. All rights reserved. 1.7 * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. 1.8 * 1.9 * This code is free software; you can redistribute it and/or modify it 1.10 @@ -266,9 +266,9 @@ 1.11 if (!has_vis1()) // Drop to 0 if no VIS1 support 1.12 UseVIS = 0; 1.13 1.14 - // T2 and above should have support for AES instructions 1.15 + // SPARC T4 and above should have support for AES instructions 1.16 if (has_aes()) { 1.17 - if (UseVIS > 0) { // AES intrinsics use FXOR instruction which is VIS1 1.18 + if (UseVIS > 2) { // AES intrinsics use MOVxTOd/MOVdTOx which are VIS3 1.19 if (FLAG_IS_DEFAULT(UseAES)) { 1.20 FLAG_SET_DEFAULT(UseAES, true); 1.21 } 1.22 @@ -282,7 +282,7 @@ 1.23 } 1.24 } else { 1.25 if (UseAES || UseAESIntrinsics) { 1.26 - warning("SPARC AES intrinsics require VIS1 instruction support. Intrinsics will be disabled."); 1.27 + warning("SPARC AES intrinsics require VIS3 instruction support. Intrinsics will be disabled."); 1.28 if (UseAES) { 1.29 FLAG_SET_DEFAULT(UseAES, false); 1.30 }