src/cpu/ppc/vm/macroAssembler_ppc.cpp

changeset 7222
f6bde7889409
parent 6515
71a71b0bc844
child 7358
327e7269f90d
equal deleted inserted replaced
7221:43ce58b4717b 7222:f6bde7889409
2363 bind(filtered_int); 2363 bind(filtered_int);
2364 } 2364 }
2365 #endif // INCLUDE_ALL_GCS 2365 #endif // INCLUDE_ALL_GCS
2366 2366
2367 // Values for last_Java_pc, and last_Java_sp must comply to the rules 2367 // Values for last_Java_pc, and last_Java_sp must comply to the rules
2368 // in frame_ppc64.hpp. 2368 // in frame_ppc.hpp.
2369 void MacroAssembler::set_last_Java_frame(Register last_Java_sp, Register last_Java_pc) { 2369 void MacroAssembler::set_last_Java_frame(Register last_Java_sp, Register last_Java_pc) {
2370 // Always set last_Java_pc and flags first because once last_Java_sp 2370 // Always set last_Java_pc and flags first because once last_Java_sp
2371 // is visible has_last_Java_frame is true and users will look at the 2371 // is visible has_last_Java_frame is true and users will look at the
2372 // rest of the fields. (Note: flags should always be zero before we 2372 // rest of the fields. (Note: flags should always be zero before we
2373 // get here so doesn't need to be set.) 2373 // get here so doesn't need to be set.)
2490 if (Universe::narrow_klass_base() != 0) num_instrs = 7; // shift + load const + add 2490 if (Universe::narrow_klass_base() != 0) num_instrs = 7; // shift + load const + add
2491 return num_instrs * BytesPerInstWord; 2491 return num_instrs * BytesPerInstWord;
2492 } 2492 }
2493 2493
2494 void MacroAssembler::decode_klass_not_null(Register dst, Register src) { 2494 void MacroAssembler::decode_klass_not_null(Register dst, Register src) {
2495 assert(dst != R0, "Dst reg may not be R0, as R0 is used here.");
2495 if (src == noreg) src = dst; 2496 if (src == noreg) src = dst;
2496 Register shifted_src = src; 2497 Register shifted_src = src;
2497 if (Universe::narrow_klass_shift() != 0 || 2498 if (Universe::narrow_klass_shift() != 0 ||
2498 Universe::narrow_klass_base() == 0 && src != dst) { // Move required. 2499 Universe::narrow_klass_base() == 0 && src != dst) { // Move required.
2499 shifted_src = dst; 2500 shifted_src = dst;
2524 load_klass(dst, src); 2525 load_klass(dst, src);
2525 } 2526 }
2526 2527
2527 void MacroAssembler::reinit_heapbase(Register d, Register tmp) { 2528 void MacroAssembler::reinit_heapbase(Register d, Register tmp) {
2528 if (Universe::heap() != NULL) { 2529 if (Universe::heap() != NULL) {
2529 if (Universe::narrow_oop_base() == NULL) { 2530 load_const_optimized(R30, Universe::narrow_ptrs_base(), tmp);
2530 Assembler::xorr(R30, R30, R30);
2531 } else {
2532 load_const(R30, Universe::narrow_ptrs_base(), tmp);
2533 }
2534 } else { 2531 } else {
2535 load_const(R30, Universe::narrow_ptrs_base_addr(), tmp); 2532 // Heap not yet allocated. Load indirectly.
2536 ld(R30, 0, R30); 2533 int simm16_offset = load_const_optimized(R30, Universe::narrow_ptrs_base_addr(), tmp, true);
2534 ld(R30, simm16_offset, R30);
2537 } 2535 }
2538 } 2536 }
2539 2537
2540 // Clear Array 2538 // Clear Array
2541 // Kills both input registers. tmp == R0 is allowed. 2539 // Kills both input registers. tmp == R0 is allowed.

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