1556 } |
1556 } |
1557 |
1557 |
1558 // Returns true if the high 32 bits of the value is known to be zero. |
1558 // Returns true if the high 32 bits of the value is known to be zero. |
1559 bool is_operand_hi32_zero(Node* n) { |
1559 bool is_operand_hi32_zero(Node* n) { |
1560 int opc = n->Opcode(); |
1560 int opc = n->Opcode(); |
1561 if (opc == Op_LoadUI2L) { |
|
1562 return true; |
|
1563 } |
|
1564 if (opc == Op_AndL) { |
1561 if (opc == Op_AndL) { |
1565 Node* o2 = n->in(2); |
1562 Node* o2 = n->in(2); |
1566 if (o2->is_Con() && (o2->get_long() & 0xFFFFFFFF00000000LL) == 0LL) { |
1563 if (o2->is_Con() && (o2->get_long() & 0xFFFFFFFF00000000LL) == 0LL) { |
1567 return true; |
1564 return true; |
1568 } |
1565 } |
6150 %} |
6147 %} |
6151 ins_pipe(ialu_reg_mem); |
6148 ins_pipe(ialu_reg_mem); |
6152 %} |
6149 %} |
6153 |
6150 |
6154 // Load Unsigned Integer into Long Register |
6151 // Load Unsigned Integer into Long Register |
6155 instruct loadUI2L(eRegL dst, memory mem, eFlagsReg cr) %{ |
6152 instruct loadUI2L(eRegL dst, memory mem, immL_32bits mask, eFlagsReg cr) %{ |
6156 match(Set dst (LoadUI2L mem)); |
6153 match(Set dst (AndL (ConvI2L (LoadI mem)) mask)); |
6157 effect(KILL cr); |
6154 effect(KILL cr); |
6158 |
6155 |
6159 ins_cost(250); |
6156 ins_cost(250); |
6160 format %{ "MOV $dst.lo,$mem\t# uint -> long\n\t" |
6157 format %{ "MOV $dst.lo,$mem\t# uint -> long\n\t" |
6161 "XOR $dst.hi,$dst.hi" %} |
6158 "XOR $dst.hi,$dst.hi" %} |