38 //update @jerome , 12/05/2006 |
38 //update @jerome , 12/05/2006 |
39 //flush cache is a very frequent operation, flush all the cache decrease the performance sharply, so i modify it. |
39 //flush cache is a very frequent operation, flush all the cache decrease the performance sharply, so i modify it. |
40 void ICacheStubGenerator::generate_icache_flush(ICache::flush_icache_stub_t* flush_icache_stub) {}; |
40 void ICacheStubGenerator::generate_icache_flush(ICache::flush_icache_stub_t* flush_icache_stub) {}; |
41 |
41 |
42 void ICache::call_flush_stub(address start, int lines) { |
42 void ICache::call_flush_stub(address start, int lines) { |
43 cacheflush(start, lines * line_size , ICACHE); |
43 //in fact, the current os implementation simply flush all ICACHE&DCACHE |
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44 #ifndef CACHE_OPT |
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45 /* Loongson3A supports automatic synchronization between Icache and Dcache. |
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46 * No manual synchronization is needed. */ |
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47 cacheflush(start, lines * line_size , ICACHE); |
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48 #endif |
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49 // sysmips(3, 0, 0, 0); |
44 } |
50 } |
45 |
51 |
46 void ICache::invalidate_word(address addr) { |
52 void ICache::invalidate_word(address addr) { |
47 cacheflush(addr,4, ICACHE); |
53 //cacheflush(addr, 4, ICACHE); |
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54 |
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55 #ifndef CACHE_OPT |
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56 cacheflush(addr,4, ICACHE); |
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57 #endif |
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58 // sysmips(3, 0, 0, 0); |
48 } |
59 } |
49 |
60 |
50 void ICache::invalidate_range(address start, int nbytes) { |
61 void ICache::invalidate_range(address start, int nbytes) { |
51 cacheflush(start, nbytes, ICACHE); |
62 #ifndef CACHE_OPT |
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63 cacheflush(start, nbytes, ICACHE); |
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64 #endif |
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65 // sysmips(3, 0, 0, 0); |
52 } |
66 } |
53 |
67 |
54 void ICache::invalidate_all() { |
68 void ICache::invalidate_all() { |
55 sysmips(3, 0, 0, 0); |
69 #ifndef CACHE_OPT |
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70 sysmips(3, 0, 0, 0); |
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71 #endif |
56 } |
72 } |
57 |
73 |