18 * |
18 * |
19 * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA |
19 * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA |
20 * or visit www.oracle.com if you need additional information or have any |
20 * or visit www.oracle.com if you need additional information or have any |
21 * questions. |
21 * questions. |
22 * |
22 * |
|
23 */ |
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24 |
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25 /* |
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26 * This file has been modified by Loongson Technology in 2015. These |
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27 * modifications are Copyright (c) 2015 Loongson Technology, and are made |
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28 * available on the same license terms set forth above. |
23 */ |
29 */ |
24 |
30 |
25 #ifndef SHARE_VM_C1_C1_LIRASSEMBLER_HPP |
31 #ifndef SHARE_VM_C1_C1_LIRASSEMBLER_HPP |
26 #define SHARE_VM_C1_C1_LIRASSEMBLER_HPP |
32 #define SHARE_VM_C1_C1_LIRASSEMBLER_HPP |
27 |
33 |
211 void emit_profile_call(LIR_OpProfileCall* op); |
217 void emit_profile_call(LIR_OpProfileCall* op); |
212 void emit_profile_type(LIR_OpProfileType* op); |
218 void emit_profile_type(LIR_OpProfileType* op); |
213 void emit_delay(LIR_OpDelay* op); |
219 void emit_delay(LIR_OpDelay* op); |
214 |
220 |
215 void arith_op(LIR_Code code, LIR_Opr left, LIR_Opr right, LIR_Opr dest, CodeEmitInfo* info, bool pop_fpu_stack); |
221 void arith_op(LIR_Code code, LIR_Opr left, LIR_Opr right, LIR_Opr dest, CodeEmitInfo* info, bool pop_fpu_stack); |
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222 #ifdef MIPS64 |
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223 void arithmetic_frem(LIR_Code code, LIR_Opr left, LIR_Opr right, LIR_Opr temp, LIR_Opr result, CodeEmitInfo* info = NULL); |
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224 #endif |
216 void arithmetic_idiv(LIR_Code code, LIR_Opr left, LIR_Opr right, LIR_Opr temp, LIR_Opr result, CodeEmitInfo* info); |
225 void arithmetic_idiv(LIR_Code code, LIR_Opr left, LIR_Opr right, LIR_Opr temp, LIR_Opr result, CodeEmitInfo* info); |
217 void intrinsic_op(LIR_Code code, LIR_Opr value, LIR_Opr unused, LIR_Opr dest, LIR_Op* op); |
226 void intrinsic_op(LIR_Code code, LIR_Opr value, LIR_Opr unused, LIR_Opr dest, LIR_Op* op); |
218 #ifdef ASSERT |
227 #ifdef ASSERT |
219 void emit_assert(LIR_OpAssert* op); |
228 void emit_assert(LIR_OpAssert* op); |
220 #endif |
229 #endif |
263 void atomic_op(LIR_Code code, LIR_Opr src, LIR_Opr data, LIR_Opr dest, LIR_Opr tmp); |
272 void atomic_op(LIR_Code code, LIR_Opr src, LIR_Opr data, LIR_Opr dest, LIR_Opr tmp); |
264 |
273 |
265 #ifdef TARGET_ARCH_x86 |
274 #ifdef TARGET_ARCH_x86 |
266 # include "c1_LIRAssembler_x86.hpp" |
275 # include "c1_LIRAssembler_x86.hpp" |
267 #endif |
276 #endif |
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277 #ifdef TARGET_ARCH_mips |
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278 # include "c1_LIRAssembler_mips.hpp" |
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279 #endif |
268 #ifdef TARGET_ARCH_sparc |
280 #ifdef TARGET_ARCH_sparc |
269 # include "c1_LIRAssembler_sparc.hpp" |
281 # include "c1_LIRAssembler_sparc.hpp" |
270 #endif |
282 #endif |
271 #ifdef TARGET_ARCH_arm |
283 #ifdef TARGET_ARCH_arm |
272 # include "c1_LIRAssembler_arm.hpp" |
284 # include "c1_LIRAssembler_arm.hpp" |