2268 assert(VM_Version::supports_avx() && !vector256 || VM_Version::supports_avx2(), "256 bit integer vectors requires AVX2"); |
2268 assert(VM_Version::supports_avx() && !vector256 || VM_Version::supports_avx2(), "256 bit integer vectors requires AVX2"); |
2269 emit_vex_arith(0x67, dst, nds, src, VEX_SIMD_66, vector256); |
2269 emit_vex_arith(0x67, dst, nds, src, VEX_SIMD_66, vector256); |
2270 } |
2270 } |
2271 |
2271 |
2272 void Assembler::vpermq(XMMRegister dst, XMMRegister src, int imm8, bool vector256) { |
2272 void Assembler::vpermq(XMMRegister dst, XMMRegister src, int imm8, bool vector256) { |
2273 int encode = simd_prefix_and_encode(dst, xnoreg, src, VEX_SIMD_66, VEX_OPCODE_0F_3A, true, vector256); |
2273 assert(VM_Version::supports_avx2(), ""); |
2274 emit_int8(0x00); |
2274 int encode = simd_prefix_and_encode(dst, xnoreg, src, VEX_SIMD_66, VEX_OPCODE_0F_3A, true, vector256); |
2275 emit_int8(0xC0 | encode); |
2275 emit_int8(0x00); |
2276 emit_int8(imm8); |
2276 emit_int8(0xC0 | encode); |
|
2277 emit_int8(imm8); |
2277 } |
2278 } |
2278 |
2279 |
2279 void Assembler::pcmpestri(XMMRegister dst, Address src, int imm8) { |
2280 void Assembler::pcmpestri(XMMRegister dst, Address src, int imm8) { |
2280 assert(VM_Version::supports_sse4_2(), ""); |
2281 assert(VM_Version::supports_sse4_2(), ""); |
2281 InstructionMark im(this); |
2282 InstructionMark im(this); |