262 } |
262 } |
263 } |
263 } |
264 |
264 |
265 #ifdef MIPS |
265 #ifdef MIPS |
266 bool LIR_OprDesc::has_common_register(LIR_Opr opr) const { |
266 bool LIR_OprDesc::has_common_register(LIR_Opr opr) const { |
267 #ifdef _LP64 |
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268 return is_same_register(opr); |
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269 #else |
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270 if (!(is_register() && opr->is_register())) return false; |
267 if (!(is_register() && opr->is_register())) return false; |
271 if (!(kind_field() == opr->kind_field())) return false; |
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272 |
268 |
273 if (is_single_cpu()) { |
269 if (is_single_cpu()) { |
274 if (opr->is_single_cpu()) { |
270 if (opr->is_single_cpu()) { |
275 return as_register() == opr->as_register(); |
271 return as_register() == opr->as_register(); |
276 } else { |
272 } else if (opr->is_double_cpu()) { |
277 Register dst = as_register(); |
273 Register dst = as_register(); |
278 Register lo = opr->as_register_lo(); |
274 Register lo = opr->as_register_lo(); |
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275 #ifdef _LP64 |
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276 if (dst == lo) return true; |
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277 #else |
279 Register hi = opr->as_register_hi(); |
278 Register hi = opr->as_register_hi(); |
280 if (dst == lo || dst == hi) return true; |
279 if (dst == lo || dst == hi) return true; |
281 } |
280 #endif |
282 |
281 } |
283 } else { |
282 |
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283 } else if (is_double_cpu()) { |
284 Register dst_lo = as_register_lo(); |
284 Register dst_lo = as_register_lo(); |
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285 #ifndef _LP64 |
285 Register dst_hi = as_register_hi(); |
286 Register dst_hi = as_register_hi(); |
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287 #endif |
286 |
288 |
287 if (opr->is_single_cpu()) { |
289 if (opr->is_single_cpu()) { |
288 Register src = opr->as_register(); |
290 Register src = opr->as_register(); |
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291 #ifndef _LP64 |
289 if (dst_lo == src || dst_hi == src) return true; |
292 if (dst_lo == src || dst_hi == src) return true; |
290 } else { |
293 #else |
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294 if (dst_lo == src) return true; |
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295 #endif |
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296 } else if (opr->is_double_cpu()) { |
291 Register src_lo = opr->as_register_lo(); |
297 Register src_lo = opr->as_register_lo(); |
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298 #ifndef _LP64 |
292 Register src_hi = opr->as_register_hi(); |
299 Register src_hi = opr->as_register_hi(); |
293 if (dst_lo == src_lo || |
300 if (dst_lo == src_lo || |
294 dst_lo == src_hi || |
301 dst_lo == src_hi || |
295 dst_hi == src_lo || |
302 dst_hi == src_lo || |
296 dst_hi == src_hi) return true; |
303 dst_hi == src_hi) return true; |
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304 #else |
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305 if (dst_lo == src_lo) return true; |
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306 #endif |
297 } |
307 } |
298 } |
308 } |
299 return false; |
309 return false; |
300 #endif |
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301 } |
310 } |
302 #endif |
311 #endif |
303 |
312 |
304 void LIR_Op2::verify() const { |
313 void LIR_Op2::verify() const { |
305 #ifdef ASSERT |
314 #ifdef ASSERT |