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comparison: src/share/vm/c1/c1_LIR.hpp

src/share/vm/c1/c1_LIR.hpp

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20 * or visit www.oracle.com if you need additional information or have any 20 * or visit www.oracle.com if you need additional information or have any
21 * questions. 21 * questions.
22 * 22 *
23 */ 23 */
24 24
25 /*
26 * This file has been modified by Loongson Technology in 2015. These
27 * modifications are Copyright (c) 2015 Loongson Technology, and are made
28 * available on the same license terms set forth above.
29 */
30
25 #ifndef SHARE_VM_C1_C1_LIR_HPP 31 #ifndef SHARE_VM_C1_C1_LIR_HPP
26 #define SHARE_VM_C1_C1_LIR_HPP 32 #define SHARE_VM_C1_C1_LIR_HPP
27 33
28 #include "c1/c1_ValueType.hpp" 34 #include "c1/c1_ValueType.hpp"
29 #include "oops/method.hpp" 35 #include "oops/method.hpp"
453 #endif // X86 459 #endif // X86
454 #if defined(SPARC) || defined(ARM) || defined(PPC) 460 #if defined(SPARC) || defined(ARM) || defined(PPC)
455 FloatRegister as_float_reg () const; 461 FloatRegister as_float_reg () const;
456 FloatRegister as_double_reg () const; 462 FloatRegister as_double_reg () const;
457 #endif 463 #endif
464 #ifdef MIPS64
465 FloatRegister as_float_reg () const;
466 FloatRegister as_double_reg () const;
467
468 FloatRegister as_fpu_lo () const;
469 FloatRegister as_fpu_hi () const;
470
471 #endif
458 472
459 jint as_jint() const { return as_constant_ptr()->as_jint(); } 473 jint as_jint() const { return as_constant_ptr()->as_jint(); }
460 jlong as_jlong() const { return as_constant_ptr()->as_jlong(); } 474 jlong as_jlong() const { return as_constant_ptr()->as_jlong(); }
461 jfloat as_jfloat() const { return as_constant_ptr()->as_jfloat(); } 475 jfloat as_jfloat() const { return as_constant_ptr()->as_jfloat(); }
462 jdouble as_jdouble() const { return as_constant_ptr()->as_jdouble(); } 476 jdouble as_jdouble() const { return as_constant_ptr()->as_jdouble(); }
525 , _index(index) 539 , _index(index)
526 , _scale(times_1) 540 , _scale(times_1)
527 , _type(type) 541 , _type(type)
528 , _disp(0) { verify(); } 542 , _disp(0) { verify(); }
529 543
544 #ifndef MIPS64
530 LIR_Address(LIR_Opr base, intx disp, BasicType type): 545 LIR_Address(LIR_Opr base, intx disp, BasicType type):
546 #else
547 LIR_Address(LIR_Opr base, int disp, BasicType type):
548 #endif
531 _base(base) 549 _base(base)
532 , _index(LIR_OprDesc::illegalOpr()) 550 , _index(LIR_OprDesc::illegalOpr())
533 , _scale(times_1) 551 , _scale(times_1)
534 , _type(type) 552 , _type(type)
535 , _disp(disp) { verify(); } 553 , _disp(disp) { verify(); }
616 static LIR_Opr double_softfp(int reg1, int reg2) { return (LIR_Opr)((reg1 << LIR_OprDesc::reg1_shift) | (reg2 << LIR_OprDesc::reg2_shift) | LIR_OprDesc::double_type | LIR_OprDesc::cpu_register | LIR_OprDesc::double_size); } 634 static LIR_Opr double_softfp(int reg1, int reg2) { return (LIR_Opr)((reg1 << LIR_OprDesc::reg1_shift) | (reg2 << LIR_OprDesc::reg2_shift) | LIR_OprDesc::double_type | LIR_OprDesc::cpu_register | LIR_OprDesc::double_size); }
617 #endif 635 #endif
618 #ifdef SPARC 636 #ifdef SPARC
619 static LIR_Opr double_fpu(int reg1, int reg2) { return (LIR_Opr)(intptr_t)((reg1 << LIR_OprDesc::reg1_shift) | 637 static LIR_Opr double_fpu(int reg1, int reg2) { return (LIR_Opr)(intptr_t)((reg1 << LIR_OprDesc::reg1_shift) |
620 (reg2 << LIR_OprDesc::reg2_shift) | 638 (reg2 << LIR_OprDesc::reg2_shift) |
639 LIR_OprDesc::double_type |
640 LIR_OprDesc::fpu_register |
641 LIR_OprDesc::double_size); }
642 #endif
643 #ifdef MIPS64
644 static LIR_Opr double_fpu(int reg) { return (LIR_Opr)(intptr_t)((reg << LIR_OprDesc::reg1_shift) |
645 (reg << LIR_OprDesc::reg2_shift) |
621 LIR_OprDesc::double_type | 646 LIR_OprDesc::double_type |
622 LIR_OprDesc::fpu_register | 647 LIR_OprDesc::fpu_register |
623 LIR_OprDesc::double_size); } 648 LIR_OprDesc::double_size); }
624 #endif 649 #endif
625 #ifdef X86 650 #ifdef X86
920 , lir_pop 945 , lir_pop
921 , lir_null_check 946 , lir_null_check
922 , lir_return 947 , lir_return
923 , lir_leal 948 , lir_leal
924 , lir_neg 949 , lir_neg
950 #ifndef MIPS64
925 , lir_branch 951 , lir_branch
926 , lir_cond_float_branch 952 , lir_cond_float_branch
953 #endif
927 , lir_move 954 , lir_move
928 , lir_prefetchr 955 , lir_prefetchr
929 , lir_prefetchw 956 , lir_prefetchw
930 , lir_convert 957 , lir_convert
931 , lir_alloc_object 958 , lir_alloc_object
935 , lir_pack64 962 , lir_pack64
936 , lir_unpack64 963 , lir_unpack64
937 , lir_unwind 964 , lir_unwind
938 , end_op1 965 , end_op1
939 , begin_op2 966 , begin_op2
967 #ifdef MIPS64
968 , lir_branch
969 , lir_cond_float_branch
970 , lir_null_check_for_branch
971 #else
940 , lir_cmp 972 , lir_cmp
973 #endif
941 , lir_cmp_l2i 974 , lir_cmp_l2i
942 , lir_ucmp_fd2i 975 , lir_ucmp_fd2i
943 , lir_cmp_fd2i 976 , lir_cmp_fd2i
944 , lir_cmove 977 , lir_cmove
945 , lir_add 978 , lir_add
969 , lir_compare_to 1002 , lir_compare_to
970 , lir_xadd 1003 , lir_xadd
971 , lir_xchg 1004 , lir_xchg
972 , end_op2 1005 , end_op2
973 , begin_op3 1006 , begin_op3
1007 #ifdef MIPS64
1008 , lir_frem
1009 #endif
974 , lir_idiv 1010 , lir_idiv
975 , lir_irem 1011 , lir_irem
976 , end_op3 1012 , end_op3
977 , begin_opJavaCall 1013 , begin_opJavaCall
978 , lir_static_call 1014 , lir_static_call
1419 LIR_Opr tmp() const { return _tmp; } 1455 LIR_Opr tmp() const { return _tmp; }
1420 1456
1421 virtual void verify() const; 1457 virtual void verify() const;
1422 }; 1458 };
1423 1459
1424 1460 #ifndef MIPS64
1425 class LIR_OpBranch: public LIR_Op { 1461 class LIR_OpBranch: public LIR_Op {
1426 friend class LIR_OpVisitState; 1462 friend class LIR_OpVisitState;
1427 1463
1428 private: 1464 private:
1429 LIR_Condition _cond; 1465 LIR_Condition _cond;
1462 1498
1463 virtual void emit_code(LIR_Assembler* masm); 1499 virtual void emit_code(LIR_Assembler* masm);
1464 virtual LIR_OpBranch* as_OpBranch() { return this; } 1500 virtual LIR_OpBranch* as_OpBranch() { return this; }
1465 virtual void print_instr(outputStream* out) const PRODUCT_RETURN; 1501 virtual void print_instr(outputStream* out) const PRODUCT_RETURN;
1466 }; 1502 };
1467 1503 #endif
1468 1504
1469 class ConversionStub; 1505 class ConversionStub;
1470 1506
1471 class LIR_OpConvert: public LIR_Op1 { 1507 class LIR_OpConvert: public LIR_Op1 {
1472 friend class LIR_OpVisitState; 1508 friend class LIR_OpVisitState;
1511 virtual void print_instr(outputStream* out) const PRODUCT_RETURN; 1547 virtual void print_instr(outputStream* out) const PRODUCT_RETURN;
1512 1548
1513 static void print_bytecode(outputStream* out, Bytecodes::Code code) PRODUCT_RETURN; 1549 static void print_bytecode(outputStream* out, Bytecodes::Code code) PRODUCT_RETURN;
1514 }; 1550 };
1515 1551
1516 1552 #ifndef MIPS64
1517 // LIR_OpAllocObj 1553 // LIR_OpAllocObj
1518 class LIR_OpAllocObj : public LIR_Op1 { 1554 class LIR_OpAllocObj : public LIR_Op1 {
1519 friend class LIR_OpVisitState; 1555 friend class LIR_OpVisitState;
1520 1556
1521 private: 1557 private:
1555 1591
1556 virtual void emit_code(LIR_Assembler* masm); 1592 virtual void emit_code(LIR_Assembler* masm);
1557 virtual LIR_OpAllocObj * as_OpAllocObj () { return this; } 1593 virtual LIR_OpAllocObj * as_OpAllocObj () { return this; }
1558 virtual void print_instr(outputStream* out) const PRODUCT_RETURN; 1594 virtual void print_instr(outputStream* out) const PRODUCT_RETURN;
1559 }; 1595 };
1560 1596 #else
1597 class LIR_OpAllocObj : public LIR_Op1 {
1598 friend class LIR_OpVisitState;
1599
1600 private:
1601 LIR_Opr _tmp1;
1602 LIR_Opr _tmp2;
1603 LIR_Opr _tmp3;
1604 LIR_Opr _tmp4;
1605 LIR_Opr _tmp5;
1606 LIR_Opr _tmp6;
1607 int _hdr_size;
1608 int _obj_size;
1609 CodeStub* _stub;
1610 bool _init_check;
1611
1612 public:
1613 LIR_OpAllocObj(LIR_Opr klass, LIR_Opr result,
1614 LIR_Opr t1, LIR_Opr t2, LIR_Opr t3, LIR_Opr t4,LIR_Opr t5, LIR_Opr t6,
1615 int hdr_size, int obj_size, bool init_check, CodeStub* stub)
1616 : LIR_Op1(lir_alloc_object, klass, result)
1617 , _tmp1(t1)
1618 , _tmp2(t2)
1619 , _tmp3(t3)
1620 , _tmp4(t4)
1621 , _tmp5(t5)
1622 , _tmp6(t6)
1623 , _hdr_size(hdr_size)
1624 , _obj_size(obj_size)
1625 , _init_check(init_check)
1626 , _stub(stub) { }
1627
1628 LIR_Opr klass() const { return in_opr(); }
1629 LIR_Opr obj() const { return result_opr(); }
1630 LIR_Opr tmp1() const { return _tmp1; }
1631 LIR_Opr tmp2() const { return _tmp2; }
1632 LIR_Opr tmp3() const { return _tmp3; }
1633 LIR_Opr tmp4() const { return _tmp4; }
1634 LIR_Opr tmp5() const { return _tmp5; }
1635 LIR_Opr tmp6() const { return _tmp6; }
1636 int header_size() const { return _hdr_size; }
1637 int object_size() const { return _obj_size; }
1638 bool init_check() const { return _init_check; }
1639 CodeStub* stub() const { return _stub; }
1640
1641 virtual void emit_code(LIR_Assembler* masm);
1642 virtual LIR_OpAllocObj * as_OpAllocObj () { return this; }
1643 virtual void print_instr(outputStream* out) const PRODUCT_RETURN;
1644 };
1645 #endif
1561 1646
1562 // LIR_OpRoundFP 1647 // LIR_OpRoundFP
1563 class LIR_OpRoundFP : public LIR_Op1 { 1648 class LIR_OpRoundFP : public LIR_Op1 {
1564 friend class LIR_OpVisitState; 1649 friend class LIR_OpVisitState;
1565 1650
1624 virtual bool is_patching() { return _info_for_patch != NULL; } 1709 virtual bool is_patching() { return _info_for_patch != NULL; }
1625 virtual void emit_code(LIR_Assembler* masm); 1710 virtual void emit_code(LIR_Assembler* masm);
1626 virtual LIR_OpTypeCheck* as_OpTypeCheck() { return this; } 1711 virtual LIR_OpTypeCheck* as_OpTypeCheck() { return this; }
1627 void print_instr(outputStream* out) const PRODUCT_RETURN; 1712 void print_instr(outputStream* out) const PRODUCT_RETURN;
1628 }; 1713 };
1629 1714 #ifndef MIPS64
1630 // LIR_Op2 1715 // LIR_Op2
1631 class LIR_Op2: public LIR_Op { 1716 class LIR_Op2: public LIR_Op {
1632 friend class LIR_OpVisitState; 1717 friend class LIR_OpVisitState;
1633 1718
1634 int _fpu_stack_size; // for sin/cos implementation on Intel 1719 int _fpu_stack_size; // for sin/cos implementation on Intel
1733 1818
1734 virtual void emit_code(LIR_Assembler* masm); 1819 virtual void emit_code(LIR_Assembler* masm);
1735 virtual LIR_Op2* as_Op2() { return this; } 1820 virtual LIR_Op2* as_Op2() { return this; }
1736 virtual void print_instr(outputStream* out) const PRODUCT_RETURN; 1821 virtual void print_instr(outputStream* out) const PRODUCT_RETURN;
1737 }; 1822 };
1823 #else
1824 class LIR_Op2: public LIR_Op {
1825 //friend class LIR_Optimizer;
1826 friend class LIR_OpVisitState;
1827 protected:
1828 LIR_Opr _opr1;
1829 LIR_Opr _opr2;
1830 BasicType _type;
1831 LIR_Opr _tmp1;
1832 LIR_Opr _tmp2;
1833 LIR_Opr _tmp3;
1834 LIR_Opr _tmp4;
1835 LIR_Opr _tmp5;
1836
1837 virtual void verify() const;
1838 public:
1839 LIR_Op2(LIR_Code code, LIR_Condition condition, LIR_Opr opr1, LIR_Opr opr2,
1840 CodeEmitInfo* info = NULL, BasicType type = T_ILLEGAL)
1841 : LIR_Op(code, LIR_OprFact::illegalOpr, info),
1842 _opr1(opr1), _opr2(opr2),
1843 _type(type),
1844 _tmp1(LIR_OprFact::illegalOpr),
1845 _tmp2(LIR_OprFact::illegalOpr),
1846 _tmp3(LIR_OprFact::illegalOpr),
1847 _tmp4(LIR_OprFact::illegalOpr),
1848 _tmp5(LIR_OprFact::illegalOpr) {
1849 }
1850
1851 LIR_Op2(LIR_Code code, LIR_Opr opr1, LIR_Opr opr2, LIR_Opr result = LIR_OprFact::illegalOpr,
1852 CodeEmitInfo* info = NULL, BasicType type = T_ILLEGAL)
1853 : LIR_Op(code, result, info),
1854 _opr1(opr1), _opr2(opr2),
1855 _type(type),
1856 _tmp1(LIR_OprFact::illegalOpr),
1857 _tmp2(LIR_OprFact::illegalOpr),
1858 _tmp3(LIR_OprFact::illegalOpr),
1859 _tmp4(LIR_OprFact::illegalOpr),
1860 _tmp5(LIR_OprFact::illegalOpr) {
1861
1862 assert(is_in_range(code, begin_op2, end_op2), "code check");
1863 }
1864
1865
1866 LIR_Op2(LIR_Code code, LIR_Opr opr1, LIR_Opr opr2, LIR_Opr result, LIR_Opr tmp1, LIR_Opr tmp2 = LIR_OprFact::illegalOpr, LIR_Opr tmp3 = LIR_OprFact::illegalOpr, LIR_Opr tmp4 = LIR_OprFact::illegalOpr, LIR_Opr tmp5 = LIR_OprFact::illegalOpr)
1867 : LIR_Op(code, result, NULL),
1868 _opr1(opr1), _opr2(opr2),
1869 _type(T_ILLEGAL),
1870 _tmp1(tmp1),
1871 _tmp2(tmp2),
1872 _tmp3(tmp3),
1873 _tmp4(tmp4),
1874 _tmp5(tmp5) {
1875 assert(is_in_range(code, begin_op2, end_op2), "code check");
1876 }
1877
1878 LIR_Opr in_opr1() const { return _opr1; }
1879 LIR_Opr in_opr2() const { return _opr2; }
1880 BasicType type() const { return _type; }
1881 LIR_Opr tmp1_opr() const { return _tmp1; }
1882 LIR_Opr tmp2_opr() const { return _tmp2; }
1883 LIR_Opr tmp3_opr() const { return _tmp3; }
1884 LIR_Opr tmp4_opr() const { return _tmp4; }
1885 LIR_Opr tmp5_opr() const { return _tmp5; }
1886
1887
1888 void set_in_opr1(LIR_Opr opr) { _opr1 = opr; }
1889 void set_in_opr2(LIR_Opr opr) { _opr2 = opr; }
1890 // where is the defination of LIR_AbstractAssembler?, 12/21,2006, jerome
1891 //virtual void emit_code(LIR_AbstractAssembler* masm);
1892 virtual void emit_code(LIR_Assembler* masm);
1893 virtual LIR_Op2* as_Op2() { return this; }
1894
1895 // virtual void print_instr() const PRODUCT_RETURN;
1896 virtual void print_instr(outputStream* out) const PRODUCT_RETURN;
1897 };
1898
1899
1900 class LIR_OpBranch: public LIR_Op2 {
1901 friend class LIR_OpVisitState;
1902 public:
1903
1904 private:
1905 LIR_Condition _cond;
1906 BasicType _type;
1907 Label* _label;
1908 BlockBegin* _block; // if this is a branch to a block, this is the block
1909 BlockBegin* _ublock; // if this is a float branch , this is the unorder block
1910 CodeStub* _stub; // if this is a branch to a stub, this is the stub
1911
1912 public:
1913 // these are temporary constructors until we start using the conditional register
1914 LIR_OpBranch(LIR_Condition cond, LIR_Opr left, LIR_Opr right, Label* lbl)
1915 : LIR_Op2(lir_branch, left, right, LIR_OprFact::illegalOpr, (CodeEmitInfo*)(NULL)),
1916 _cond(cond), _label(lbl), _block(NULL), _ublock(NULL),_stub(NULL)
1917 {
1918 }
1919
1920 LIR_OpBranch(LIR_Condition cond, LIR_Opr left, LIR_Opr right, BasicType type, BlockBegin* block);
1921
1922 LIR_OpBranch(LIR_Condition cond, LIR_Opr left, LIR_Opr right, BasicType type, CodeStub* stub);
1923
1924 //LIR_OpBranch(LIR_Condition cond, BasicType type, CodeStub* stub);
1925
1926 LIR_OpBranch(LIR_Condition cond, LIR_Opr left, LIR_Opr right, BasicType type,
1927 BlockBegin *block,BlockBegin *ublock);
1928
1929 LIR_Condition cond() const { return _cond; }
1930 BasicType type() const { return _type; }
1931 LIR_Opr left() const { return in_opr1(); }
1932 LIR_Opr right() const { return in_opr2(); }
1933 Label* label() const { return _label; }
1934 BlockBegin* block() const { return _block; }
1935 BlockBegin* ublock() const { return _ublock; }
1936 CodeStub* stub() const { return _stub; }
1937
1938
1939 void change_block(BlockBegin* b);
1940 void change_ublock(BlockBegin* b);
1941 void negate_cond();
1942
1943
1944 // 12/21,06,jerome
1945 //virtual void emit_code(LIR_AbstractAssembler* masm);
1946 virtual void emit_code(LIR_Assembler* masm);
1947 virtual LIR_OpBranch* as_OpBranch() { return this; }
1948 //virtual void print_instr() const PRODUCT_RETURN;
1949 virtual void print_instr(outputStream* out) const PRODUCT_RETURN;
1950
1951 };
1952 #endif
1953
1954 #ifndef MIPS64
1738 1955
1739 class LIR_OpAllocArray : public LIR_Op { 1956 class LIR_OpAllocArray : public LIR_Op {
1740 friend class LIR_OpVisitState; 1957 friend class LIR_OpVisitState;
1741 1958
1742 private: 1959 private:
1773 1990
1774 virtual void emit_code(LIR_Assembler* masm); 1991 virtual void emit_code(LIR_Assembler* masm);
1775 virtual LIR_OpAllocArray * as_OpAllocArray () { return this; } 1992 virtual LIR_OpAllocArray * as_OpAllocArray () { return this; }
1776 virtual void print_instr(outputStream* out) const PRODUCT_RETURN; 1993 virtual void print_instr(outputStream* out) const PRODUCT_RETURN;
1777 }; 1994 };
1995 #else
1996 class LIR_OpAllocArray : public LIR_Op {
1997 friend class LIR_OpVisitState;
1998
1999 private:
2000 LIR_Opr _klass;
2001 LIR_Opr _len;
2002 LIR_Opr _tmp1;
2003 LIR_Opr _tmp2;
2004 LIR_Opr _tmp3;
2005 LIR_Opr _tmp4;
2006 LIR_Opr _tmp5;
2007 BasicType _type;
2008 CodeStub* _stub;
2009
2010 public:
2011 LIR_OpAllocArray(LIR_Opr klass, LIR_Opr len, LIR_Opr result, LIR_Opr t1, LIR_Opr t2, LIR_Opr t3, LIR_Opr t4, LIR_Opr t5, BasicType type, CodeStub* stub)
2012 : LIR_Op(lir_alloc_array, result, NULL)
2013 , _klass(klass)
2014 , _len(len)
2015 , _tmp1(t1)
2016 , _tmp2(t2)
2017 , _tmp3(t3)
2018 , _tmp4(t4)
2019 , _tmp5(t5)
2020 , _type(type)
2021 , _stub(stub) {}
2022
2023 LIR_Opr klass() const { return _klass; }
2024 LIR_Opr len() const { return _len; }
2025 LIR_Opr obj() const { return result_opr(); }
2026 LIR_Opr tmp1() const { return _tmp1; }
2027 LIR_Opr tmp2() const { return _tmp2; }
2028 LIR_Opr tmp3() const { return _tmp3; }
2029 LIR_Opr tmp4() const { return _tmp4; }
2030 LIR_Opr tmp5() const { return _tmp5; }
2031 BasicType type() const { return _type; }
2032 CodeStub* stub() const { return _stub; }
2033
2034 virtual void emit_code(LIR_Assembler* masm);
2035 virtual LIR_OpAllocArray * as_OpAllocArray () { return this; }
2036 virtual void print_instr(outputStream* out) const PRODUCT_RETURN;
2037 };
2038 #endif
1778 2039
1779 2040
1780 class LIR_Op3: public LIR_Op { 2041 class LIR_Op3: public LIR_Op {
1781 friend class LIR_OpVisitState; 2042 friend class LIR_OpVisitState;
1782 2043
2166 } 2427 }
2167 2428
2168 void push(LIR_Opr opr) { append(new LIR_Op1(lir_push, opr)); } 2429 void push(LIR_Opr opr) { append(new LIR_Op1(lir_push, opr)); }
2169 void pop(LIR_Opr reg) { append(new LIR_Op1(lir_pop, reg)); } 2430 void pop(LIR_Opr reg) { append(new LIR_Op1(lir_pop, reg)); }
2170 2431
2432 #ifndef MIPS64
2171 void cmp(LIR_Condition condition, LIR_Opr left, LIR_Opr right, CodeEmitInfo* info = NULL) { 2433 void cmp(LIR_Condition condition, LIR_Opr left, LIR_Opr right, CodeEmitInfo* info = NULL) {
2172 append(new LIR_Op2(lir_cmp, condition, left, right, info)); 2434 append(new LIR_Op2(lir_cmp, condition, left, right, info));
2173 } 2435 }
2174 void cmp(LIR_Condition condition, LIR_Opr left, int right, CodeEmitInfo* info = NULL) { 2436 void cmp(LIR_Condition condition, LIR_Opr left, int right, CodeEmitInfo* info = NULL) {
2175 cmp(condition, left, LIR_OprFact::intConst(right), info); 2437 cmp(condition, left, LIR_OprFact::intConst(right), info);
2180 2442
2181 void cmove(LIR_Condition condition, LIR_Opr src1, LIR_Opr src2, LIR_Opr dst, BasicType type) { 2443 void cmove(LIR_Condition condition, LIR_Opr src1, LIR_Opr src2, LIR_Opr dst, BasicType type) {
2182 append(new LIR_Op2(lir_cmove, condition, src1, src2, dst, type)); 2444 append(new LIR_Op2(lir_cmove, condition, src1, src2, dst, type));
2183 } 2445 }
2184 2446
2447 #else
2448 void null_check_for_branch(LIR_Condition condition, LIR_Opr left, LIR_Opr right,
2449 CodeEmitInfo* info = NULL) {
2450 append(new LIR_Op2(lir_null_check_for_branch, condition, left, right, info));
2451 }
2452
2453 void null_check_for_branch(LIR_Condition condition, LIR_Opr left, int right,
2454 CodeEmitInfo* info = NULL) {
2455 append(new LIR_Op2(lir_null_check_for_branch, condition, left, LIR_OprFact::intConst(right), info));
2456 }
2457
2458 void null_check_for_branch(LIR_Condition condition, LIR_Opr base, int disp, int c,
2459 CodeEmitInfo* info) {
2460 append(new LIR_Op2(lir_null_check_for_branch, condition,
2461 LIR_OprFact::address(new LIR_Address(base, disp, T_INT)),
2462 LIR_OprFact::intConst(c),
2463 info, T_INT));
2464 }
2465
2466 void null_check_branch(LIR_Condition condition, LIR_Opr reg, LIR_Address* addr,
2467 CodeEmitInfo* info) {
2468 append(new LIR_Op2(lir_null_check_for_branch, condition,
2469 reg,
2470 LIR_OprFact::address(addr),
2471 info));
2472 }
2473
2474 #endif
2475 #ifndef MIPS64
2185 void cas_long(LIR_Opr addr, LIR_Opr cmp_value, LIR_Opr new_value, 2476 void cas_long(LIR_Opr addr, LIR_Opr cmp_value, LIR_Opr new_value,
2186 LIR_Opr t1, LIR_Opr t2, LIR_Opr result = LIR_OprFact::illegalOpr); 2477 LIR_Opr t1, LIR_Opr t2, LIR_Opr result = LIR_OprFact::illegalOpr);
2187 void cas_obj(LIR_Opr addr, LIR_Opr cmp_value, LIR_Opr new_value, 2478 void cas_obj(LIR_Opr addr, LIR_Opr cmp_value, LIR_Opr new_value,
2188 LIR_Opr t1, LIR_Opr t2, LIR_Opr result = LIR_OprFact::illegalOpr); 2479 LIR_Opr t1, LIR_Opr t2, LIR_Opr result = LIR_OprFact::illegalOpr);
2189 void cas_int(LIR_Opr addr, LIR_Opr cmp_value, LIR_Opr new_value, 2480 void cas_int(LIR_Opr addr, LIR_Opr cmp_value, LIR_Opr new_value,
2190 LIR_Opr t1, LIR_Opr t2, LIR_Opr result = LIR_OprFact::illegalOpr); 2481 LIR_Opr t1, LIR_Opr t2, LIR_Opr result = LIR_OprFact::illegalOpr);
2482 #else
2483 void cas_long(LIR_Opr addr, LIR_Opr cmp_value, LIR_Opr new_value, LIR_Opr t1, LIR_Opr t2, LIR_Opr result);
2484 void cas_obj(LIR_Opr addr, LIR_Opr cmp_value, LIR_Opr new_value, LIR_Opr t1, LIR_Opr t2, LIR_Opr result);
2485 void cas_int(LIR_Opr addr, LIR_Opr cmp_value, LIR_Opr new_value, LIR_Opr t1, LIR_Opr t2, LIR_Opr result);
2486 #endif
2191 2487
2192 void abs (LIR_Opr from, LIR_Opr to, LIR_Opr tmp) { append(new LIR_Op2(lir_abs , from, tmp, to)); } 2488 void abs (LIR_Opr from, LIR_Opr to, LIR_Opr tmp) { append(new LIR_Op2(lir_abs , from, tmp, to)); }
2193 void sqrt(LIR_Opr from, LIR_Opr to, LIR_Opr tmp) { append(new LIR_Op2(lir_sqrt, from, tmp, to)); } 2489 void sqrt(LIR_Opr from, LIR_Opr to, LIR_Opr tmp) { append(new LIR_Op2(lir_sqrt, from, tmp, to)); }
2194 void log (LIR_Opr from, LIR_Opr to, LIR_Opr tmp) { append(new LIR_Op2(lir_log, from, LIR_OprFact::illegalOpr, to, tmp)); } 2490 void log (LIR_Opr from, LIR_Opr to, LIR_Opr tmp) { append(new LIR_Op2(lir_log, from, LIR_OprFact::illegalOpr, to, tmp)); }
2195 void log10 (LIR_Opr from, LIR_Opr to, LIR_Opr tmp) { append(new LIR_Op2(lir_log10, from, LIR_OprFact::illegalOpr, to, tmp)); } 2491 void log10 (LIR_Opr from, LIR_Opr to, LIR_Opr tmp) { append(new LIR_Op2(lir_log10, from, LIR_OprFact::illegalOpr, to, tmp)); }
2218 void store_mem_oop(jobject o, LIR_Opr base, int offset_in_bytes, BasicType type, CodeEmitInfo* info, LIR_PatchCode patch_code = lir_patch_none); 2514 void store_mem_oop(jobject o, LIR_Opr base, int offset_in_bytes, BasicType type, CodeEmitInfo* info, LIR_PatchCode patch_code = lir_patch_none);
2219 void store(LIR_Opr src, LIR_Address* addr, CodeEmitInfo* info = NULL, LIR_PatchCode patch_code = lir_patch_none); 2515 void store(LIR_Opr src, LIR_Address* addr, CodeEmitInfo* info = NULL, LIR_PatchCode patch_code = lir_patch_none);
2220 void volatile_store_mem_reg(LIR_Opr src, LIR_Address* address, CodeEmitInfo* info, LIR_PatchCode patch_code = lir_patch_none); 2516 void volatile_store_mem_reg(LIR_Opr src, LIR_Address* address, CodeEmitInfo* info, LIR_PatchCode patch_code = lir_patch_none);
2221 void volatile_store_unsafe_reg(LIR_Opr src, LIR_Opr base, LIR_Opr offset, BasicType type, CodeEmitInfo* info, LIR_PatchCode patch_code); 2517 void volatile_store_unsafe_reg(LIR_Opr src, LIR_Opr base, LIR_Opr offset, BasicType type, CodeEmitInfo* info, LIR_PatchCode patch_code);
2222 2518
2519 #ifdef MIPS64
2520 void frem(LIR_Opr left, LIR_Opr right, LIR_Opr res, LIR_Opr tmp, CodeEmitInfo* info = NULL);
2521 #endif
2522
2223 void idiv(LIR_Opr left, LIR_Opr right, LIR_Opr res, LIR_Opr tmp, CodeEmitInfo* info); 2523 void idiv(LIR_Opr left, LIR_Opr right, LIR_Opr res, LIR_Opr tmp, CodeEmitInfo* info);
2224 void idiv(LIR_Opr left, int right, LIR_Opr res, LIR_Opr tmp, CodeEmitInfo* info); 2524 void idiv(LIR_Opr left, int right, LIR_Opr res, LIR_Opr tmp, CodeEmitInfo* info);
2225 void irem(LIR_Opr left, LIR_Opr right, LIR_Opr res, LIR_Opr tmp, CodeEmitInfo* info); 2525 void irem(LIR_Opr left, LIR_Opr right, LIR_Opr res, LIR_Opr tmp, CodeEmitInfo* info);
2226 void irem(LIR_Opr left, int right, LIR_Opr res, LIR_Opr tmp, CodeEmitInfo* info); 2526 void irem(LIR_Opr left, int right, LIR_Opr res, LIR_Opr tmp, CodeEmitInfo* info);
2227 2527 #ifndef MIPS64
2228 void allocate_object(LIR_Opr dst, LIR_Opr t1, LIR_Opr t2, LIR_Opr t3, LIR_Opr t4, int header_size, int object_size, LIR_Opr klass, bool init_check, CodeStub* stub); 2528 void allocate_object(LIR_Opr dst, LIR_Opr t1, LIR_Opr t2, LIR_Opr t3, LIR_Opr t4, int header_size, int object_size, LIR_Opr klass, bool init_check, CodeStub* stub);
2229 void allocate_array(LIR_Opr dst, LIR_Opr len, LIR_Opr t1,LIR_Opr t2, LIR_Opr t3,LIR_Opr t4, BasicType type, LIR_Opr klass, CodeStub* stub); 2529 void allocate_array(LIR_Opr dst, LIR_Opr len, LIR_Opr t1,LIR_Opr t2, LIR_Opr t3,LIR_Opr t4, BasicType type, LIR_Opr klass, CodeStub* stub);
2530 #else
2531 void allocate_object(LIR_Opr dst, LIR_Opr t1, LIR_Opr t2, LIR_Opr t3, LIR_Opr t4, LIR_Opr t5, LIR_Opr t6,int header_size, int object_size, LIR_Opr klass, bool init_check, CodeStub* stub);
2532 void allocate_array(LIR_Opr dst, LIR_Opr len, LIR_Opr t1,LIR_Opr t2, LIR_Opr t3,LIR_Opr t4, LIR_Opr t5,BasicType type, LIR_Opr klass, CodeStub* stub);
2533 #endif
2230 2534
2231 // jump is an unconditional branch 2535 // jump is an unconditional branch
2232 void jump(BlockBegin* block) { 2536 void jump(BlockBegin* block) {
2537 #ifndef MIPS64
2233 append(new LIR_OpBranch(lir_cond_always, T_ILLEGAL, block)); 2538 append(new LIR_OpBranch(lir_cond_always, T_ILLEGAL, block));
2539 #else
2540 append(new LIR_OpBranch(lir_cond_always, LIR_OprFact::illegalOpr,LIR_OprFact::illegalOpr,T_ILLEGAL, block));
2541 #endif
2542
2234 } 2543 }
2235 void jump(CodeStub* stub) { 2544 void jump(CodeStub* stub) {
2545 #ifndef MIPS64
2236 append(new LIR_OpBranch(lir_cond_always, T_ILLEGAL, stub)); 2546 append(new LIR_OpBranch(lir_cond_always, T_ILLEGAL, stub));
2237 } 2547 #else
2548 append(new LIR_OpBranch(lir_cond_always, LIR_OprFact::illegalOpr, LIR_OprFact::illegalOpr,T_ILLEGAL, stub));
2549 #endif
2550
2551 }
2552 #ifndef MIPS64
2238 void branch(LIR_Condition cond, BasicType type, Label* lbl) { append(new LIR_OpBranch(cond, type, lbl)); } 2553 void branch(LIR_Condition cond, BasicType type, Label* lbl) { append(new LIR_OpBranch(cond, type, lbl)); }
2239 void branch(LIR_Condition cond, BasicType type, BlockBegin* block) { 2554 void branch(LIR_Condition cond, BasicType type, BlockBegin* block) {
2240 assert(type != T_FLOAT && type != T_DOUBLE, "no fp comparisons"); 2555 assert(type != T_FLOAT && type != T_DOUBLE, "no fp comparisons");
2241 append(new LIR_OpBranch(cond, type, block)); 2556 append(new LIR_OpBranch(cond, type, block));
2242 } 2557 }
2246 } 2561 }
2247 void branch(LIR_Condition cond, BasicType type, BlockBegin* block, BlockBegin* unordered) { 2562 void branch(LIR_Condition cond, BasicType type, BlockBegin* block, BlockBegin* unordered) {
2248 assert(type == T_FLOAT || type == T_DOUBLE, "fp comparisons only"); 2563 assert(type == T_FLOAT || type == T_DOUBLE, "fp comparisons only");
2249 append(new LIR_OpBranch(cond, type, block, unordered)); 2564 append(new LIR_OpBranch(cond, type, block, unordered));
2250 } 2565 }
2566 #else
2567 void branch(LIR_Condition cond, LIR_Opr left, LIR_Opr right, Label* lbl) {
2568 append(new LIR_OpBranch(cond, left, right, lbl));
2569 }
2570
2571 void branch(LIR_Condition cond, LIR_Opr left, LIR_Opr right, BasicType type, BlockBegin* block) {
2572 append(new LIR_OpBranch(cond, left, right, type, block));
2573 }
2574
2575 void branch(LIR_Condition cond, LIR_Opr left, LIR_Opr right, BasicType type, CodeStub* stub) {
2576 append(new LIR_OpBranch(cond, left, right, type, stub));
2577 }
2578
2579 void branch(LIR_Condition cond, LIR_Opr left, LIR_Opr right, BasicType type,
2580 BlockBegin* block, BlockBegin* unordered) {
2581 append(new LIR_OpBranch(cond, left, right, type, block, unordered));
2582 }
2583
2584 #endif
2251 2585
2252 void shift_left(LIR_Opr value, LIR_Opr count, LIR_Opr dst, LIR_Opr tmp); 2586 void shift_left(LIR_Opr value, LIR_Opr count, LIR_Opr dst, LIR_Opr tmp);
2253 void shift_right(LIR_Opr value, LIR_Opr count, LIR_Opr dst, LIR_Opr tmp); 2587 void shift_right(LIR_Opr value, LIR_Opr count, LIR_Opr dst, LIR_Opr tmp);
2254 void unsigned_shift_right(LIR_Opr value, LIR_Opr count, LIR_Opr dst, LIR_Opr tmp); 2588 void unsigned_shift_right(LIR_Opr value, LIR_Opr count, LIR_Opr dst, LIR_Opr tmp);
2255 2589

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