Mercurial > jdk8-mips64-public > hotspot / file comparison

comparison: src/cpu/mips/vm/c1_LIRAssembler_mips.cpp

src/cpu/mips/vm/c1_LIRAssembler_mips.cpp

changeset 9228
617b86d17edb
parent 9224
59272e7eeeed
child 9236
8c78449ff413
equal deleted inserted replaced
9227:f1560009a081 9228:617b86d17edb
339 int oop_index = __ oop_recorder()->allocate_oop_index(o); 339 int oop_index = __ oop_recorder()->allocate_oop_index(o);
340 PatchingStub* patch = new PatchingStub(_masm, patching_id(info), oop_index); 340 PatchingStub* patch = new PatchingStub(_masm, patching_id(info), oop_index);
341 RelocationHolder rspec = oop_Relocation::spec(oop_index); 341 RelocationHolder rspec = oop_Relocation::spec(oop_index);
342 __ relocate(rspec); 342 __ relocate(rspec);
343 #ifndef _LP64 343 #ifndef _LP64
344 //by_css
345 __ lui(reg, Assembler::split_high((int)o)); 344 __ lui(reg, Assembler::split_high((int)o));
346 __ addiu(reg, reg, Assembler::split_low((int)o)); 345 __ addiu(reg, reg, Assembler::split_low((int)o));
347 #else 346 #else
348 //li may not pass NativeMovConstReg::verify. see nativeMovConstReg_at(pc_start()); in PatchingStub::install. by aoqi 347 //li may not pass NativeMovConstReg::verify. see nativeMovConstReg_at(pc_start()); in PatchingStub::install.
349 // __ li48(reg, (long)o);
350 __ li48(reg, (long)o); 348 __ li48(reg, (long)o);
351 #endif 349 #endif
352 // patching_epilog(patch, LIR_Op1::patch_normal, noreg, info); 350 // patching_epilog(patch, LIR_Op1::patch_normal, noreg, info);
353 patching_epilog(patch, lir_patch_normal, reg, info); 351 patching_epilog(patch, lir_patch_normal, reg, info);
354 } 352 }
528 __ add(T3, T3, AT); 526 __ add(T3, T3, AT);
529 __ addi(T3, T3, arrayOopDesc::base_offset_in_bytes(T_CHAR)); 527 __ addi(T3, T3, arrayOopDesc::base_offset_in_bytes(T_CHAR));
530 // Now T3 is the address of the first char in second string(T1) 528 // Now T3 is the address of the first char in second string(T1)
531 529
532 #ifndef _LP64 530 #ifndef _LP64
533 //by_css
534 // compute minimum length (in T4) and difference of lengths (V0) 531 // compute minimum length (in T4) and difference of lengths (V0)
535 Label L; 532 Label L;
536 __ lw (T4, Address(T0, java_lang_String::count_offset_in_bytes())); 533 __ lw (T4, Address(T0, java_lang_String::count_offset_in_bytes()));
537 // the length of the first string(T0) 534 // the length of the first string(T0)
538 __ lw (T5, Address(T1, java_lang_String::count_offset_in_bytes())); 535 __ lw (T5, Address(T1, java_lang_String::count_offset_in_bytes()));
610 void LIR_Assembler::return_op(LIR_Opr result) { 607 void LIR_Assembler::return_op(LIR_Opr result) {
611 assert(result->is_illegal() || !result->is_single_cpu() || result->as_register() == V0, "word returns are in V0"); 608 assert(result->is_illegal() || !result->is_single_cpu() || result->as_register() == V0, "word returns are in V0");
612 // Pop the stack before the safepoint code 609 // Pop the stack before the safepoint code
613 __ remove_frame(initial_frame_size_in_bytes()); 610 __ remove_frame(initial_frame_size_in_bytes());
614 #ifndef _LP64 611 #ifndef _LP64
615 //by aoqi
616 __ lui(AT, Assembler::split_high((intptr_t)os::get_polling_page() 612 __ lui(AT, Assembler::split_high((intptr_t)os::get_polling_page()
617 + (SafepointPollOffset % os::vm_page_size()))); 613 + (SafepointPollOffset % os::vm_page_size())));
618 __ relocate(relocInfo::poll_return_type); 614 __ relocate(relocInfo::poll_return_type);
619 __ lw(AT, AT, Assembler::split_low((intptr_t)os::get_polling_page() 615 __ lw(AT, AT, Assembler::split_low((intptr_t)os::get_polling_page()
620 + (SafepointPollOffset % os::vm_page_size()))); 616 + (SafepointPollOffset % os::vm_page_size())));
621 #else 617 #else
622 #ifndef OPT_SAFEPOINT 618 #ifndef OPT_SAFEPOINT
623 // do not know how to handle relocate yet. do not know li or li64 should be used neither. by aoqi. 20111207 FIXME.
624 __ li48(AT, (intptr_t)os::get_polling_page() + (SafepointPollOffset % os::vm_page_size())); 619 __ li48(AT, (intptr_t)os::get_polling_page() + (SafepointPollOffset % os::vm_page_size()));
625 __ relocate(relocInfo::poll_return_type); 620 __ relocate(relocInfo::poll_return_type);
626 __ lw(AT, AT, 0); 621 __ lw(AT, AT, 0);
627 #else 622 #else
628 __ lui(AT, Assembler::split_high((intptr_t)os::get_polling_page() + (SafepointPollOffset % os::vm_page_size()))); 623 __ lui(AT, Assembler::split_high((intptr_t)os::get_polling_page() + (SafepointPollOffset % os::vm_page_size())));
633 628
634 __ jr(RA); 629 __ jr(RA);
635 __ delayed()->nop(); 630 __ delayed()->nop();
636 } 631 }
637 632
638 //read protect mem to R0 won't cause the exception only in godson-2e, So I modify R0 to AT .@jerome,11/25,2006 633 //read protect mem to R0 won't cause the exception only in godson-2e, So I modify R0 to AT.
639 int LIR_Assembler::safepoint_poll(LIR_Opr tmp, CodeEmitInfo* info) { 634 int LIR_Assembler::safepoint_poll(LIR_Opr tmp, CodeEmitInfo* info) {
640 assert(info != NULL, "info must not be null for safepoint poll"); 635 assert(info != NULL, "info must not be null for safepoint poll");
641 int offset = __ offset(); 636 int offset = __ offset();
642 Register r = tmp->as_register(); 637 Register r = tmp->as_register();
643 #ifndef _LP64 638 #ifndef _LP64
644 //by aoqi
645 __ lui(r, Assembler::split_high((intptr_t)os::get_polling_page() + (SafepointPollOffset % os::vm_page_size()))); 639 __ lui(r, Assembler::split_high((intptr_t)os::get_polling_page() + (SafepointPollOffset % os::vm_page_size())));
646 add_debug_info_for_branch(info); 640 add_debug_info_for_branch(info);
647 __ relocate(relocInfo::poll_type); 641 __ relocate(relocInfo::poll_type);
648 __ lw(AT, r, Assembler::split_low((intptr_t)os::get_polling_page() + (SafepointPollOffset % os::vm_page_size()))); 642 __ lw(AT, r, Assembler::split_low((intptr_t)os::get_polling_page() + (SafepointPollOffset % os::vm_page_size())));
649 #else 643 #else
650 #ifndef OPT_SAFEPOINT 644 #ifndef OPT_SAFEPOINT
651 // do not know how to handle relocate yet. do not know li or li64 should be used neither. by aoqi. 20111207 FIXME.
652 //__ lui(r, Assembler::split_high((intptr_t)os::get_polling_page() + (SafepointPollOffset % os::vm_page_size())));
653 __ li48(r, (intptr_t)os::get_polling_page() + (SafepointPollOffset % os::vm_page_size())); 645 __ li48(r, (intptr_t)os::get_polling_page() + (SafepointPollOffset % os::vm_page_size()));
654 add_debug_info_for_branch(info); 646 add_debug_info_for_branch(info);
655 __ relocate(relocInfo::poll_type); 647 __ relocate(relocInfo::poll_type);
656 //__ lw(AT, r, Assembler::split_low((intptr_t)os::get_polling_page() + (SafepointPollOffset % os::vm_page_size())));
657 __ lw(AT, r, 0); 648 __ lw(AT, r, 0);
658 #else 649 #else
659 __ lui(r, Assembler::split_high((intptr_t)os::get_polling_page() + (SafepointPollOffset % os::vm_page_size()))); 650 __ lui(r, Assembler::split_high((intptr_t)os::get_polling_page() + (SafepointPollOffset % os::vm_page_size())));
660 add_debug_info_for_branch(info); 651 add_debug_info_for_branch(info);
661 __ relocate(relocInfo::poll_type); 652 __ relocate(relocInfo::poll_type);
743 assert (const_addr != NULL, "must create float constant in the constant table"); 734 assert (const_addr != NULL, "must create float constant in the constant table");
744 735
745 if (dest->is_single_fpu()) { 736 if (dest->is_single_fpu()) {
746 __ relocate(relocInfo::internal_pc_type); 737 __ relocate(relocInfo::internal_pc_type);
747 #ifndef _LP64 738 #ifndef _LP64
748 //by_css
749 __ lui(AT, Assembler::split_high((int)const_addr)); 739 __ lui(AT, Assembler::split_high((int)const_addr));
750 __ addiu(AT, AT, Assembler::split_low((int)const_addr)); 740 __ addiu(AT, AT, Assembler::split_low((int)const_addr));
751 #else 741 #else
752 __ li48(AT, (long)const_addr); 742 __ li48(AT, (long)const_addr);
753 #endif 743 #endif
757 assert(dest->is_single_cpu(), "Must be a cpu register."); 747 assert(dest->is_single_cpu(), "Must be a cpu register.");
758 assert(dest->as_register() != AT, "AT can not be allocated."); 748 assert(dest->as_register() != AT, "AT can not be allocated.");
759 749
760 __ relocate(relocInfo::internal_pc_type); 750 __ relocate(relocInfo::internal_pc_type);
761 #ifndef _LP64 751 #ifndef _LP64
762 //by_css
763 __ lui(AT, Assembler::split_high((int)const_addr)); 752 __ lui(AT, Assembler::split_high((int)const_addr));
764 __ addiu(AT, AT, Assembler::split_low((int)const_addr)); 753 __ addiu(AT, AT, Assembler::split_low((int)const_addr));
765 #else 754 #else
766 __ li48(AT, (long)const_addr); 755 __ li48(AT, (long)const_addr);
767 #endif 756 #endif
775 assert (const_addr != NULL, "must create double constant in the constant table"); 764 assert (const_addr != NULL, "must create double constant in the constant table");
776 765
777 if (dest->is_double_fpu()) { 766 if (dest->is_double_fpu()) {
778 __ relocate(relocInfo::internal_pc_type); 767 __ relocate(relocInfo::internal_pc_type);
779 #ifndef _LP64 768 #ifndef _LP64
780 //by_css
781 __ lui(AT, Assembler::split_high((int)const_addr)); 769 __ lui(AT, Assembler::split_high((int)const_addr));
782 __ addiu(AT, AT, Assembler::split_low((int)const_addr)); 770 __ addiu(AT, AT, Assembler::split_low((int)const_addr));
783 __ lwc1(dest->as_double_reg(), AT, 0); 771 __ lwc1(dest->as_double_reg(), AT, 0);
784 __ lwc1(dest->as_double_reg()+1, AT, 4); 772 __ lwc1(dest->as_double_reg()+1, AT, 4);
785 #else 773 #else
790 assert(dest->as_register_lo() != AT, "AT can not be allocated."); 778 assert(dest->as_register_lo() != AT, "AT can not be allocated.");
791 assert(dest->as_register_hi() != AT, "AT can not be allocated."); 779 assert(dest->as_register_hi() != AT, "AT can not be allocated.");
792 780
793 __ relocate(relocInfo::internal_pc_type); 781 __ relocate(relocInfo::internal_pc_type);
794 #ifndef _LP64 782 #ifndef _LP64
795 //by_css
796 __ lui(AT, Assembler::split_high((int)const_addr)); 783 __ lui(AT, Assembler::split_high((int)const_addr));
797 __ addiu(AT, AT, Assembler::split_low((int)const_addr)); 784 __ addiu(AT, AT, Assembler::split_low((int)const_addr));
798 __ lw(dest->as_register_lo(), AT, 0); 785 __ lw(dest->as_register_lo(), AT, 0);
799 __ lw(dest->as_register_hi(), AT, 4); 786 __ lw(dest->as_register_hi(), AT, 4);
800 #else 787 #else
836 } else { 823 } else {
837 int oop_index = __ oop_recorder()->find_index(c->as_jobject()); 824 int oop_index = __ oop_recorder()->find_index(c->as_jobject());
838 RelocationHolder rspec = oop_Relocation::spec(oop_index); 825 RelocationHolder rspec = oop_Relocation::spec(oop_index);
839 __ relocate(rspec); 826 __ relocate(rspec);
840 #ifndef _LP64 827 #ifndef _LP64
841 //by_css
842 __ lui(AT, Assembler::split_high((int)c->as_jobject())); 828 __ lui(AT, Assembler::split_high((int)c->as_jobject()));
843 __ addiu(AT, AT, Assembler::split_low((int)c->as_jobject())); 829 __ addiu(AT, AT, Assembler::split_low((int)c->as_jobject()));
844 #else 830 #else
845 __ li48(AT, (long)c->as_jobject()); 831 __ li48(AT, (long)c->as_jobject());
846 #endif 832 #endif
969 } 955 }
970 } else if (!dest->is_float_kind() && !src->is_float_kind()) { 956 } else if (!dest->is_float_kind() && !src->is_float_kind()) {
971 // int to int moves 957 // int to int moves
972 if (dest->is_single_cpu()) { 958 if (dest->is_single_cpu()) {
973 #ifdef _LP64 959 #ifdef _LP64
974 //FIXME aoqi: copy from x86
975 if (src->type() == T_LONG) { 960 if (src->type() == T_LONG) {
976 // Can do LONG -> OBJECT 961 // Can do LONG -> OBJECT
977 move_regs(src->as_register_lo(), dest->as_register()); 962 move_regs(src->as_register_lo(), dest->as_register());
978 return; 963 return;
979 } 964 }
2480 default: ShouldNotReachHere(); 2465 default: ShouldNotReachHere();
2481 } 2466 }
2482 2467
2483 } else { 2468 } else {
2484 if (opr2->is_address()) { 2469 if (opr2->is_address()) {
2485 //FIXME. aoqi lw or ld_ptr?
2486 if (op->type() == T_INT) 2470 if (op->type() == T_INT)
2487 __ lw(AT, rebase_Address(opr2->pointer()->as_address())); 2471 __ lw(AT, rebase_Address(opr2->pointer()->as_address()));
2488 else 2472 else
2489 __ ld_ptr(AT, rebase_Address(opr2->pointer()->as_address())); 2473 __ ld_ptr(AT, rebase_Address(opr2->pointer()->as_address()));
2490 } else if (opr2->is_stack()) { 2474 } else if (opr2->is_stack()) {
2491 //FIXME. aoqi
2492 __ ld_ptr(AT, frame_map()->address_for_slot(opr2->single_stack_ix())); 2475 __ ld_ptr(AT, frame_map()->address_for_slot(opr2->single_stack_ix()));
2493 } else { 2476 } else {
2494 ShouldNotReachHere(); 2477 ShouldNotReachHere();
2495 } 2478 }
2496 switch (condition) { 2479 switch (condition) {
4015 __ addu(res, lreg, rreg); 3998 __ addu(res, lreg, rreg);
4016 break; 3999 break;
4017 4000
4018 case lir_mul: 4001 case lir_mul:
4019 #ifndef _LP64 4002 #ifndef _LP64
4020 //by aoqi
4021 __ mult(lreg, rreg); 4003 __ mult(lreg, rreg);
4022 #else 4004 #else
4023 __ dmult(lreg, rreg); 4005 __ dmult(lreg, rreg);
4024 #endif 4006 #endif
4025 __ nop(); 4007 __ nop();
4079 switch (code) { 4061 switch (code) {
4080 case lir_mul_strictfp: 4062 case lir_mul_strictfp:
4081 case lir_mul: 4063 case lir_mul:
4082 __ move(AT, c); 4064 __ move(AT, c);
4083 #ifndef _LP64 4065 #ifndef _LP64
4084 //by aoqi
4085 __ mult(lreg, AT); 4066 __ mult(lreg, AT);
4086 #else 4067 #else
4087 __ dmult(lreg, AT); 4068 __ dmult(lreg, AT);
4088 #endif 4069 #endif
4089 __ nop(); 4070 __ nop();
4182 // LP64_ONLY(assert_different_registers(op1_lo, op2_lo)); 4163 // LP64_ONLY(assert_different_registers(op1_lo, op2_lo));
4183 4164
4184 switch (code) { 4165 switch (code) {
4185 case lir_add: 4166 case lir_add:
4186 #ifndef _LP64 4167 #ifndef _LP64
4187 //by aoqi
4188 __ addu(dst_lo, op1_lo, op2_lo); 4168 __ addu(dst_lo, op1_lo, op2_lo);
4189 __ sltu(AT, dst_lo, op2_lo); 4169 __ sltu(AT, dst_lo, op2_lo);
4190 __ addu(dst_hi, op1_hi, op2_hi); 4170 __ addu(dst_hi, op1_hi, op2_hi);
4191 __ addu(dst_hi, dst_hi, AT); 4171 __ addu(dst_hi, dst_hi, AT);
4192 #else 4172 #else
4194 #endif 4174 #endif
4195 break; 4175 break;
4196 4176
4197 case lir_sub: 4177 case lir_sub:
4198 #ifndef _LP64 4178 #ifndef _LP64
4199 //by aoqi
4200 __ subu(dst_lo, op1_lo, op2_lo); 4179 __ subu(dst_lo, op1_lo, op2_lo);
4201 __ sltu(AT, op1_lo, dst_lo); 4180 __ sltu(AT, op1_lo, dst_lo);
4202 __ subu(dst_hi, op1_hi, op2_hi); 4181 __ subu(dst_hi, op1_hi, op2_hi);
4203 __ subu(dst_hi, dst_hi, AT); 4182 __ subu(dst_hi, dst_hi, AT);
4204 #else 4183 #else
4208 4187
4209 case lir_mul: 4188 case lir_mul:
4210 { 4189 {
4211 4190
4212 #ifndef _LP64 4191 #ifndef _LP64
4213 //by aoqi
4214 Label zero, quick, done; 4192 Label zero, quick, done;
4215 //zero? 4193 //zero?
4216 __ orr(AT, op2_lo, op1_lo); 4194 __ orr(AT, op2_lo, op1_lo);
4217 __ beq(AT, R0, zero); 4195 __ beq(AT, R0, zero);
4218 __ delayed(); 4196 __ delayed();
4331 __ sub_d(res, lreg, rreg); 4309 __ sub_d(res, lreg, rreg);
4332 break; 4310 break;
4333 case lir_mul: 4311 case lir_mul:
4334 case lir_mul_strictfp: 4312 case lir_mul_strictfp:
4335 // i dont think we need special handling of this. FIXME 4313 // i dont think we need special handling of this. FIXME
4336 // by yjl 9/13/2005
4337 __ mul_d(res, lreg, rreg); 4314 __ mul_d(res, lreg, rreg);
4338 break; 4315 break;
4339 case lir_div: 4316 case lir_div:
4340 case lir_div_strictfp: 4317 case lir_div_strictfp:
4341 __ div_d(res, lreg, rreg); 4318 __ div_d(res, lreg, rreg);
4361 if (right->is_single_cpu()) { 4338 if (right->is_single_cpu()) {
4362 Register rreg = right->as_register(); 4339 Register rreg = right->as_register();
4363 switch (code) { 4340 switch (code) {
4364 case lir_add: 4341 case lir_add:
4365 #ifndef _LP64 4342 #ifndef _LP64
4366 //by aoqi
4367 __ lw(AT, laddr); 4343 __ lw(AT, laddr);
4368 __ add(AT, AT, rreg); 4344 __ add(AT, AT, rreg);
4369 __ sw(AT, laddr); 4345 __ sw(AT, laddr);
4370 #else 4346 #else
4371 __ ld(AT, laddr); 4347 __ ld(AT, laddr);
4373 __ sd(AT, laddr); 4349 __ sd(AT, laddr);
4374 #endif 4350 #endif
4375 break; 4351 break;
4376 case lir_sub: 4352 case lir_sub:
4377 #ifndef _LP64 4353 #ifndef _LP64
4378 //by aoqi
4379 __ lw(AT, laddr); 4354 __ lw(AT, laddr);
4380 __ sub(AT,AT,rreg); 4355 __ sub(AT,AT,rreg);
4381 __ sw(AT, laddr); 4356 __ sw(AT, laddr);
4382 #else 4357 #else
4383 __ ld(AT, laddr); 4358 __ ld(AT, laddr);
4425 ShouldNotReachHere(); 4400 ShouldNotReachHere();
4426 } 4401 }
4427 } 4402 }
4428 4403
4429 void LIR_Assembler::intrinsic_op(LIR_Code code, LIR_Opr value, LIR_Opr unused, LIR_Opr dest, LIR_Op *op) { 4404 void LIR_Assembler::intrinsic_op(LIR_Code code, LIR_Opr value, LIR_Opr unused, LIR_Opr dest, LIR_Op *op) {
4430 //FIXME,lir_log, lir_log10,lir_abs,lir_sqrt,so many new lir instruction @jerome
4431 if (value->is_double_fpu()) { 4405 if (value->is_double_fpu()) {
4432 // assert(value->fpu_regnrLo() == 0 && dest->fpu_regnrLo() == 0, "both must be on TOS"); 4406 // assert(value->fpu_regnrLo() == 0 && dest->fpu_regnrLo() == 0, "both must be on TOS");
4433 switch(code) { 4407 switch(code) {
4434 case lir_log : //__ flog() ; break; 4408 case lir_log : //__ flog() ; break;
4435 case lir_log10 : //__ flog10() ; 4409 case lir_log10 : //__ flog10() ;
4584 } 4558 }
4585 } 4559 }
4586 } 4560 }
4587 } 4561 }
4588 4562
4589 //done here. aoqi. 12-12 22:25
4590 // we assume that eax and edx can be overwritten 4563 // we assume that eax and edx can be overwritten
4591 void LIR_Assembler::arithmetic_idiv(LIR_Code code, LIR_Opr left, LIR_Opr right, LIR_Opr temp, LIR_Opr result, CodeEmitInfo* info) { 4564 void LIR_Assembler::arithmetic_idiv(LIR_Code code, LIR_Opr left, LIR_Opr right, LIR_Opr temp, LIR_Opr result, CodeEmitInfo* info) {
4592 4565
4593 assert(left->is_single_cpu(), "left must be register"); 4566 assert(left->is_single_cpu(), "left must be register");
4594 assert(right->is_single_cpu() || right->is_constant(), "right must be register or constant"); 4567 assert(right->is_single_cpu() || right->is_constant(), "right must be register or constant");
5252 assert(offset_from_sp_in_bytes < frame_map()->reserved_argument_area_size(), "invalid offset"); 5225 assert(offset_from_sp_in_bytes < frame_map()->reserved_argument_area_size(), "invalid offset");
5253 int oop_index = __ oop_recorder()->find_index(o); 5226 int oop_index = __ oop_recorder()->find_index(o);
5254 RelocationHolder rspec = oop_Relocation::spec(oop_index); 5227 RelocationHolder rspec = oop_Relocation::spec(oop_index);
5255 __ relocate(rspec); 5228 __ relocate(rspec);
5256 #ifndef _LP64 5229 #ifndef _LP64
5257 //by_css
5258 __ lui(AT, Assembler::split_high((int)o)); 5230 __ lui(AT, Assembler::split_high((int)o));
5259 __ addiu(AT, AT, Assembler::split_low((int)o)); 5231 __ addiu(AT, AT, Assembler::split_low((int)o));
5260 #else 5232 #else
5261 __ li48(AT, (long)o); 5233 __ li48(AT, (long)o);
5262 #endif 5234 #endif
6019 if (o == NULL) { 5991 if (o == NULL) {
6020 // This seems wrong as we do not emit relocInfo 5992 // This seems wrong as we do not emit relocInfo
6021 // for classes that are not loaded yet, i.e., they will be 5993 // for classes that are not loaded yet, i.e., they will be
6022 // never GC'd 5994 // never GC'd
6023 #ifndef _LP64 5995 #ifndef _LP64
6024 //by_css
6025 __ lui(reg, Assembler::split_high((int)o)); 5996 __ lui(reg, Assembler::split_high((int)o));
6026 __ addiu(reg, reg, Assembler::split_low((int)o)); 5997 __ addiu(reg, reg, Assembler::split_low((int)o));
6027 #else 5998 #else
6028 __ li48(reg, (long)o); 5999 __ li48(reg, (long)o);
6029 //__ patchable_set48(reg, (long)o); 6000 //__ patchable_set48(reg, (long)o);
6031 } else { 6002 } else {
6032 int oop_index = __ oop_recorder()->find_index(o); 6003 int oop_index = __ oop_recorder()->find_index(o);
6033 RelocationHolder rspec = oop_Relocation::spec(oop_index); 6004 RelocationHolder rspec = oop_Relocation::spec(oop_index);
6034 __ relocate(rspec); 6005 __ relocate(rspec);
6035 #ifndef _LP64 6006 #ifndef _LP64
6036 //by_css
6037 __ lui(reg, Assembler::split_high((int)o)); 6007 __ lui(reg, Assembler::split_high((int)o));
6038 __ addiu(reg, reg, Assembler::split_low((int)o)); 6008 __ addiu(reg, reg, Assembler::split_low((int)o));
6039 #else 6009 #else
6040 __ li48(reg, (long)o); 6010 __ li48(reg, (long)o);
6041 //__ patchable_set48(reg, (long)o); 6011 //__ patchable_set48(reg, (long)o);

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