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comparison: src/share/vm/c1/c1_LIRGenerator.cpp

src/share/vm/c1/c1_LIRGenerator.cpp

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20 * or visit www.oracle.com if you need additional information or have any 20 * or visit www.oracle.com if you need additional information or have any
21 * questions. 21 * questions.
22 * 22 *
23 */ 23 */
24 24
25 /*
26 * This file has been modified by Loongson Technology in 2015. These
27 * modifications are Copyright (c) 2015 Loongson Technology, and are made
28 * available on the same license terms set forth above.
29 */
30
25 #include "precompiled.hpp" 31 #include "precompiled.hpp"
26 #include "c1/c1_Compilation.hpp" 32 #include "c1/c1_Compilation.hpp"
27 #include "c1/c1_FrameMap.hpp" 33 #include "c1/c1_FrameMap.hpp"
28 #include "c1/c1_Instruction.hpp" 34 #include "c1/c1_Instruction.hpp"
29 #include "c1/c1_LIRAssembler.hpp" 35 #include "c1/c1_LIRAssembler.hpp"
305 //-------------------------------------------------------------- 311 //--------------------------------------------------------------
306 312
307 313
308 void LIRGenerator::init() { 314 void LIRGenerator::init() {
309 _bs = Universe::heap()->barrier_set(); 315 _bs = Universe::heap()->barrier_set();
316 #ifdef MIPS64
317 assert(_bs->kind() == BarrierSet::CardTableModRef, "Wrong barrier set kind");
318 CardTableModRefBS* ct = (CardTableModRefBS*)_bs;
319 assert(sizeof(*ct->byte_map_base) == sizeof(jbyte), "adjust this code");
320 //_card_table_base = new LIR_Const((intptr_t)ct->byte_map_base);
321 // //FIXME, untested in 32bit. by aoqi
322 _card_table_base = new LIR_Const(ct->byte_map_base);
323 #endif
324
310 } 325 }
311 326
312 327
313 void LIRGenerator::block_do_prolog(BlockBegin* block) { 328 void LIRGenerator::block_do_prolog(BlockBegin* block) {
314 #ifndef PRODUCT 329 #ifndef PRODUCT
479 494
480 void LIRGenerator::array_range_check(LIR_Opr array, LIR_Opr index, 495 void LIRGenerator::array_range_check(LIR_Opr array, LIR_Opr index,
481 CodeEmitInfo* null_check_info, CodeEmitInfo* range_check_info) { 496 CodeEmitInfo* null_check_info, CodeEmitInfo* range_check_info) {
482 CodeStub* stub = new RangeCheckStub(range_check_info, index); 497 CodeStub* stub = new RangeCheckStub(range_check_info, index);
483 if (index->is_constant()) { 498 if (index->is_constant()) {
499 #ifndef MIPS64
484 cmp_mem_int(lir_cond_belowEqual, array, arrayOopDesc::length_offset_in_bytes(), 500 cmp_mem_int(lir_cond_belowEqual, array, arrayOopDesc::length_offset_in_bytes(),
485 index->as_jint(), null_check_info); 501 index->as_jint(), null_check_info);
486 __ branch(lir_cond_belowEqual, T_INT, stub); // forward branch 502 __ branch(lir_cond_belowEqual, T_INT, stub); // forward branch
487 } else { 503 #else
504 LIR_Opr left = LIR_OprFact::address(new LIR_Address(array, arrayOopDesc::length_offset_in_bytes(), T_INT));
505 LIR_Opr right = LIR_OprFact::intConst(index->as_jint());
506 __ null_check_for_branch(lir_cond_belowEqual, left, right, null_check_info);
507 __ branch(lir_cond_belowEqual, left, right ,T_INT, stub); // forward branch
508 #endif
509 } else {
510 #ifndef MIPS64
488 cmp_reg_mem(lir_cond_aboveEqual, index, array, 511 cmp_reg_mem(lir_cond_aboveEqual, index, array,
489 arrayOopDesc::length_offset_in_bytes(), T_INT, null_check_info); 512 arrayOopDesc::length_offset_in_bytes(), T_INT, null_check_info);
490 __ branch(lir_cond_aboveEqual, T_INT, stub); // forward branch 513 __ branch(lir_cond_aboveEqual, T_INT, stub); // forward branch
514 #else
515 LIR_Opr left = index;
516 LIR_Opr right = LIR_OprFact::address(new LIR_Address( array, arrayOopDesc::length_offset_in_bytes(), T_INT));
517 __ null_check_for_branch(lir_cond_aboveEqual, left, right, null_check_info);
518 __ branch(lir_cond_aboveEqual,left, right ,T_INT, stub); // forward branch
519 #endif
491 } 520 }
492 } 521 }
493 522
494 523
495 void LIRGenerator::nio_range_check(LIR_Opr buffer, LIR_Opr index, LIR_Opr result, CodeEmitInfo* info) { 524 void LIRGenerator::nio_range_check(LIR_Opr buffer, LIR_Opr index, LIR_Opr result, CodeEmitInfo* info) {
496 CodeStub* stub = new RangeCheckStub(info, index, true); 525 CodeStub* stub = new RangeCheckStub(info, index, true);
497 if (index->is_constant()) { 526 if (index->is_constant()) {
527 #ifndef MIPS64
498 cmp_mem_int(lir_cond_belowEqual, buffer, java_nio_Buffer::limit_offset(), index->as_jint(), info); 528 cmp_mem_int(lir_cond_belowEqual, buffer, java_nio_Buffer::limit_offset(), index->as_jint(), info);
499 __ branch(lir_cond_belowEqual, T_INT, stub); // forward branch 529 __ branch(lir_cond_belowEqual, T_INT, stub); // forward branch
500 } else { 530 #else
531 LIR_Opr left = LIR_OprFact::address(new LIR_Address(buffer, java_nio_Buffer::limit_offset(),T_INT));
532 LIR_Opr right = LIR_OprFact::intConst(index->as_jint());
533 __ null_check_for_branch(lir_cond_belowEqual, left, right, info);
534 __ branch(lir_cond_belowEqual,left, right ,T_INT, stub); // forward branch
535 #endif
536 } else {
537 #ifndef MIPS64
501 cmp_reg_mem(lir_cond_aboveEqual, index, buffer, 538 cmp_reg_mem(lir_cond_aboveEqual, index, buffer,
502 java_nio_Buffer::limit_offset(), T_INT, info); 539 java_nio_Buffer::limit_offset(), T_INT, info);
503 __ branch(lir_cond_aboveEqual, T_INT, stub); // forward branch 540 __ branch(lir_cond_aboveEqual, T_INT, stub); // forward branch
541 #else
542 LIR_Opr left = index;
543 LIR_Opr right = LIR_OprFact::address(new LIR_Address( buffer, java_nio_Buffer::limit_offset(), T_INT));
544 __ null_check_for_branch(lir_cond_aboveEqual, left, right, info);
545 __ branch(lir_cond_aboveEqual,left, right ,T_INT, stub); // forward branch
546 #endif
504 } 547 }
505 __ move(index, result); 548 __ move(index, result);
506 } 549 }
507 550
508 551
658 CodeStub* slow_path = new MonitorExitStub(lock, UseFastLocking, monitor_no); 701 CodeStub* slow_path = new MonitorExitStub(lock, UseFastLocking, monitor_no);
659 __ load_stack_address_monitor(monitor_no, lock); 702 __ load_stack_address_monitor(monitor_no, lock);
660 __ unlock_object(hdr, object, lock, scratch, slow_path); 703 __ unlock_object(hdr, object, lock, scratch, slow_path);
661 } 704 }
662 705
663 706 #ifndef MIPS64
664 void LIRGenerator::new_instance(LIR_Opr dst, ciInstanceKlass* klass, LIR_Opr scratch1, LIR_Opr scratch2, LIR_Opr scratch3, LIR_Opr scratch4, LIR_Opr klass_reg, CodeEmitInfo* info) { 707 void LIRGenerator::new_instance(LIR_Opr dst, ciInstanceKlass* klass, LIR_Opr scratch1, LIR_Opr scratch2, LIR_Opr scratch3, LIR_Opr scratch4, LIR_Opr klass_reg, CodeEmitInfo* info) {
708 #else
709 void LIRGenerator::new_instance(LIR_Opr dst, ciInstanceKlass* klass, LIR_Opr scratch1, LIR_Opr scratch2, LIR_Opr scratch3,
710 LIR_Opr scratch4, LIR_Opr scratch5, LIR_Opr scratch6,LIR_Opr klass_reg, CodeEmitInfo* info) {
711 #endif
712
665 klass2reg_with_patching(klass_reg, klass, info); 713 klass2reg_with_patching(klass_reg, klass, info);
666 // If klass is not loaded we do not know if the klass has finalizers: 714 // If klass is not loaded we do not know if the klass has finalizers:
667 if (UseFastNewInstance && klass->is_loaded() 715 if (UseFastNewInstance && klass->is_loaded()
668 && !Klass::layout_helper_needs_slow_path(klass->layout_helper())) { 716 && !Klass::layout_helper_needs_slow_path(klass->layout_helper())) {
669 717
673 721
674 assert(klass->is_loaded(), "must be loaded"); 722 assert(klass->is_loaded(), "must be loaded");
675 // allocate space for instance 723 // allocate space for instance
676 assert(klass->size_helper() >= 0, "illegal instance size"); 724 assert(klass->size_helper() >= 0, "illegal instance size");
677 const int instance_size = align_object_size(klass->size_helper()); 725 const int instance_size = align_object_size(klass->size_helper());
726 #ifndef MIPS64
678 __ allocate_object(dst, scratch1, scratch2, scratch3, scratch4, 727 __ allocate_object(dst, scratch1, scratch2, scratch3, scratch4,
679 oopDesc::header_size(), instance_size, klass_reg, !klass->is_initialized(), slow_path); 728 oopDesc::header_size(), instance_size, klass_reg, !klass->is_initialized(), slow_path);
729 #else
730 __ allocate_object(dst, scratch1, scratch2, scratch3, scratch4, scratch5, scratch6,
731 oopDesc::header_size(), instance_size, klass_reg, !klass->is_initialized(), slow_path);
732
733 #endif
680 } else { 734 } else {
681 CodeStub* slow_path = new NewInstanceStub(klass_reg, dst, klass, info, Runtime1::new_instance_id); 735 CodeStub* slow_path = new NewInstanceStub(klass_reg, dst, klass, info, Runtime1::new_instance_id);
736 #ifndef MIPS64
682 __ branch(lir_cond_always, T_ILLEGAL, slow_path); 737 __ branch(lir_cond_always, T_ILLEGAL, slow_path);
683 __ branch_destination(slow_path->continuation()); 738 __ branch_destination(slow_path->continuation());
739 #else
740 __ branch(lir_cond_always, LIR_OprFact::illegalOpr, LIR_OprFact::illegalOpr, T_ILLEGAL, slow_path);
741 __ branch_destination(slow_path->continuation());
742 #endif
684 } 743 }
685 } 744 }
686 745
687 746
688 static bool is_constant_zero(Instruction* inst) { 747 static bool is_constant_zero(Instruction* inst) {
921 980
922 // move from register to spill 981 // move from register to spill
923 __ move(value, tmp); 982 __ move(value, tmp);
924 return tmp; 983 return tmp;
925 } 984 }
926 985 #ifndef MIPS64
927 void LIRGenerator::profile_branch(If* if_instr, If::Condition cond) { 986 void LIRGenerator::profile_branch(If* if_instr, If::Condition cond) {
928 if (if_instr->should_profile()) { 987 if (if_instr->should_profile()) {
929 ciMethod* method = if_instr->profiled_method(); 988 ciMethod* method = if_instr->profiled_method();
930 assert(method != NULL, "method should be set if branch is profiled"); 989 assert(method != NULL, "method should be set if branch is profiled");
931 ciMethodData* md = method->method_data_or_null(); 990 ciMethodData* md = method->method_data_or_null();
958 LIR_Address* fake_incr_value = new LIR_Address(data_reg, DataLayout::counter_increment, T_INT); 1017 LIR_Address* fake_incr_value = new LIR_Address(data_reg, DataLayout::counter_increment, T_INT);
959 __ leal(LIR_OprFact::address(fake_incr_value), data_reg); 1018 __ leal(LIR_OprFact::address(fake_incr_value), data_reg);
960 __ move(data_reg, data_addr); 1019 __ move(data_reg, data_addr);
961 } 1020 }
962 } 1021 }
1022 #else
1023 void LIRGenerator::profile_branch(If* if_instr, If::Condition cond , LIR_Opr left, LIR_Opr right) {
1024 if (if_instr->should_profile()) {
1025 ciMethod* method = if_instr->profiled_method();
1026 assert(method != NULL, "method should be set if branch is profiled");
1027 ciMethodData* md = method->method_data_or_null();
1028 if (md == NULL) {
1029 bailout("out of memory building methodDataOop");
1030 return;
1031 }
1032 ciProfileData* data = md->bci_to_data(if_instr->profiled_bci());
1033 assert(data != NULL, "must have profiling data");
1034 assert(data->is_BranchData(), "need BranchData for two-way branches");
1035 int taken_count_offset = md->byte_offset_of_slot(data, BranchData::taken_offset());
1036 int not_taken_count_offset = md->byte_offset_of_slot(data, BranchData::not_taken_offset());
1037 if (if_instr->is_swapped()) {
1038 int t = taken_count_offset;
1039 taken_count_offset = not_taken_count_offset;
1040 not_taken_count_offset = t;
1041 }
1042 LIR_Opr md_reg = new_register(T_METADATA);
1043 __ metadata2reg(md->constant_encoding(), md_reg);
1044 //__ move(LIR_OprFact::oopConst(md->constant_encoding()), md_reg);
1045 LIR_Opr data_offset_reg = new_pointer_register();
1046
1047 LIR_Opr opr1 = LIR_OprFact::intConst(taken_count_offset);
1048 LIR_Opr opr2 = LIR_OprFact::intConst(not_taken_count_offset);
1049 LabelObj* skip = new LabelObj();
1050
1051 __ move(opr1, data_offset_reg);
1052 __ branch( lir_cond(cond), left, right, skip->label());
1053 __ move(opr2, data_offset_reg);
1054 __ branch_destination(skip->label());
1055
1056 LIR_Opr data_reg = new_pointer_register();
1057 LIR_Opr tmp_reg = new_pointer_register();
1058 // LIR_Address* data_addr = new LIR_Address(md_reg, data_offset_reg, T_INT);
1059 __ move(data_offset_reg, tmp_reg);
1060 __ add(tmp_reg, md_reg, tmp_reg);
1061 LIR_Address* data_addr = new LIR_Address(tmp_reg, 0, T_INT);
1062 __ move(LIR_OprFact::address(data_addr), data_reg);
1063 LIR_Address* fake_incr_value = new LIR_Address(data_reg, DataLayout::counter_increment, T_INT);
1064 // Use leal instead of add to avoid destroying condition codes on x86
1065 __ leal(LIR_OprFact::address(fake_incr_value), data_reg);
1066 __ move(data_reg, LIR_OprFact::address(data_addr));
1067 }
1068 }
1069
1070 #endif
963 1071
964 // Phi technique: 1072 // Phi technique:
965 // This is about passing live values from one basic block to the other. 1073 // This is about passing live values from one basic block to the other.
966 // In code generated with Java it is rather rare that more than one 1074 // In code generated with Java it is rather rare that more than one
967 // value is on the stack from one basic block to the other. 1075 // value is on the stack from one basic block to the other.
1084 if (oc) { 1192 if (oc) {
1085 return oc->constant_value(); 1193 return oc->constant_value();
1086 } 1194 }
1087 return NULL; 1195 return NULL;
1088 } 1196 }
1197 #ifdef MIPS64
1198 void LIRGenerator::write_barrier(LIR_Opr addr) {
1199 if (addr->is_address()) {
1200 LIR_Address* address = (LIR_Address*)addr;
1201 LIR_Opr ptr = new_register(T_OBJECT);
1202 if (!address->index()->is_valid() && address->disp() == 0) {
1203 __ move(address->base(), ptr);
1204 } else {
1205 __ leal(addr, ptr);
1206 }
1207 addr = ptr;
1208 }
1209 assert(addr->is_register(), "must be a register at this point");
1210
1211 LIR_Opr tmp = new_pointer_register();
1212 if (TwoOperandLIRForm) {
1213 __ move(addr, tmp);
1214 __ unsigned_shift_right(tmp, CardTableModRefBS::card_shift, tmp);
1215 } else {
1216 __ unsigned_shift_right(addr, CardTableModRefBS::card_shift, tmp);
1217 }
1218 if (can_inline_as_constant(card_table_base())) {
1219 __ move(LIR_OprFact::intConst(0), new LIR_Address(tmp, card_table_base()->as_jint(), T_BYTE));
1220 } else {
1221 __ add(tmp, load_constant(card_table_base()), tmp);
1222 __ move(LIR_OprFact::intConst(0), new LIR_Address(tmp, 0, T_BYTE));
1223 }
1224 }
1225 #endif
1089 1226
1090 1227
1091 void LIRGenerator::do_ExceptionObject(ExceptionObject* x) { 1228 void LIRGenerator::do_ExceptionObject(ExceptionObject* x) {
1092 assert(block()->is_set(BlockBegin::exception_entry_flag), "ExceptionObject only allowed in exception handler block"); 1229 assert(block()->is_set(BlockBegin::exception_entry_flag), "ExceptionObject only allowed in exception handler block");
1093 assert(block()->next() == x, "ExceptionObject must be first instruction of block"); 1230 assert(block()->next() == x, "ExceptionObject must be first instruction of block");
1469 PtrQueue::byte_offset_of_active()), 1606 PtrQueue::byte_offset_of_active()),
1470 flag_type); 1607 flag_type);
1471 // Read the marking-in-progress flag. 1608 // Read the marking-in-progress flag.
1472 LIR_Opr flag_val = new_register(T_INT); 1609 LIR_Opr flag_val = new_register(T_INT);
1473 __ load(mark_active_flag_addr, flag_val); 1610 __ load(mark_active_flag_addr, flag_val);
1611 #ifndef MIPS64
1474 __ cmp(lir_cond_notEqual, flag_val, LIR_OprFact::intConst(0)); 1612 __ cmp(lir_cond_notEqual, flag_val, LIR_OprFact::intConst(0));
1613 #endif
1475 1614
1476 LIR_PatchCode pre_val_patch_code = lir_patch_none; 1615 LIR_PatchCode pre_val_patch_code = lir_patch_none;
1477 1616
1478 CodeStub* slow; 1617 CodeStub* slow;
1479 1618
1498 assert(info == NULL, "sanity"); 1637 assert(info == NULL, "sanity");
1499 1638
1500 slow = new G1PreBarrierStub(pre_val); 1639 slow = new G1PreBarrierStub(pre_val);
1501 } 1640 }
1502 1641
1642 #ifndef MIPS64
1503 __ branch(lir_cond_notEqual, T_INT, slow); 1643 __ branch(lir_cond_notEqual, T_INT, slow);
1644 #else
1645 __ branch(lir_cond_notEqual, flag_val, LIR_OprFact::intConst(0), T_INT, slow);
1646 #endif
1504 __ branch_destination(slow->continuation()); 1647 __ branch_destination(slow->continuation());
1505 } 1648 }
1506 1649
1507 void LIRGenerator::G1SATBCardTableModRef_post_barrier(LIR_OprDesc* addr, LIR_OprDesc* new_val) { 1650 void LIRGenerator::G1SATBCardTableModRef_post_barrier(LIR_OprDesc* addr, LIR_OprDesc* new_val) {
1508 // If the "new_val" is a constant NULL, no barrier is necessary. 1651 // If the "new_val" is a constant NULL, no barrier is necessary.
1556 __ leal(new_val, new_val_reg); 1699 __ leal(new_val, new_val_reg);
1557 new_val = new_val_reg; 1700 new_val = new_val_reg;
1558 } 1701 }
1559 assert(new_val->is_register(), "must be a register at this point"); 1702 assert(new_val->is_register(), "must be a register at this point");
1560 1703
1704 #ifndef MIPS64
1561 __ cmp(lir_cond_notEqual, xor_shift_res, LIR_OprFact::intptrConst(NULL_WORD)); 1705 __ cmp(lir_cond_notEqual, xor_shift_res, LIR_OprFact::intptrConst(NULL_WORD));
1562 1706
1707 #endif
1563 CodeStub* slow = new G1PostBarrierStub(addr, new_val); 1708 CodeStub* slow = new G1PostBarrierStub(addr, new_val);
1709 #ifndef MIPS64
1564 __ branch(lir_cond_notEqual, LP64_ONLY(T_LONG) NOT_LP64(T_INT), slow); 1710 __ branch(lir_cond_notEqual, LP64_ONLY(T_LONG) NOT_LP64(T_INT), slow);
1711 #else
1712 __ branch(lir_cond_notEqual, xor_shift_res, LIR_OprFact::intptrConst((intptr_t)NULL_WORD), LP64_ONLY(T_LONG) NOT_LP64(T_INT), slow);
1713 #endif
1565 __ branch_destination(slow->continuation()); 1714 __ branch_destination(slow->continuation());
1566 } 1715 }
1567 1716
1568 #endif // INCLUDE_ALL_GCS 1717 #endif // INCLUDE_ALL_GCS
1569 //////////////////////////////////////////////////////////////////////// 1718 ////////////////////////////////////////////////////////////////////////
1615 } 1764 }
1616 if (can_inline_as_constant(card_table_base)) { 1765 if (can_inline_as_constant(card_table_base)) {
1617 __ move(LIR_OprFact::intConst(0), 1766 __ move(LIR_OprFact::intConst(0),
1618 new LIR_Address(tmp, card_table_base->as_jint(), T_BYTE)); 1767 new LIR_Address(tmp, card_table_base->as_jint(), T_BYTE));
1619 } else { 1768 } else {
1769 #ifndef MIPS64
1620 __ move(LIR_OprFact::intConst(0), 1770 __ move(LIR_OprFact::intConst(0),
1621 new LIR_Address(tmp, load_constant(card_table_base), 1771 new LIR_Address(tmp, load_constant(card_table_base),
1622 T_BYTE)); 1772 T_BYTE));
1773 #else
1774 __ add(tmp, load_constant(card_table_base), tmp);
1775 __ move(LIR_OprFact::intConst(0),
1776 new LIR_Address(tmp, 0,
1777 T_BYTE));
1778 #endif
1623 } 1779 }
1624 #endif // ARM 1780 #endif // ARM
1625 } 1781 }
1626 1782
1627 1783
1836 LIR_Opr result = rlock_result(x); 1992 LIR_Opr result = rlock_result(x);
1837 if (GenerateRangeChecks) { 1993 if (GenerateRangeChecks) {
1838 CodeEmitInfo* info = state_for(x); 1994 CodeEmitInfo* info = state_for(x);
1839 CodeStub* stub = new RangeCheckStub(info, index.result(), true); 1995 CodeStub* stub = new RangeCheckStub(info, index.result(), true);
1840 if (index.result()->is_constant()) { 1996 if (index.result()->is_constant()) {
1997 #ifndef MIPS64
1841 cmp_mem_int(lir_cond_belowEqual, buf.result(), java_nio_Buffer::limit_offset(), index.result()->as_jint(), info); 1998 cmp_mem_int(lir_cond_belowEqual, buf.result(), java_nio_Buffer::limit_offset(), index.result()->as_jint(), info);
1842 __ branch(lir_cond_belowEqual, T_INT, stub); 1999 __ branch(lir_cond_belowEqual, T_INT, stub);
2000 #else
2001 LIR_Opr left = LIR_OprFact::address(new LIR_Address( buf.result(),
2002 java_nio_Buffer::limit_offset(),T_INT));
2003 LIR_Opr right = LIR_OprFact::intConst(index.result()->as_jint());
2004 __ null_check_for_branch(lir_cond_belowEqual, left, right, info);
2005 __ branch(lir_cond_belowEqual,left, right ,T_INT, stub); // forward branch
2006
2007 #endif
1843 } else { 2008 } else {
2009 #ifndef MIPS64
1844 cmp_reg_mem(lir_cond_aboveEqual, index.result(), buf.result(), 2010 cmp_reg_mem(lir_cond_aboveEqual, index.result(), buf.result(),
1845 java_nio_Buffer::limit_offset(), T_INT, info); 2011 java_nio_Buffer::limit_offset(), T_INT, info);
1846 __ branch(lir_cond_aboveEqual, T_INT, stub); 2012 __ branch(lir_cond_aboveEqual, T_INT, stub);
2013 #else
2014 LIR_Opr right = LIR_OprFact::address(new LIR_Address( buf.result(), java_nio_Buffer::limit_offset(),T_INT));
2015 LIR_Opr left = index.result();
2016 __ null_check_for_branch(lir_cond_aboveEqual, left, right, info);
2017 __ branch(lir_cond_aboveEqual, left, right , T_INT, stub); // forward branch
2018 #endif
2019
1847 } 2020 }
1848 __ move(index.result(), result); 2021 __ move(index.result(), result);
1849 } else { 2022 } else {
1850 // Just load the index into the result register 2023 // Just load the index into the result register
1851 __ move(index.result(), result); 2024 __ move(index.result(), result);
1918 // emit array address setup early so it schedules better 2091 // emit array address setup early so it schedules better
1919 LIR_Address* array_addr = emit_array_address(array.result(), index.result(), x->elt_type(), false); 2092 LIR_Address* array_addr = emit_array_address(array.result(), index.result(), x->elt_type(), false);
1920 2093
1921 if (GenerateRangeChecks && needs_range_check) { 2094 if (GenerateRangeChecks && needs_range_check) {
1922 if (StressLoopInvariantCodeMotion && range_check_info->deoptimize_on_exception()) { 2095 if (StressLoopInvariantCodeMotion && range_check_info->deoptimize_on_exception()) {
2096 #ifndef MIPS64
1923 __ branch(lir_cond_always, T_ILLEGAL, new RangeCheckStub(range_check_info, index.result())); 2097 __ branch(lir_cond_always, T_ILLEGAL, new RangeCheckStub(range_check_info, index.result()));
2098 #else
2099 tty->print_cr("LIRGenerator::do_LoadIndexed(LoadIndexed* x) unimplemented yet!");
2100 Unimplemented();
2101 #endif
1924 } else if (use_length) { 2102 } else if (use_length) {
1925 // TODO: use a (modified) version of array_range_check that does not require a 2103 // TODO: use a (modified) version of array_range_check that does not require a
1926 // constant length to be loaded to a register 2104 // constant length to be loaded to a register
2105 #ifndef MIPS64
1927 __ cmp(lir_cond_belowEqual, length.result(), index.result()); 2106 __ cmp(lir_cond_belowEqual, length.result(), index.result());
1928 __ branch(lir_cond_belowEqual, T_INT, new RangeCheckStub(range_check_info, index.result())); 2107 __ branch(lir_cond_belowEqual, T_INT, new RangeCheckStub(range_check_info, index.result()));
2108 #else
2109 __ branch(lir_cond_belowEqual, length.result(), index.result(),T_INT, new RangeCheckStub(range_check_info, index.result()));
2110 #endif
1929 } else { 2111 } else {
1930 array_range_check(array.result(), index.result(), null_check_info, range_check_info); 2112 array_range_check(array.result(), index.result(), null_check_info, range_check_info);
1931 // The range check performs the null check, so clear it out for the load 2113 // The range check performs the null check, so clear it out for the load
1932 null_check_info = NULL; 2114 null_check_info = NULL;
1933 } 2115 }
2086 LIR_Opr tmp = new_pointer_register(); 2268 LIR_Opr tmp = new_pointer_register();
2087 __ convert(Bytecodes::_i2l, index_op, tmp); 2269 __ convert(Bytecodes::_i2l, index_op, tmp);
2088 index_op = tmp; 2270 index_op = tmp;
2089 } 2271 }
2090 #endif 2272 #endif
2273 #ifndef MIPS64
2091 addr = new LIR_Address(base_op, index_op, dst_type); 2274 addr = new LIR_Address(base_op, index_op, dst_type);
2275 #else
2276 #ifdef _LP64
2277 LIR_Opr ptr = new_register(T_LONG);
2278 #else
2279 LIR_Opr ptr = new_register(T_INT);
2280 #endif
2281 __ move(base_op, ptr);
2282 if(index_op -> is_valid())
2283 __ add(ptr, index_op, ptr);
2284 addr = new LIR_Address(ptr, 0, dst_type);
2285 #endif
2092 } else { 2286 } else {
2093 LIR_Opr tmp = new_pointer_register(); 2287 LIR_Opr tmp = new_pointer_register();
2094 __ shift_left(index_op, log2_scale, tmp); 2288 __ shift_left(index_op, log2_scale, tmp);
2095 addr = new LIR_Address(base_op, tmp, dst_type); 2289 addr = new LIR_Address(base_op, tmp, dst_type);
2096 } 2290 }
2284 } else { 2478 } else {
2285 assert(off.type()->is_long(), "what else?"); 2479 assert(off.type()->is_long(), "what else?");
2286 referent_off = new_register(T_LONG); 2480 referent_off = new_register(T_LONG);
2287 __ move(LIR_OprFact::longConst(java_lang_ref_Reference::referent_offset), referent_off); 2481 __ move(LIR_OprFact::longConst(java_lang_ref_Reference::referent_offset), referent_off);
2288 } 2482 }
2483 #ifndef MIPS64
2289 __ cmp(lir_cond_notEqual, off.result(), referent_off); 2484 __ cmp(lir_cond_notEqual, off.result(), referent_off);
2290 __ branch(lir_cond_notEqual, as_BasicType(off.type()), Lcont->label()); 2485 __ branch(lir_cond_notEqual, as_BasicType(off.type()), Lcont->label());
2486 #else
2487 __ branch(lir_cond_notEqual, off.result(), referent_off, Lcont->label());
2488 #endif
2291 } 2489 }
2292 if (gen_source_check) { 2490 if (gen_source_check) {
2293 // offset is a const and equals referent offset 2491 // offset is a const and equals referent offset
2294 // if (source == null) -> continue 2492 // if (source == null) -> continue
2493 #ifndef MIPS64
2295 __ cmp(lir_cond_equal, src.result(), LIR_OprFact::oopConst(NULL)); 2494 __ cmp(lir_cond_equal, src.result(), LIR_OprFact::oopConst(NULL));
2296 __ branch(lir_cond_equal, T_OBJECT, Lcont->label()); 2495 __ branch(lir_cond_equal, T_OBJECT, Lcont->label());
2496 #else
2497 __ branch(lir_cond_equal, src.result(), LIR_OprFact::oopConst(NULL), Lcont->label());
2498 #endif
2297 } 2499 }
2298 LIR_Opr src_klass = new_register(T_OBJECT); 2500 LIR_Opr src_klass = new_register(T_OBJECT);
2299 if (gen_type_check) { 2501 if (gen_type_check) {
2300 // We have determined that offset == referent_offset && src != null. 2502 // We have determined that offset == referent_offset && src != null.
2301 // if (src->_klass->_reference_type == REF_NONE) -> continue 2503 // if (src->_klass->_reference_type == REF_NONE) -> continue
2302 __ move(new LIR_Address(src.result(), oopDesc::klass_offset_in_bytes(), T_ADDRESS), src_klass); 2504 __ move(new LIR_Address(src.result(), oopDesc::klass_offset_in_bytes(), T_ADDRESS), src_klass);
2303 LIR_Address* reference_type_addr = new LIR_Address(src_klass, in_bytes(InstanceKlass::reference_type_offset()), T_BYTE); 2505 LIR_Address* reference_type_addr = new LIR_Address(src_klass, in_bytes(InstanceKlass::reference_type_offset()), T_BYTE);
2304 LIR_Opr reference_type = new_register(T_INT); 2506 LIR_Opr reference_type = new_register(T_INT);
2305 __ move(reference_type_addr, reference_type); 2507 __ move(reference_type_addr, reference_type);
2508 #ifndef MIPS64
2306 __ cmp(lir_cond_equal, reference_type, LIR_OprFact::intConst(REF_NONE)); 2509 __ cmp(lir_cond_equal, reference_type, LIR_OprFact::intConst(REF_NONE));
2307 __ branch(lir_cond_equal, T_INT, Lcont->label()); 2510 __ branch(lir_cond_equal, T_INT, Lcont->label());
2511 #else
2512 __ branch(lir_cond_equal, reference_type, LIR_OprFact::intConst(REF_NONE), Lcont->label());
2513 #endif
2308 } 2514 }
2309 { 2515 {
2310 // We have determined that src->_klass->_reference_type != REF_NONE 2516 // We have determined that src->_klass->_reference_type != REF_NONE
2311 // so register the value in the referent field with the pre-barrier. 2517 // so register the value in the referent field with the pre-barrier.
2312 pre_barrier(LIR_OprFact::illegalOpr /* addr_opr */, 2518 pre_barrier(LIR_OprFact::illegalOpr /* addr_opr */,
2382 SwitchRange* one_range = x->at(i); 2588 SwitchRange* one_range = x->at(i);
2383 int low_key = one_range->low_key(); 2589 int low_key = one_range->low_key();
2384 int high_key = one_range->high_key(); 2590 int high_key = one_range->high_key();
2385 BlockBegin* dest = one_range->sux(); 2591 BlockBegin* dest = one_range->sux();
2386 if (low_key == high_key) { 2592 if (low_key == high_key) {
2593 #ifndef MIPS64
2387 __ cmp(lir_cond_equal, value, low_key); 2594 __ cmp(lir_cond_equal, value, low_key);
2388 __ branch(lir_cond_equal, T_INT, dest); 2595 __ branch(lir_cond_equal, T_INT, dest);
2596 #else
2597 __ branch(lir_cond_equal, value, LIR_OprFact::intConst(low_key), T_INT, dest);
2598 #endif
2389 } else if (high_key - low_key == 1) { 2599 } else if (high_key - low_key == 1) {
2600 #ifndef MIPS64
2390 __ cmp(lir_cond_equal, value, low_key); 2601 __ cmp(lir_cond_equal, value, low_key);
2391 __ branch(lir_cond_equal, T_INT, dest); 2602 __ branch(lir_cond_equal, T_INT, dest);
2392 __ cmp(lir_cond_equal, value, high_key); 2603 __ cmp(lir_cond_equal, value, high_key);
2393 __ branch(lir_cond_equal, T_INT, dest); 2604 __ branch(lir_cond_equal, T_INT, dest);
2605 #else
2606 __ branch(lir_cond_equal, value, LIR_OprFact::intConst(low_key), T_INT, dest);
2607 __ branch(lir_cond_equal, value, LIR_OprFact::intConst(high_key), T_INT, dest);
2608
2609 #endif
2394 } else { 2610 } else {
2395 LabelObj* L = new LabelObj(); 2611 LabelObj* L = new LabelObj();
2612 #ifndef MIPS64
2396 __ cmp(lir_cond_less, value, low_key); 2613 __ cmp(lir_cond_less, value, low_key);
2397 __ branch(lir_cond_less, T_INT, L->label()); 2614 __ branch(lir_cond_less, T_INT, L->label());
2398 __ cmp(lir_cond_lessEqual, value, high_key); 2615 __ cmp(lir_cond_lessEqual, value, high_key);
2399 __ branch(lir_cond_lessEqual, T_INT, dest); 2616 __ branch(lir_cond_lessEqual, T_INT, dest);
2400 __ branch_destination(L->label()); 2617 __ branch_destination(L->label());
2618 #else
2619 __ branch(lir_cond_less, value, LIR_OprFact::intConst(low_key), L->label());
2620 __ branch(lir_cond_lessEqual, value, LIR_OprFact::intConst(high_key), T_INT, dest);
2621 __ branch_destination(L->label());
2622 #endif
2401 } 2623 }
2402 } 2624 }
2403 __ jump(default_sux); 2625 __ jump(default_sux);
2404 } 2626 }
2405 2627
2481 LIR_Opr value = tag.result(); 2703 LIR_Opr value = tag.result();
2482 if (UseTableRanges) { 2704 if (UseTableRanges) {
2483 do_SwitchRanges(create_lookup_ranges(x), value, x->default_sux()); 2705 do_SwitchRanges(create_lookup_ranges(x), value, x->default_sux());
2484 } else { 2706 } else {
2485 for (int i = 0; i < len; i++) { 2707 for (int i = 0; i < len; i++) {
2708 #ifndef MIPS64
2486 __ cmp(lir_cond_equal, value, i + lo_key); 2709 __ cmp(lir_cond_equal, value, i + lo_key);
2487 __ branch(lir_cond_equal, T_INT, x->sux_at(i)); 2710 __ branch(lir_cond_equal, T_INT, x->sux_at(i));
2711 #else
2712 __ branch(lir_cond_equal, value, LIR_OprFact::intConst(i+lo_key), T_INT, x->sux_at(i));
2713 #endif
2488 } 2714 }
2489 __ jump(x->default_sux()); 2715 __ jump(x->default_sux());
2490 } 2716 }
2491 } 2717 }
2492 2718
2507 if (UseTableRanges) { 2733 if (UseTableRanges) {
2508 do_SwitchRanges(create_lookup_ranges(x), value, x->default_sux()); 2734 do_SwitchRanges(create_lookup_ranges(x), value, x->default_sux());
2509 } else { 2735 } else {
2510 int len = x->length(); 2736 int len = x->length();
2511 for (int i = 0; i < len; i++) { 2737 for (int i = 0; i < len; i++) {
2738 #ifndef MIPS64
2512 __ cmp(lir_cond_equal, value, x->key_at(i)); 2739 __ cmp(lir_cond_equal, value, x->key_at(i));
2513 __ branch(lir_cond_equal, T_INT, x->sux_at(i)); 2740 __ branch(lir_cond_equal, T_INT, x->sux_at(i));
2741 #else
2742 __ branch(lir_cond_equal, value, LIR_OprFact::intConst(x->key_at(i)), T_INT, x->sux_at(i));
2743 #endif
2514 } 2744 }
2515 __ jump(x->default_sux()); 2745 __ jump(x->default_sux());
2516 } 2746 }
2517 } 2747 }
2518 2748
3010 LIRItem t_val(x->tval(), this); 3240 LIRItem t_val(x->tval(), this);
3011 LIRItem f_val(x->fval(), this); 3241 LIRItem f_val(x->fval(), this);
3012 t_val.dont_load_item(); 3242 t_val.dont_load_item();
3013 f_val.dont_load_item(); 3243 f_val.dont_load_item();
3014 LIR_Opr reg = rlock_result(x); 3244 LIR_Opr reg = rlock_result(x);
3015 3245 #ifndef MIPS64
3016 __ cmp(lir_cond(x->cond()), left.result(), right.result()); 3246 __ cmp(lir_cond(x->cond()), left.result(), right.result());
3017 __ cmove(lir_cond(x->cond()), t_val.result(), f_val.result(), reg, as_BasicType(x->x()->type())); 3247 __ cmove(lir_cond(x->cond()), t_val.result(), f_val.result(), reg, as_BasicType(x->x()->type()));
3248 #else
3249 LIR_Opr opr1 = t_val.result();
3250 LIR_Opr opr2 = f_val.result();
3251 LabelObj* skip = new LabelObj();
3252 __ move(opr1, reg);
3253 __ branch(lir_cond(x->cond()), left.result(), right.result(), skip->label());
3254 __ move(opr2, reg);
3255 __ branch_destination(skip->label());
3256 #endif
3018 } 3257 }
3019 3258
3020 void LIRGenerator::do_RuntimeCall(address routine, int expected_arguments, Intrinsic* x) { 3259 void LIRGenerator::do_RuntimeCall(address routine, int expected_arguments, Intrinsic* x) {
3021 assert(x->number_of_arguments() == expected_arguments, "wrong type"); 3260 assert(x->number_of_arguments() == expected_arguments, "wrong type");
3022 LIR_Opr reg = result_register_for(x->type()); 3261 LIR_Opr reg = result_register_for(x->type());
3363 if (notify) { 3602 if (notify) {
3364 LIR_Opr mask = load_immediate(frequency << InvocationCounter::count_shift, T_INT); 3603 LIR_Opr mask = load_immediate(frequency << InvocationCounter::count_shift, T_INT);
3365 LIR_Opr meth = new_register(T_METADATA); 3604 LIR_Opr meth = new_register(T_METADATA);
3366 __ metadata2reg(method->constant_encoding(), meth); 3605 __ metadata2reg(method->constant_encoding(), meth);
3367 __ logical_and(result, mask, result); 3606 __ logical_and(result, mask, result);
3607 #ifndef MIPS64
3368 __ cmp(lir_cond_equal, result, LIR_OprFact::intConst(0)); 3608 __ cmp(lir_cond_equal, result, LIR_OprFact::intConst(0));
3609 #endif
3369 // The bci for info can point to cmp for if's we want the if bci 3610 // The bci for info can point to cmp for if's we want the if bci
3370 CodeStub* overflow = new CounterOverflowStub(info, bci, meth); 3611 CodeStub* overflow = new CounterOverflowStub(info, bci, meth);
3612 #ifndef MIPS64
3371 __ branch(lir_cond_equal, T_INT, overflow); 3613 __ branch(lir_cond_equal, T_INT, overflow);
3614 #else
3615 __ branch(lir_cond_equal, result, LIR_OprFact::intConst(0), T_INT, overflow);
3616 #endif
3372 __ branch_destination(overflow->continuation()); 3617 __ branch_destination(overflow->continuation());
3373 } 3618 }
3374 } 3619 }
3375 3620
3376 void LIRGenerator::do_RuntimeCall(RuntimeCall* x) { 3621 void LIRGenerator::do_RuntimeCall(RuntimeCall* x) {
3478 LIR_Opr right = yin->result(); 3723 LIR_Opr right = yin->result();
3479 3724
3480 CodeEmitInfo *info = state_for(x, x->state()); 3725 CodeEmitInfo *info = state_for(x, x->state());
3481 CodeStub* stub = new PredicateFailedStub(info); 3726 CodeStub* stub = new PredicateFailedStub(info);
3482 3727
3728 #ifndef MIPS64
3483 __ cmp(lir_cond(cond), left, right); 3729 __ cmp(lir_cond(cond), left, right);
3484 __ branch(lir_cond(cond), right->type(), stub); 3730 __ branch(lir_cond(cond), right->type(), stub);
3731 #else
3732 tty->print_cr("LIRGenerator::do_RangeCheckPredicate(RangeCheckPredicate *x) unimplemented yet!");
3733 Unimplemented();
3734 #endif
3485 } 3735 }
3486 } 3736 }
3487 3737
3488 3738
3489 LIR_Opr LIRGenerator::call_runtime(Value arg1, address entry, ValueType* result_type, CodeEmitInfo* info) { 3739 LIR_Opr LIRGenerator::call_runtime(Value arg1, address entry, ValueType* result_type, CodeEmitInfo* info) {

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