1532 |
1532 |
1533 const RegMask Matcher::method_handle_invoke_SP_save_mask() { |
1533 const RegMask Matcher::method_handle_invoke_SP_save_mask() { |
1534 return EBP_REG_mask(); |
1534 return EBP_REG_mask(); |
1535 } |
1535 } |
1536 |
1536 |
|
1537 const RegMask Matcher::mathExactI_result_proj_mask() { |
|
1538 return EAX_REG_mask(); |
|
1539 } |
|
1540 |
|
1541 const RegMask Matcher::mathExactI_flags_proj_mask() { |
|
1542 return INT_FLAGS_mask(); |
|
1543 } |
|
1544 |
1537 // Returns true if the high 32 bits of the value is known to be zero. |
1545 // Returns true if the high 32 bits of the value is known to be zero. |
1538 bool is_operand_hi32_zero(Node* n) { |
1546 bool is_operand_hi32_zero(Node* n) { |
1539 int opc = n->Opcode(); |
1547 int opc = n->Opcode(); |
1540 if (opc == Op_AndL) { |
1548 if (opc == Op_AndL) { |
1541 Node* o2 = n->in(2); |
1549 Node* o2 = n->in(2); |
4920 not_equal(0x5, "ne"); |
4928 not_equal(0x5, "ne"); |
4921 less(0xC, "l"); |
4929 less(0xC, "l"); |
4922 greater_equal(0xD, "ge"); |
4930 greater_equal(0xD, "ge"); |
4923 less_equal(0xE, "le"); |
4931 less_equal(0xE, "le"); |
4924 greater(0xF, "g"); |
4932 greater(0xF, "g"); |
|
4933 overflow(0x0, "o"); |
|
4934 no_overflow(0x1, "no"); |
4925 %} |
4935 %} |
4926 %} |
4936 %} |
4927 |
4937 |
4928 // Comparison Code, unsigned compare. Used by FP also, with |
4938 // Comparison Code, unsigned compare. Used by FP also, with |
4929 // C2 (unordered) turned into GT or LT already. The other bits |
4939 // C2 (unordered) turned into GT or LT already. The other bits |
4937 not_equal(0x5, "ne"); |
4947 not_equal(0x5, "ne"); |
4938 less(0x2, "b"); |
4948 less(0x2, "b"); |
4939 greater_equal(0x3, "nb"); |
4949 greater_equal(0x3, "nb"); |
4940 less_equal(0x6, "be"); |
4950 less_equal(0x6, "be"); |
4941 greater(0x7, "nbe"); |
4951 greater(0x7, "nbe"); |
|
4952 overflow(0x0, "o"); |
|
4953 no_overflow(0x1, "no"); |
4942 %} |
4954 %} |
4943 %} |
4955 %} |
4944 |
4956 |
4945 // Floating comparisons that don't require any fixup for the unordered case |
4957 // Floating comparisons that don't require any fixup for the unordered case |
4946 operand cmpOpUCF() %{ |
4958 operand cmpOpUCF() %{ |
4955 not_equal(0x5, "ne"); |
4967 not_equal(0x5, "ne"); |
4956 less(0x2, "b"); |
4968 less(0x2, "b"); |
4957 greater_equal(0x3, "nb"); |
4969 greater_equal(0x3, "nb"); |
4958 less_equal(0x6, "be"); |
4970 less_equal(0x6, "be"); |
4959 greater(0x7, "nbe"); |
4971 greater(0x7, "nbe"); |
|
4972 overflow(0x0, "o"); |
|
4973 no_overflow(0x1, "no"); |
4960 %} |
4974 %} |
4961 %} |
4975 %} |
4962 |
4976 |
4963 |
4977 |
4964 // Floating comparisons that can be fixed up with extra conditional jumps |
4978 // Floating comparisons that can be fixed up with extra conditional jumps |
4972 not_equal(0x5, "ne"); |
4986 not_equal(0x5, "ne"); |
4973 less(0x2, "b"); |
4987 less(0x2, "b"); |
4974 greater_equal(0x3, "nb"); |
4988 greater_equal(0x3, "nb"); |
4975 less_equal(0x6, "be"); |
4989 less_equal(0x6, "be"); |
4976 greater(0x7, "nbe"); |
4990 greater(0x7, "nbe"); |
|
4991 overflow(0x0, "o"); |
|
4992 no_overflow(0x1, "no"); |
4977 %} |
4993 %} |
4978 %} |
4994 %} |
4979 |
4995 |
4980 // Comparison Code for FP conditional move |
4996 // Comparison Code for FP conditional move |
4981 operand cmpOp_fcmov() %{ |
4997 operand cmpOp_fcmov() %{ |
4982 match(Bool); |
4998 match(Bool); |
4983 |
4999 |
|
5000 predicate(n->as_Bool()->_test._test != BoolTest::overflow && |
|
5001 n->as_Bool()->_test._test != BoolTest::no_overflow); |
4984 format %{ "" %} |
5002 format %{ "" %} |
4985 interface(COND_INTER) %{ |
5003 interface(COND_INTER) %{ |
4986 equal (0x0C8); |
5004 equal (0x0C8); |
4987 not_equal (0x1C8); |
5005 not_equal (0x1C8); |
4988 less (0x0C0); |
5006 less (0x0C0); |
4989 greater_equal(0x1C0); |
5007 greater_equal(0x1C0); |
4990 less_equal (0x0D0); |
5008 less_equal (0x0D0); |
4991 greater (0x1D0); |
5009 greater (0x1D0); |
|
5010 overflow(0x0, "o"); // not really supported by the instruction |
|
5011 no_overflow(0x1, "no"); // not really supported by the instruction |
4992 %} |
5012 %} |
4993 %} |
5013 %} |
4994 |
5014 |
4995 // Comparision Code used in long compares |
5015 // Comparision Code used in long compares |
4996 operand cmpOp_commute() %{ |
5016 operand cmpOp_commute() %{ |
5002 not_equal(0x5, "ne"); |
5022 not_equal(0x5, "ne"); |
5003 less(0xF, "g"); |
5023 less(0xF, "g"); |
5004 greater_equal(0xE, "le"); |
5024 greater_equal(0xE, "le"); |
5005 less_equal(0xD, "ge"); |
5025 less_equal(0xD, "ge"); |
5006 greater(0xC, "l"); |
5026 greater(0xC, "l"); |
|
5027 overflow(0x0, "o"); |
|
5028 no_overflow(0x1, "no"); |
5007 %} |
5029 %} |
5008 %} |
5030 %} |
5009 |
5031 |
5010 //----------OPERAND CLASSES---------------------------------------------------- |
5032 //----------OPERAND CLASSES---------------------------------------------------- |
5011 // Operand Classes are groups of operands that are used as to simplify |
5033 // Operand Classes are groups of operands that are used as to simplify |
7494 %} |
7516 %} |
7495 %} |
7517 %} |
7496 |
7518 |
7497 //----------Arithmetic Instructions-------------------------------------------- |
7519 //----------Arithmetic Instructions-------------------------------------------- |
7498 //----------Addition Instructions---------------------------------------------- |
7520 //----------Addition Instructions---------------------------------------------- |
|
7521 |
|
7522 instruct addExactI_rReg(eAXRegI dst, rRegI src, eFlagsReg cr) |
|
7523 %{ |
|
7524 match(AddExactI dst src); |
|
7525 effect(DEF cr); |
|
7526 |
|
7527 format %{ "ADD $dst, $src\t# addExact int" %} |
|
7528 ins_encode %{ |
|
7529 __ addl($dst$$Register, $src$$Register); |
|
7530 %} |
|
7531 ins_pipe(ialu_reg_reg); |
|
7532 %} |
|
7533 |
|
7534 instruct addExactI_rReg_imm(eAXRegI dst, immI src, eFlagsReg cr) |
|
7535 %{ |
|
7536 match(AddExactI dst src); |
|
7537 effect(DEF cr); |
|
7538 |
|
7539 format %{ "ADD $dst, $src\t# addExact int" %} |
|
7540 ins_encode %{ |
|
7541 __ addl($dst$$Register, $src$$constant); |
|
7542 %} |
|
7543 ins_pipe(ialu_reg_reg); |
|
7544 %} |
|
7545 |
7499 // Integer Addition Instructions |
7546 // Integer Addition Instructions |
7500 instruct addI_eReg(rRegI dst, rRegI src, eFlagsReg cr) %{ |
7547 instruct addI_eReg(rRegI dst, rRegI src, eFlagsReg cr) %{ |
7501 match(Set dst (AddI dst src)); |
7548 match(Set dst (AddI dst src)); |
7502 effect(KILL cr); |
7549 effect(KILL cr); |
7503 |
7550 |