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src/os_cpu/linux_zero/vm/orderAccess_linux_zero.inline.hpp@f95d63e2154a (annotated)

src/os_cpu/linux_zero/vm/orderAccess_linux_zero.inline.hpp

Tue, 23 Nov 2010 13:22:55 -0800

author
stefank
date
Tue, 23 Nov 2010 13:22:55 -0800
changeset 2314
f95d63e2154a
parent 1907
c18cbe5936b8
child 6876
710a3c8b516e
permissions
-rw-r--r--

6989984: Use standard include model for Hospot
Summary: Replaced MakeDeps and the includeDB files with more standardized solutions.
Reviewed-by: coleenp, kvn, kamg

never@1445 1 /*
stefank@2314 2 * Copyright (c) 2003, 2010, Oracle and/or its affiliates. All rights reserved.
never@1445 3 * Copyright 2007, 2008, 2009 Red Hat, Inc.
never@1445 4 * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
never@1445 5 *
never@1445 6 * This code is free software; you can redistribute it and/or modify it
never@1445 7 * under the terms of the GNU General Public License version 2 only, as
never@1445 8 * published by the Free Software Foundation.
never@1445 9 *
never@1445 10 * This code is distributed in the hope that it will be useful, but WITHOUT
never@1445 11 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
never@1445 12 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
never@1445 13 * version 2 for more details (a copy is included in the LICENSE file that
never@1445 14 * accompanied this code).
never@1445 15 *
never@1445 16 * You should have received a copy of the GNU General Public License version
never@1445 17 * 2 along with this work; if not, write to the Free Software Foundation,
never@1445 18 * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
never@1445 19 *
trims@1907 20 * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA
trims@1907 21 * or visit www.oracle.com if you need additional information or have any
trims@1907 22 * questions.
never@1445 23 *
never@1445 24 */
never@1445 25
stefank@2314 26 #ifndef OS_CPU_LINUX_ZERO_VM_ORDERACCESS_LINUX_ZERO_INLINE_HPP
stefank@2314 27 #define OS_CPU_LINUX_ZERO_VM_ORDERACCESS_LINUX_ZERO_INLINE_HPP
stefank@2314 28
stefank@2314 29 #include "runtime/orderAccess.hpp"
stefank@2314 30 #include "vm_version_zero.hpp"
stefank@2314 31
never@1445 32 #ifdef ARM
never@1445 33
never@1445 34 /*
never@1445 35 * ARM Kernel helper for memory barrier.
never@1445 36 * Using __asm __volatile ("":::"memory") does not work reliable on ARM
never@1445 37 * and gcc __sync_synchronize(); implementation does not use the kernel
never@1445 38 * helper for all gcc versions so it is unreliable to use as well.
never@1445 39 */
never@1445 40 typedef void (__kernel_dmb_t) (void);
never@1445 41 #define __kernel_dmb (*(__kernel_dmb_t *) 0xffff0fa0)
never@1445 42
never@1445 43 #define FULL_MEM_BARRIER __kernel_dmb()
never@1445 44 #define READ_MEM_BARRIER __kernel_dmb()
never@1445 45 #define WRITE_MEM_BARRIER __kernel_dmb()
never@1445 46
never@1445 47 #else // ARM
never@1445 48
never@1445 49 #define FULL_MEM_BARRIER __sync_synchronize()
never@1445 50
never@1445 51 #ifdef PPC
never@1445 52
never@1445 53 #define READ_MEM_BARRIER __asm __volatile ("isync":::"memory")
never@1445 54 #ifdef __NO_LWSYNC__
never@1445 55 #define WRITE_MEM_BARRIER __asm __volatile ("sync":::"memory")
never@1445 56 #else
never@1445 57 #define WRITE_MEM_BARRIER __asm __volatile ("lwsync":::"memory")
never@1445 58 #endif
never@1445 59
never@1445 60 #else // PPC
never@1445 61
never@1445 62 #define READ_MEM_BARRIER __asm __volatile ("":::"memory")
never@1445 63 #define WRITE_MEM_BARRIER __asm __volatile ("":::"memory")
never@1445 64
never@1445 65 #endif // PPC
never@1445 66
never@1445 67 #endif // ARM
never@1445 68
never@1445 69
never@1445 70 inline void OrderAccess::loadload() { acquire(); }
never@1445 71 inline void OrderAccess::storestore() { release(); }
never@1445 72 inline void OrderAccess::loadstore() { acquire(); }
never@1445 73 inline void OrderAccess::storeload() { fence(); }
never@1445 74
never@1445 75 inline void OrderAccess::acquire() {
never@1445 76 READ_MEM_BARRIER;
never@1445 77 }
never@1445 78
never@1445 79 inline void OrderAccess::release() {
never@1445 80 WRITE_MEM_BARRIER;
never@1445 81 }
never@1445 82
never@1445 83 inline void OrderAccess::fence() {
never@1445 84 FULL_MEM_BARRIER;
never@1445 85 }
never@1445 86
never@1445 87 inline jbyte OrderAccess::load_acquire(volatile jbyte* p) { jbyte data = *p; acquire(); return data; }
never@1445 88 inline jshort OrderAccess::load_acquire(volatile jshort* p) { jshort data = *p; acquire(); return data; }
never@1445 89 inline jint OrderAccess::load_acquire(volatile jint* p) { jint data = *p; acquire(); return data; }
never@1445 90 inline jlong OrderAccess::load_acquire(volatile jlong* p) {
never@1445 91 jlong tmp;
never@1445 92 os::atomic_copy64(p, &tmp);
never@1445 93 acquire();
never@1445 94 return tmp;
never@1445 95 }
never@1445 96 inline jubyte OrderAccess::load_acquire(volatile jubyte* p) { jubyte data = *p; acquire(); return data; }
never@1445 97 inline jushort OrderAccess::load_acquire(volatile jushort* p) { jushort data = *p; acquire(); return data; }
never@1445 98 inline juint OrderAccess::load_acquire(volatile juint* p) { juint data = *p; acquire(); return data; }
never@1445 99 inline julong OrderAccess::load_acquire(volatile julong* p) {
never@1445 100 julong tmp;
never@1445 101 os::atomic_copy64(p, &tmp);
never@1445 102 acquire();
never@1445 103 return tmp;
never@1445 104 }
never@1445 105 inline jfloat OrderAccess::load_acquire(volatile jfloat* p) { jfloat data = *p; acquire(); return data; }
never@1445 106 inline jdouble OrderAccess::load_acquire(volatile jdouble* p) {
never@1445 107 jdouble tmp;
never@1445 108 os::atomic_copy64(p, &tmp);
never@1445 109 acquire();
never@1445 110 return tmp;
never@1445 111 }
never@1445 112
never@1445 113 inline intptr_t OrderAccess::load_ptr_acquire(volatile intptr_t* p) {
never@1445 114 intptr_t data = *p;
never@1445 115 acquire();
never@1445 116 return data;
never@1445 117 }
never@1445 118 inline void* OrderAccess::load_ptr_acquire(volatile void* p) {
never@1445 119 void *data = *(void* volatile *)p;
never@1445 120 acquire();
never@1445 121 return data;
never@1445 122 }
never@1445 123 inline void* OrderAccess::load_ptr_acquire(const volatile void* p) {
never@1445 124 void *data = *(void* const volatile *)p;
never@1445 125 acquire();
never@1445 126 return data;
never@1445 127 }
never@1445 128
never@1445 129 inline void OrderAccess::release_store(volatile jbyte* p, jbyte v) { release(); *p = v; }
never@1445 130 inline void OrderAccess::release_store(volatile jshort* p, jshort v) { release(); *p = v; }
never@1445 131 inline void OrderAccess::release_store(volatile jint* p, jint v) { release(); *p = v; }
never@1445 132 inline void OrderAccess::release_store(volatile jlong* p, jlong v)
never@1445 133 { release(); os::atomic_copy64(&v, p); }
never@1445 134 inline void OrderAccess::release_store(volatile jubyte* p, jubyte v) { release(); *p = v; }
never@1445 135 inline void OrderAccess::release_store(volatile jushort* p, jushort v) { release(); *p = v; }
never@1445 136 inline void OrderAccess::release_store(volatile juint* p, juint v) { release(); *p = v; }
never@1445 137 inline void OrderAccess::release_store(volatile julong* p, julong v)
never@1445 138 { release(); os::atomic_copy64(&v, p); }
never@1445 139 inline void OrderAccess::release_store(volatile jfloat* p, jfloat v) { release(); *p = v; }
never@1445 140 inline void OrderAccess::release_store(volatile jdouble* p, jdouble v)
never@1445 141 { release(); os::atomic_copy64(&v, p); }
never@1445 142
never@1445 143 inline void OrderAccess::release_store_ptr(volatile intptr_t* p, intptr_t v) { release(); *p = v; }
never@1445 144 inline void OrderAccess::release_store_ptr(volatile void* p, void* v)
never@1445 145 { release(); *(void* volatile *)p = v; }
never@1445 146
never@1445 147 inline void OrderAccess::store_fence(jbyte* p, jbyte v) { *p = v; fence(); }
never@1445 148 inline void OrderAccess::store_fence(jshort* p, jshort v) { *p = v; fence(); }
never@1445 149 inline void OrderAccess::store_fence(jint* p, jint v) { *p = v; fence(); }
never@1445 150 inline void OrderAccess::store_fence(jlong* p, jlong v) { os::atomic_copy64(&v, p); fence(); }
never@1445 151 inline void OrderAccess::store_fence(jubyte* p, jubyte v) { *p = v; fence(); }
never@1445 152 inline void OrderAccess::store_fence(jushort* p, jushort v) { *p = v; fence(); }
never@1445 153 inline void OrderAccess::store_fence(juint* p, juint v) { *p = v; fence(); }
never@1445 154 inline void OrderAccess::store_fence(julong* p, julong v) { os::atomic_copy64(&v, p); fence(); }
never@1445 155 inline void OrderAccess::store_fence(jfloat* p, jfloat v) { *p = v; fence(); }
never@1445 156 inline void OrderAccess::store_fence(jdouble* p, jdouble v) { os::atomic_copy64(&v, p); fence(); }
never@1445 157
never@1445 158 inline void OrderAccess::store_ptr_fence(intptr_t* p, intptr_t v) { *p = v; fence(); }
never@1445 159 inline void OrderAccess::store_ptr_fence(void** p, void* v) { *p = v; fence(); }
never@1445 160
never@1445 161 inline void OrderAccess::release_store_fence(volatile jbyte* p, jbyte v) { release_store(p, v); fence(); }
never@1445 162 inline void OrderAccess::release_store_fence(volatile jshort* p, jshort v) { release_store(p, v); fence(); }
never@1445 163 inline void OrderAccess::release_store_fence(volatile jint* p, jint v) { release_store(p, v); fence(); }
never@1445 164 inline void OrderAccess::release_store_fence(volatile jlong* p, jlong v) { release_store(p, v); fence(); }
never@1445 165 inline void OrderAccess::release_store_fence(volatile jubyte* p, jubyte v) { release_store(p, v); fence(); }
never@1445 166 inline void OrderAccess::release_store_fence(volatile jushort* p, jushort v) { release_store(p, v); fence(); }
never@1445 167 inline void OrderAccess::release_store_fence(volatile juint* p, juint v) { release_store(p, v); fence(); }
never@1445 168 inline void OrderAccess::release_store_fence(volatile julong* p, julong v) { release_store(p, v); fence(); }
never@1445 169 inline void OrderAccess::release_store_fence(volatile jfloat* p, jfloat v) { release_store(p, v); fence(); }
never@1445 170 inline void OrderAccess::release_store_fence(volatile jdouble* p, jdouble v) { release_store(p, v); fence(); }
never@1445 171
never@1445 172 inline void OrderAccess::release_store_ptr_fence(volatile intptr_t* p, intptr_t v) { release_store_ptr(p, v); fence(); }
never@1445 173 inline void OrderAccess::release_store_ptr_fence(volatile void* p, void* v) { release_store_ptr(p, v); fence(); }
stefank@2314 174
stefank@2314 175 #endif // OS_CPU_LINUX_ZERO_VM_ORDERACCESS_LINUX_ZERO_INLINE_HPP

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