Tue, 23 Nov 2010 13:22:55 -0800
6989984: Use standard include model for Hospot
Summary: Replaced MakeDeps and the includeDB files with more standardized solutions.
Reviewed-by: coleenp, kvn, kamg
duke@435 | 1 | /* |
stefank@2314 | 2 | * Copyright (c) 2000, 2010, Oracle and/or its affiliates. All rights reserved. |
duke@435 | 3 | * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. |
duke@435 | 4 | * |
duke@435 | 5 | * This code is free software; you can redistribute it and/or modify it |
duke@435 | 6 | * under the terms of the GNU General Public License version 2 only, as |
duke@435 | 7 | * published by the Free Software Foundation. |
duke@435 | 8 | * |
duke@435 | 9 | * This code is distributed in the hope that it will be useful, but WITHOUT |
duke@435 | 10 | * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or |
duke@435 | 11 | * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License |
duke@435 | 12 | * version 2 for more details (a copy is included in the LICENSE file that |
duke@435 | 13 | * accompanied this code). |
duke@435 | 14 | * |
duke@435 | 15 | * You should have received a copy of the GNU General Public License version |
duke@435 | 16 | * 2 along with this work; if not, write to the Free Software Foundation, |
duke@435 | 17 | * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA. |
duke@435 | 18 | * |
trims@1907 | 19 | * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA |
trims@1907 | 20 | * or visit www.oracle.com if you need additional information or have any |
trims@1907 | 21 | * questions. |
duke@435 | 22 | * |
duke@435 | 23 | */ |
duke@435 | 24 | |
stefank@2314 | 25 | #ifndef CPU_X86_VM_REGISTER_X86_HPP |
stefank@2314 | 26 | #define CPU_X86_VM_REGISTER_X86_HPP |
stefank@2314 | 27 | |
stefank@2314 | 28 | #include "asm/register.hpp" |
stefank@2314 | 29 | #include "vm_version_x86.hpp" |
stefank@2314 | 30 | |
duke@435 | 31 | class VMRegImpl; |
duke@435 | 32 | typedef VMRegImpl* VMReg; |
duke@435 | 33 | |
duke@435 | 34 | // Use Register as shortcut |
duke@435 | 35 | class RegisterImpl; |
duke@435 | 36 | typedef RegisterImpl* Register; |
duke@435 | 37 | |
duke@435 | 38 | |
duke@435 | 39 | // The implementation of integer registers for the ia32 architecture |
duke@435 | 40 | inline Register as_Register(int encoding) { |
duke@435 | 41 | return (Register)(intptr_t) encoding; |
duke@435 | 42 | } |
duke@435 | 43 | |
duke@435 | 44 | class RegisterImpl: public AbstractRegisterImpl { |
duke@435 | 45 | public: |
duke@435 | 46 | enum { |
duke@435 | 47 | #ifndef AMD64 |
duke@435 | 48 | number_of_registers = 8, |
duke@435 | 49 | number_of_byte_registers = 4 |
duke@435 | 50 | #else |
duke@435 | 51 | number_of_registers = 16, |
duke@435 | 52 | number_of_byte_registers = 16 |
duke@435 | 53 | #endif // AMD64 |
duke@435 | 54 | }; |
duke@435 | 55 | |
duke@435 | 56 | // derived registers, offsets, and addresses |
duke@435 | 57 | Register successor() const { return as_Register(encoding() + 1); } |
duke@435 | 58 | |
duke@435 | 59 | // construction |
duke@435 | 60 | inline friend Register as_Register(int encoding); |
duke@435 | 61 | |
duke@435 | 62 | VMReg as_VMReg(); |
duke@435 | 63 | |
duke@435 | 64 | // accessors |
duke@435 | 65 | int encoding() const { assert(is_valid(), "invalid register"); return (intptr_t)this; } |
duke@435 | 66 | bool is_valid() const { return 0 <= (intptr_t)this && (intptr_t)this < number_of_registers; } |
duke@435 | 67 | bool has_byte_register() const { return 0 <= (intptr_t)this && (intptr_t)this < number_of_byte_registers; } |
duke@435 | 68 | const char* name() const; |
duke@435 | 69 | }; |
duke@435 | 70 | |
duke@435 | 71 | // The integer registers of the ia32/amd64 architecture |
duke@435 | 72 | |
duke@435 | 73 | CONSTANT_REGISTER_DECLARATION(Register, noreg, (-1)); |
duke@435 | 74 | |
duke@435 | 75 | |
duke@435 | 76 | CONSTANT_REGISTER_DECLARATION(Register, rax, (0)); |
duke@435 | 77 | CONSTANT_REGISTER_DECLARATION(Register, rcx, (1)); |
duke@435 | 78 | CONSTANT_REGISTER_DECLARATION(Register, rdx, (2)); |
duke@435 | 79 | CONSTANT_REGISTER_DECLARATION(Register, rbx, (3)); |
duke@435 | 80 | CONSTANT_REGISTER_DECLARATION(Register, rsp, (4)); |
duke@435 | 81 | CONSTANT_REGISTER_DECLARATION(Register, rbp, (5)); |
duke@435 | 82 | CONSTANT_REGISTER_DECLARATION(Register, rsi, (6)); |
duke@435 | 83 | CONSTANT_REGISTER_DECLARATION(Register, rdi, (7)); |
duke@435 | 84 | #ifdef AMD64 |
duke@435 | 85 | CONSTANT_REGISTER_DECLARATION(Register, r8, (8)); |
duke@435 | 86 | CONSTANT_REGISTER_DECLARATION(Register, r9, (9)); |
duke@435 | 87 | CONSTANT_REGISTER_DECLARATION(Register, r10, (10)); |
duke@435 | 88 | CONSTANT_REGISTER_DECLARATION(Register, r11, (11)); |
duke@435 | 89 | CONSTANT_REGISTER_DECLARATION(Register, r12, (12)); |
duke@435 | 90 | CONSTANT_REGISTER_DECLARATION(Register, r13, (13)); |
duke@435 | 91 | CONSTANT_REGISTER_DECLARATION(Register, r14, (14)); |
duke@435 | 92 | CONSTANT_REGISTER_DECLARATION(Register, r15, (15)); |
duke@435 | 93 | #endif // AMD64 |
duke@435 | 94 | |
duke@435 | 95 | // Use FloatRegister as shortcut |
duke@435 | 96 | class FloatRegisterImpl; |
duke@435 | 97 | typedef FloatRegisterImpl* FloatRegister; |
duke@435 | 98 | |
duke@435 | 99 | inline FloatRegister as_FloatRegister(int encoding) { |
duke@435 | 100 | return (FloatRegister)(intptr_t) encoding; |
duke@435 | 101 | } |
duke@435 | 102 | |
duke@435 | 103 | // The implementation of floating point registers for the ia32 architecture |
duke@435 | 104 | class FloatRegisterImpl: public AbstractRegisterImpl { |
duke@435 | 105 | public: |
duke@435 | 106 | enum { |
duke@435 | 107 | number_of_registers = 8 |
duke@435 | 108 | }; |
duke@435 | 109 | |
duke@435 | 110 | // construction |
duke@435 | 111 | inline friend FloatRegister as_FloatRegister(int encoding); |
duke@435 | 112 | |
duke@435 | 113 | VMReg as_VMReg(); |
duke@435 | 114 | |
duke@435 | 115 | // derived registers, offsets, and addresses |
duke@435 | 116 | FloatRegister successor() const { return as_FloatRegister(encoding() + 1); } |
duke@435 | 117 | |
duke@435 | 118 | // accessors |
duke@435 | 119 | int encoding() const { assert(is_valid(), "invalid register"); return (intptr_t)this; } |
duke@435 | 120 | bool is_valid() const { return 0 <= (intptr_t)this && (intptr_t)this < number_of_registers; } |
duke@435 | 121 | const char* name() const; |
duke@435 | 122 | |
duke@435 | 123 | }; |
duke@435 | 124 | |
duke@435 | 125 | // Use XMMRegister as shortcut |
duke@435 | 126 | class XMMRegisterImpl; |
duke@435 | 127 | typedef XMMRegisterImpl* XMMRegister; |
duke@435 | 128 | |
duke@435 | 129 | // Use MMXRegister as shortcut |
duke@435 | 130 | class MMXRegisterImpl; |
duke@435 | 131 | typedef MMXRegisterImpl* MMXRegister; |
duke@435 | 132 | |
duke@435 | 133 | inline XMMRegister as_XMMRegister(int encoding) { |
duke@435 | 134 | return (XMMRegister)(intptr_t)encoding; |
duke@435 | 135 | } |
duke@435 | 136 | |
duke@435 | 137 | inline MMXRegister as_MMXRegister(int encoding) { |
duke@435 | 138 | return (MMXRegister)(intptr_t)encoding; |
duke@435 | 139 | } |
duke@435 | 140 | |
duke@435 | 141 | // The implementation of XMM registers for the IA32 architecture |
duke@435 | 142 | class XMMRegisterImpl: public AbstractRegisterImpl { |
duke@435 | 143 | public: |
duke@435 | 144 | enum { |
duke@435 | 145 | #ifndef AMD64 |
duke@435 | 146 | number_of_registers = 8 |
duke@435 | 147 | #else |
duke@435 | 148 | number_of_registers = 16 |
duke@435 | 149 | #endif // AMD64 |
duke@435 | 150 | }; |
duke@435 | 151 | |
duke@435 | 152 | // construction |
duke@435 | 153 | friend XMMRegister as_XMMRegister(int encoding); |
duke@435 | 154 | |
duke@435 | 155 | VMReg as_VMReg(); |
duke@435 | 156 | |
duke@435 | 157 | // derived registers, offsets, and addresses |
duke@435 | 158 | XMMRegister successor() const { return as_XMMRegister(encoding() + 1); } |
duke@435 | 159 | |
duke@435 | 160 | // accessors |
duke@435 | 161 | int encoding() const { assert(is_valid(), "invalid register"); return (intptr_t)this; } |
duke@435 | 162 | bool is_valid() const { return 0 <= (intptr_t)this && (intptr_t)this < number_of_registers; } |
duke@435 | 163 | const char* name() const; |
duke@435 | 164 | }; |
duke@435 | 165 | |
duke@435 | 166 | |
duke@435 | 167 | // The XMM registers, for P3 and up chips |
duke@435 | 168 | CONSTANT_REGISTER_DECLARATION(XMMRegister, xnoreg , (-1)); |
duke@435 | 169 | CONSTANT_REGISTER_DECLARATION(XMMRegister, xmm0 , ( 0)); |
duke@435 | 170 | CONSTANT_REGISTER_DECLARATION(XMMRegister, xmm1 , ( 1)); |
duke@435 | 171 | CONSTANT_REGISTER_DECLARATION(XMMRegister, xmm2 , ( 2)); |
duke@435 | 172 | CONSTANT_REGISTER_DECLARATION(XMMRegister, xmm3 , ( 3)); |
duke@435 | 173 | CONSTANT_REGISTER_DECLARATION(XMMRegister, xmm4 , ( 4)); |
duke@435 | 174 | CONSTANT_REGISTER_DECLARATION(XMMRegister, xmm5 , ( 5)); |
duke@435 | 175 | CONSTANT_REGISTER_DECLARATION(XMMRegister, xmm6 , ( 6)); |
duke@435 | 176 | CONSTANT_REGISTER_DECLARATION(XMMRegister, xmm7 , ( 7)); |
duke@435 | 177 | #ifdef AMD64 |
duke@435 | 178 | CONSTANT_REGISTER_DECLARATION(XMMRegister, xmm8, (8)); |
duke@435 | 179 | CONSTANT_REGISTER_DECLARATION(XMMRegister, xmm9, (9)); |
duke@435 | 180 | CONSTANT_REGISTER_DECLARATION(XMMRegister, xmm10, (10)); |
duke@435 | 181 | CONSTANT_REGISTER_DECLARATION(XMMRegister, xmm11, (11)); |
duke@435 | 182 | CONSTANT_REGISTER_DECLARATION(XMMRegister, xmm12, (12)); |
duke@435 | 183 | CONSTANT_REGISTER_DECLARATION(XMMRegister, xmm13, (13)); |
duke@435 | 184 | CONSTANT_REGISTER_DECLARATION(XMMRegister, xmm14, (14)); |
duke@435 | 185 | CONSTANT_REGISTER_DECLARATION(XMMRegister, xmm15, (15)); |
duke@435 | 186 | #endif // AMD64 |
duke@435 | 187 | |
duke@435 | 188 | // Only used by the 32bit stubGenerator. These can't be described by vmreg and hence |
duke@435 | 189 | // can't be described in oopMaps and therefore can't be used by the compilers (at least |
duke@435 | 190 | // were deopt might wan't to see them). |
duke@435 | 191 | |
duke@435 | 192 | // The MMX registers, for P3 and up chips |
duke@435 | 193 | CONSTANT_REGISTER_DECLARATION(MMXRegister, mnoreg , (-1)); |
duke@435 | 194 | CONSTANT_REGISTER_DECLARATION(MMXRegister, mmx0 , ( 0)); |
duke@435 | 195 | CONSTANT_REGISTER_DECLARATION(MMXRegister, mmx1 , ( 1)); |
duke@435 | 196 | CONSTANT_REGISTER_DECLARATION(MMXRegister, mmx2 , ( 2)); |
duke@435 | 197 | CONSTANT_REGISTER_DECLARATION(MMXRegister, mmx3 , ( 3)); |
duke@435 | 198 | CONSTANT_REGISTER_DECLARATION(MMXRegister, mmx4 , ( 4)); |
duke@435 | 199 | CONSTANT_REGISTER_DECLARATION(MMXRegister, mmx5 , ( 5)); |
duke@435 | 200 | CONSTANT_REGISTER_DECLARATION(MMXRegister, mmx6 , ( 6)); |
duke@435 | 201 | CONSTANT_REGISTER_DECLARATION(MMXRegister, mmx7 , ( 7)); |
duke@435 | 202 | |
duke@435 | 203 | |
duke@435 | 204 | // Need to know the total number of registers of all sorts for SharedInfo. |
duke@435 | 205 | // Define a class that exports it. |
duke@435 | 206 | class ConcreteRegisterImpl : public AbstractRegisterImpl { |
duke@435 | 207 | public: |
duke@435 | 208 | enum { |
duke@435 | 209 | // A big enough number for C2: all the registers plus flags |
duke@435 | 210 | // This number must be large enough to cover REG_COUNT (defined by c2) registers. |
duke@435 | 211 | // There is no requirement that any ordering here matches any ordering c2 gives |
duke@435 | 212 | // it's optoregs. |
duke@435 | 213 | |
duke@435 | 214 | number_of_registers = RegisterImpl::number_of_registers + |
duke@435 | 215 | #ifdef AMD64 |
duke@435 | 216 | RegisterImpl::number_of_registers + // "H" half of a 64bit register |
duke@435 | 217 | #endif // AMD64 |
duke@435 | 218 | 2 * FloatRegisterImpl::number_of_registers + |
duke@435 | 219 | 2 * XMMRegisterImpl::number_of_registers + |
duke@435 | 220 | 1 // eflags |
duke@435 | 221 | }; |
duke@435 | 222 | |
duke@435 | 223 | static const int max_gpr; |
duke@435 | 224 | static const int max_fpr; |
duke@435 | 225 | static const int max_xmm; |
duke@435 | 226 | |
duke@435 | 227 | }; |
stefank@2314 | 228 | |
stefank@2314 | 229 | #endif // CPU_X86_VM_REGISTER_X86_HPP |