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src/os_cpu/linux_zero/vm/orderAccess_linux_zero.inline.hpp@f90c822e73f8 (annotated)

src/os_cpu/linux_zero/vm/orderAccess_linux_zero.inline.hpp

Wed, 27 Apr 2016 01:25:04 +0800

author

aoqi

date

Wed, 27 Apr 2016 01:25:04 +0800

changeset 0

f90c822e73f8

child 6876

710a3c8b516e

permissions

-rw-r--r--

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http://hg.openjdk.java.net/jdk8u/jdk8u/hotspot/
changeset: 6782:28b50d07f6f8
tag: jdk8u25-b17

aoqi@0	1	/*
aoqi@0	2	* Copyright (c) 2003, 2010, Oracle and/or its affiliates. All rights reserved.
aoqi@0	3	* Copyright 2007, 2008, 2009 Red Hat, Inc.
aoqi@0	4	* DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
aoqi@0	5	*
aoqi@0	6	* This code is free software; you can redistribute it and/or modify it
aoqi@0	7	* under the terms of the GNU General Public License version 2 only, as
aoqi@0	8	* published by the Free Software Foundation.
aoqi@0	9	*
aoqi@0	10	* This code is distributed in the hope that it will be useful, but WITHOUT
aoqi@0	11	* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
aoqi@0	12	* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
aoqi@0	13	* version 2 for more details (a copy is included in the LICENSE file that
aoqi@0	14	* accompanied this code).
aoqi@0	15	*
aoqi@0	16	* You should have received a copy of the GNU General Public License version
aoqi@0	17	* 2 along with this work; if not, write to the Free Software Foundation,
aoqi@0	18	* Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
aoqi@0	19	*
aoqi@0	20	* Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA
aoqi@0	21	* or visit www.oracle.com if you need additional information or have any
aoqi@0	22	* questions.
aoqi@0	23	*
aoqi@0	24	*/
aoqi@0	25
aoqi@0	26	#ifndef OS_CPU_LINUX_ZERO_VM_ORDERACCESS_LINUX_ZERO_INLINE_HPP
aoqi@0	27	#define OS_CPU_LINUX_ZERO_VM_ORDERACCESS_LINUX_ZERO_INLINE_HPP
aoqi@0	28
aoqi@0	29	#include "runtime/orderAccess.hpp"
aoqi@0	30	#include "vm_version_zero.hpp"
aoqi@0	31
aoqi@0	32	#ifdef ARM
aoqi@0	33
aoqi@0	34	/*
aoqi@0	35	* ARM Kernel helper for memory barrier.
aoqi@0	36	* Using __asm __volatile ("":::"memory") does not work reliable on ARM
aoqi@0	37	* and gcc __sync_synchronize(); implementation does not use the kernel
aoqi@0	38	* helper for all gcc versions so it is unreliable to use as well.
aoqi@0	39	*/
aoqi@0	40	typedef void (__kernel_dmb_t) (void);
aoqi@0	41	#define __kernel_dmb (*(__kernel_dmb_t *) 0xffff0fa0)
aoqi@0	42
aoqi@0	43	#define FULL_MEM_BARRIER __kernel_dmb()
aoqi@0	44	#define READ_MEM_BARRIER __kernel_dmb()
aoqi@0	45	#define WRITE_MEM_BARRIER __kernel_dmb()
aoqi@0	46
aoqi@0	47	#else // ARM
aoqi@0	48
aoqi@0	49	#define FULL_MEM_BARRIER __sync_synchronize()
aoqi@0	50
aoqi@0	51	#ifdef PPC
aoqi@0	52
aoqi@0	53	#define READ_MEM_BARRIER __asm __volatile ("isync":::"memory")
aoqi@0	54	#ifdef __NO_LWSYNC__
aoqi@0	55	#define WRITE_MEM_BARRIER __asm __volatile ("sync":::"memory")
aoqi@0	56	#else
aoqi@0	57	#define WRITE_MEM_BARRIER __asm __volatile ("lwsync":::"memory")
aoqi@0	58	#endif
aoqi@0	59
aoqi@0	60	#else // PPC
aoqi@0	61
aoqi@0	62	#define READ_MEM_BARRIER __asm __volatile ("":::"memory")
aoqi@0	63	#define WRITE_MEM_BARRIER __asm __volatile ("":::"memory")
aoqi@0	64
aoqi@0	65	#endif // PPC
aoqi@0	66
aoqi@0	67	#endif // ARM
aoqi@0	68
aoqi@0	69
aoqi@0	70	inline void OrderAccess::loadload() { acquire(); }
aoqi@0	71	inline void OrderAccess::storestore() { release(); }
aoqi@0	72	inline void OrderAccess::loadstore() { acquire(); }
aoqi@0	73	inline void OrderAccess::storeload() { fence(); }
aoqi@0	74
aoqi@0	75	inline void OrderAccess::acquire() {
aoqi@0	76	READ_MEM_BARRIER;
aoqi@0	77	}
aoqi@0	78
aoqi@0	79	inline void OrderAccess::release() {
aoqi@0	80	WRITE_MEM_BARRIER;
aoqi@0	81	}
aoqi@0	82
aoqi@0	83	inline void OrderAccess::fence() {
aoqi@0	84	FULL_MEM_BARRIER;
aoqi@0	85	}
aoqi@0	86
aoqi@0	87	inline jbyte OrderAccess::load_acquire(volatile jbyte* p) { jbyte data = *p; acquire(); return data; }
aoqi@0	88	inline jshort OrderAccess::load_acquire(volatile jshort* p) { jshort data = *p; acquire(); return data; }
aoqi@0	89	inline jint OrderAccess::load_acquire(volatile jint* p) { jint data = *p; acquire(); return data; }
aoqi@0	90	inline jlong OrderAccess::load_acquire(volatile jlong* p) {
aoqi@0	91	jlong tmp;
aoqi@0	92	os::atomic_copy64(p, &tmp);
aoqi@0	93	acquire();
aoqi@0	94	return tmp;
aoqi@0	95	}
aoqi@0	96	inline jubyte OrderAccess::load_acquire(volatile jubyte* p) { jubyte data = *p; acquire(); return data; }
aoqi@0	97	inline jushort OrderAccess::load_acquire(volatile jushort* p) { jushort data = *p; acquire(); return data; }
aoqi@0	98	inline juint OrderAccess::load_acquire(volatile juint* p) { juint data = *p; acquire(); return data; }
aoqi@0	99	inline julong OrderAccess::load_acquire(volatile julong* p) {
aoqi@0	100	julong tmp;
aoqi@0	101	os::atomic_copy64(p, &tmp);
aoqi@0	102	acquire();
aoqi@0	103	return tmp;
aoqi@0	104	}
aoqi@0	105	inline jfloat OrderAccess::load_acquire(volatile jfloat* p) { jfloat data = *p; acquire(); return data; }
aoqi@0	106	inline jdouble OrderAccess::load_acquire(volatile jdouble* p) {
aoqi@0	107	jdouble tmp;
aoqi@0	108	os::atomic_copy64(p, &tmp);
aoqi@0	109	acquire();
aoqi@0	110	return tmp;
aoqi@0	111	}
aoqi@0	112
aoqi@0	113	inline intptr_t OrderAccess::load_ptr_acquire(volatile intptr_t* p) {
aoqi@0	114	intptr_t data = *p;
aoqi@0	115	acquire();
aoqi@0	116	return data;
aoqi@0	117	}
aoqi@0	118	inline void* OrderAccess::load_ptr_acquire(volatile void* p) {
aoqi@0	119	void *data = *(void* volatile *)p;
aoqi@0	120	acquire();
aoqi@0	121	return data;
aoqi@0	122	}
aoqi@0	123	inline void* OrderAccess::load_ptr_acquire(const volatile void* p) {
aoqi@0	124	void *data = *(void* const volatile *)p;
aoqi@0	125	acquire();
aoqi@0	126	return data;
aoqi@0	127	}
aoqi@0	128
aoqi@0	129	inline void OrderAccess::release_store(volatile jbyte* p, jbyte v) { release(); *p = v; }
aoqi@0	130	inline void OrderAccess::release_store(volatile jshort* p, jshort v) { release(); *p = v; }
aoqi@0	131	inline void OrderAccess::release_store(volatile jint* p, jint v) { release(); *p = v; }
aoqi@0	132	inline void OrderAccess::release_store(volatile jlong* p, jlong v)
aoqi@0	133	{ release(); os::atomic_copy64(&v, p); }
aoqi@0	134	inline void OrderAccess::release_store(volatile jubyte* p, jubyte v) { release(); *p = v; }
aoqi@0	135	inline void OrderAccess::release_store(volatile jushort* p, jushort v) { release(); *p = v; }
aoqi@0	136	inline void OrderAccess::release_store(volatile juint* p, juint v) { release(); *p = v; }
aoqi@0	137	inline void OrderAccess::release_store(volatile julong* p, julong v)
aoqi@0	138	{ release(); os::atomic_copy64(&v, p); }
aoqi@0	139	inline void OrderAccess::release_store(volatile jfloat* p, jfloat v) { release(); *p = v; }
aoqi@0	140	inline void OrderAccess::release_store(volatile jdouble* p, jdouble v)
aoqi@0	141	{ release(); os::atomic_copy64(&v, p); }
aoqi@0	142
aoqi@0	143	inline void OrderAccess::release_store_ptr(volatile intptr_t* p, intptr_t v) { release(); *p = v; }
aoqi@0	144	inline void OrderAccess::release_store_ptr(volatile void* p, void* v)
aoqi@0	145	{ release(); *(void* volatile *)p = v; }
aoqi@0	146
aoqi@0	147	inline void OrderAccess::store_fence(jbyte* p, jbyte v) { *p = v; fence(); }
aoqi@0	148	inline void OrderAccess::store_fence(jshort* p, jshort v) { *p = v; fence(); }
aoqi@0	149	inline void OrderAccess::store_fence(jint* p, jint v) { *p = v; fence(); }
aoqi@0	150	inline void OrderAccess::store_fence(jlong* p, jlong v) { os::atomic_copy64(&v, p); fence(); }
aoqi@0	151	inline void OrderAccess::store_fence(jubyte* p, jubyte v) { *p = v; fence(); }
aoqi@0	152	inline void OrderAccess::store_fence(jushort* p, jushort v) { *p = v; fence(); }
aoqi@0	153	inline void OrderAccess::store_fence(juint* p, juint v) { *p = v; fence(); }
aoqi@0	154	inline void OrderAccess::store_fence(julong* p, julong v) { os::atomic_copy64(&v, p); fence(); }
aoqi@0	155	inline void OrderAccess::store_fence(jfloat* p, jfloat v) { *p = v; fence(); }
aoqi@0	156	inline void OrderAccess::store_fence(jdouble* p, jdouble v) { os::atomic_copy64(&v, p); fence(); }
aoqi@0	157
aoqi@0	158	inline void OrderAccess::store_ptr_fence(intptr_t* p, intptr_t v) { *p = v; fence(); }
aoqi@0	159	inline void OrderAccess::store_ptr_fence(void** p, void* v) { *p = v; fence(); }
aoqi@0	160
aoqi@0	161	inline void OrderAccess::release_store_fence(volatile jbyte* p, jbyte v) { release_store(p, v); fence(); }
aoqi@0	162	inline void OrderAccess::release_store_fence(volatile jshort* p, jshort v) { release_store(p, v); fence(); }
aoqi@0	163	inline void OrderAccess::release_store_fence(volatile jint* p, jint v) { release_store(p, v); fence(); }
aoqi@0	164	inline void OrderAccess::release_store_fence(volatile jlong* p, jlong v) { release_store(p, v); fence(); }
aoqi@0	165	inline void OrderAccess::release_store_fence(volatile jubyte* p, jubyte v) { release_store(p, v); fence(); }
aoqi@0	166	inline void OrderAccess::release_store_fence(volatile jushort* p, jushort v) { release_store(p, v); fence(); }
aoqi@0	167	inline void OrderAccess::release_store_fence(volatile juint* p, juint v) { release_store(p, v); fence(); }
aoqi@0	168	inline void OrderAccess::release_store_fence(volatile julong* p, julong v) { release_store(p, v); fence(); }
aoqi@0	169	inline void OrderAccess::release_store_fence(volatile jfloat* p, jfloat v) { release_store(p, v); fence(); }
aoqi@0	170	inline void OrderAccess::release_store_fence(volatile jdouble* p, jdouble v) { release_store(p, v); fence(); }
aoqi@0	171
aoqi@0	172	inline void OrderAccess::release_store_ptr_fence(volatile intptr_t* p, intptr_t v) { release_store_ptr(p, v); fence(); }
aoqi@0	173	inline void OrderAccess::release_store_ptr_fence(volatile void* p, void* v) { release_store_ptr(p, v); fence(); }
aoqi@0	174
aoqi@0	175	#endif // OS_CPU_LINUX_ZERO_VM_ORDERACCESS_LINUX_ZERO_INLINE_HPP