src/cpu/x86/vm/icache_x86.cpp

Wed, 27 Apr 2016 01:25:04 +0800

author
aoqi
date
Wed, 27 Apr 2016 01:25:04 +0800
changeset 0
f90c822e73f8
child 6876
710a3c8b516e
permissions
-rw-r--r--

Initial load
http://hg.openjdk.java.net/jdk8u/jdk8u/hotspot/
changeset: 6782:28b50d07f6f8
tag: jdk8u25-b17

aoqi@0 1 /*
aoqi@0 2 * Copyright (c) 1997, 2010, Oracle and/or its affiliates. All rights reserved.
aoqi@0 3 * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
aoqi@0 4 *
aoqi@0 5 * This code is free software; you can redistribute it and/or modify it
aoqi@0 6 * under the terms of the GNU General Public License version 2 only, as
aoqi@0 7 * published by the Free Software Foundation.
aoqi@0 8 *
aoqi@0 9 * This code is distributed in the hope that it will be useful, but WITHOUT
aoqi@0 10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
aoqi@0 11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
aoqi@0 12 * version 2 for more details (a copy is included in the LICENSE file that
aoqi@0 13 * accompanied this code).
aoqi@0 14 *
aoqi@0 15 * You should have received a copy of the GNU General Public License version
aoqi@0 16 * 2 along with this work; if not, write to the Free Software Foundation,
aoqi@0 17 * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
aoqi@0 18 *
aoqi@0 19 * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA
aoqi@0 20 * or visit www.oracle.com if you need additional information or have any
aoqi@0 21 * questions.
aoqi@0 22 *
aoqi@0 23 */
aoqi@0 24
aoqi@0 25 #include "precompiled.hpp"
aoqi@0 26 #include "asm/macroAssembler.hpp"
aoqi@0 27 #include "runtime/icache.hpp"
aoqi@0 28
aoqi@0 29 #define __ _masm->
aoqi@0 30
aoqi@0 31 void ICacheStubGenerator::generate_icache_flush(ICache::flush_icache_stub_t* flush_icache_stub) {
aoqi@0 32 StubCodeMark mark(this, "ICache", "flush_icache_stub");
aoqi@0 33
aoqi@0 34 address start = __ pc();
aoqi@0 35 #ifdef AMD64
aoqi@0 36
aoqi@0 37 const Register addr = c_rarg0;
aoqi@0 38 const Register lines = c_rarg1;
aoqi@0 39 const Register magic = c_rarg2;
aoqi@0 40
aoqi@0 41 Label flush_line, done;
aoqi@0 42
aoqi@0 43 __ testl(lines, lines);
aoqi@0 44 __ jcc(Assembler::zero, done);
aoqi@0 45
aoqi@0 46 // Force ordering wrt cflush.
aoqi@0 47 // Other fence and sync instructions won't do the job.
aoqi@0 48 __ mfence();
aoqi@0 49
aoqi@0 50 __ bind(flush_line);
aoqi@0 51 __ clflush(Address(addr, 0));
aoqi@0 52 __ addptr(addr, ICache::line_size);
aoqi@0 53 __ decrementl(lines);
aoqi@0 54 __ jcc(Assembler::notZero, flush_line);
aoqi@0 55
aoqi@0 56 __ mfence();
aoqi@0 57
aoqi@0 58 __ bind(done);
aoqi@0 59
aoqi@0 60 #else
aoqi@0 61 const Address magic(rsp, 3*wordSize);
aoqi@0 62 __ lock(); __ addl(Address(rsp, 0), 0);
aoqi@0 63 #endif // AMD64
aoqi@0 64 __ movptr(rax, magic); // Handshake with caller to make sure it happened!
aoqi@0 65 __ ret(0);
aoqi@0 66
aoqi@0 67 // Must be set here so StubCodeMark destructor can call the flush stub.
aoqi@0 68 *flush_icache_stub = (ICache::flush_icache_stub_t)start;
aoqi@0 69 }
aoqi@0 70
aoqi@0 71 #undef __

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