src/cpu/sparc/vm/icBuffer_sparc.cpp

Wed, 27 Apr 2016 01:25:04 +0800

author
aoqi
date
Wed, 27 Apr 2016 01:25:04 +0800
changeset 0
f90c822e73f8
child 6876
710a3c8b516e
permissions
-rw-r--r--

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http://hg.openjdk.java.net/jdk8u/jdk8u/hotspot/
changeset: 6782:28b50d07f6f8
tag: jdk8u25-b17

aoqi@0 1 /*
aoqi@0 2 * Copyright (c) 1997, 2012, Oracle and/or its affiliates. All rights reserved.
aoqi@0 3 * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
aoqi@0 4 *
aoqi@0 5 * This code is free software; you can redistribute it and/or modify it
aoqi@0 6 * under the terms of the GNU General Public License version 2 only, as
aoqi@0 7 * published by the Free Software Foundation.
aoqi@0 8 *
aoqi@0 9 * This code is distributed in the hope that it will be useful, but WITHOUT
aoqi@0 10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
aoqi@0 11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
aoqi@0 12 * version 2 for more details (a copy is included in the LICENSE file that
aoqi@0 13 * accompanied this code).
aoqi@0 14 *
aoqi@0 15 * You should have received a copy of the GNU General Public License version
aoqi@0 16 * 2 along with this work; if not, write to the Free Software Foundation,
aoqi@0 17 * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
aoqi@0 18 *
aoqi@0 19 * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA
aoqi@0 20 * or visit www.oracle.com if you need additional information or have any
aoqi@0 21 * questions.
aoqi@0 22 *
aoqi@0 23 */
aoqi@0 24
aoqi@0 25 #include "precompiled.hpp"
aoqi@0 26 #include "asm/macroAssembler.inline.hpp"
aoqi@0 27 #include "code/icBuffer.hpp"
aoqi@0 28 #include "gc_interface/collectedHeap.inline.hpp"
aoqi@0 29 #include "interpreter/bytecodes.hpp"
aoqi@0 30 #include "memory/resourceArea.hpp"
aoqi@0 31 #include "nativeInst_sparc.hpp"
aoqi@0 32 #include "oops/oop.inline.hpp"
aoqi@0 33 #include "oops/oop.inline2.hpp"
aoqi@0 34
aoqi@0 35 int InlineCacheBuffer::ic_stub_code_size() {
aoqi@0 36 #ifdef _LP64
aoqi@0 37 if (TraceJumps) return 600 * wordSize;
aoqi@0 38 return (NativeMovConstReg::instruction_size + // sethi;add
aoqi@0 39 NativeJump::instruction_size + // sethi; jmp; delay slot
aoqi@0 40 (1*BytesPerInstWord) + 1); // flush + 1 extra byte
aoqi@0 41 #else
aoqi@0 42 if (TraceJumps) return 300 * wordSize;
aoqi@0 43 return (2+2+ 1) * wordSize + 1; // set/jump_to/nop + 1 byte so that code_end can be set in CodeBuffer
aoqi@0 44 #endif
aoqi@0 45 }
aoqi@0 46
aoqi@0 47 void InlineCacheBuffer::assemble_ic_buffer_code(address code_begin, void* cached_value, address entry_point) {
aoqi@0 48 ResourceMark rm;
aoqi@0 49 CodeBuffer code(code_begin, ic_stub_code_size());
aoqi@0 50 MacroAssembler* masm = new MacroAssembler(&code);
aoqi@0 51 // note: even though the code contains an embedded metadata, we do not need reloc info
aoqi@0 52 // because
aoqi@0 53 // (1) the metadata is old (i.e., doesn't matter for scavenges)
aoqi@0 54 // (2) these ICStubs are removed *before* a GC happens, so the roots disappear
aoqi@0 55 AddressLiteral cached_value_addrlit((address)cached_value, relocInfo::none);
aoqi@0 56 // Force the set to generate the fixed sequence so next_instruction_address works
aoqi@0 57 masm->patchable_set(cached_value_addrlit, G5_inline_cache_reg);
aoqi@0 58 assert(G3_scratch != G5_method, "Do not clobber the method oop in the transition stub");
aoqi@0 59 assert(G3_scratch != G5_inline_cache_reg, "Do not clobber the inline cache register in the transition stub");
aoqi@0 60 AddressLiteral entry(entry_point);
aoqi@0 61 masm->JUMP(entry, G3_scratch, 0);
aoqi@0 62 masm->delayed()->nop();
aoqi@0 63 masm->flush();
aoqi@0 64 }
aoqi@0 65
aoqi@0 66
aoqi@0 67 address InlineCacheBuffer::ic_buffer_entry_point(address code_begin) {
aoqi@0 68 NativeMovConstReg* move = nativeMovConstReg_at(code_begin); // creation also verifies the object
aoqi@0 69 NativeJump* jump = nativeJump_at(move->next_instruction_address());
aoqi@0 70 return jump->jump_destination();
aoqi@0 71 }
aoqi@0 72
aoqi@0 73
aoqi@0 74 void* InlineCacheBuffer::ic_buffer_cached_value(address code_begin) {
aoqi@0 75 NativeMovConstReg* move = nativeMovConstReg_at(code_begin); // creation also verifies the object
aoqi@0 76 NativeJump* jump = nativeJump_at(move->next_instruction_address());
aoqi@0 77 void* o = (void*)move->data();
aoqi@0 78 return o;
aoqi@0 79 }

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