Wed, 27 Apr 2016 01:25:04 +0800
Initial load
http://hg.openjdk.java.net/jdk8u/jdk8u/hotspot/
changeset: 6782:28b50d07f6f8
tag: jdk8u25-b17
aoqi@0 | 1 | /* |
aoqi@0 | 2 | * Copyright (c) 2000, 2010, Oracle and/or its affiliates. All rights reserved. |
aoqi@0 | 3 | * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. |
aoqi@0 | 4 | * |
aoqi@0 | 5 | * This code is free software; you can redistribute it and/or modify it |
aoqi@0 | 6 | * under the terms of the GNU General Public License version 2 only, as |
aoqi@0 | 7 | * published by the Free Software Foundation. |
aoqi@0 | 8 | * |
aoqi@0 | 9 | * This code is distributed in the hope that it will be useful, but WITHOUT |
aoqi@0 | 10 | * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or |
aoqi@0 | 11 | * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License |
aoqi@0 | 12 | * version 2 for more details (a copy is included in the LICENSE file that |
aoqi@0 | 13 | * accompanied this code). |
aoqi@0 | 14 | * |
aoqi@0 | 15 | * You should have received a copy of the GNU General Public License version |
aoqi@0 | 16 | * 2 along with this work; if not, write to the Free Software Foundation, |
aoqi@0 | 17 | * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA. |
aoqi@0 | 18 | * |
aoqi@0 | 19 | * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA |
aoqi@0 | 20 | * or visit www.oracle.com if you need additional information or have any |
aoqi@0 | 21 | * questions. |
aoqi@0 | 22 | * |
aoqi@0 | 23 | */ |
aoqi@0 | 24 | |
aoqi@0 | 25 | #ifndef CPU_SPARC_VM_C1_DEFS_SPARC_HPP |
aoqi@0 | 26 | #define CPU_SPARC_VM_C1_DEFS_SPARC_HPP |
aoqi@0 | 27 | |
aoqi@0 | 28 | // native word offsets from memory address (big endian) |
aoqi@0 | 29 | enum { |
aoqi@0 | 30 | pd_lo_word_offset_in_bytes = BytesPerInt, |
aoqi@0 | 31 | pd_hi_word_offset_in_bytes = 0 |
aoqi@0 | 32 | }; |
aoqi@0 | 33 | |
aoqi@0 | 34 | |
aoqi@0 | 35 | // explicit rounding operations are not required to implement the strictFP mode |
aoqi@0 | 36 | enum { |
aoqi@0 | 37 | pd_strict_fp_requires_explicit_rounding = false |
aoqi@0 | 38 | }; |
aoqi@0 | 39 | |
aoqi@0 | 40 | |
aoqi@0 | 41 | // registers |
aoqi@0 | 42 | enum { |
aoqi@0 | 43 | pd_nof_cpu_regs_frame_map = 32, // number of registers used during code emission |
aoqi@0 | 44 | pd_nof_caller_save_cpu_regs_frame_map = 10, // number of cpu registers killed by calls |
aoqi@0 | 45 | pd_nof_cpu_regs_reg_alloc = 20, // number of registers that are visible to register allocator |
aoqi@0 | 46 | pd_nof_cpu_regs_linearscan = 32,// number of registers visible linear scan |
aoqi@0 | 47 | pd_first_cpu_reg = 0, |
aoqi@0 | 48 | pd_last_cpu_reg = 31, |
aoqi@0 | 49 | pd_last_allocatable_cpu_reg = 19, |
aoqi@0 | 50 | pd_first_callee_saved_reg = 0, |
aoqi@0 | 51 | pd_last_callee_saved_reg = 13, |
aoqi@0 | 52 | |
aoqi@0 | 53 | pd_nof_fpu_regs_frame_map = 32, // number of registers used during code emission |
aoqi@0 | 54 | pd_nof_caller_save_fpu_regs_frame_map = 32, // number of fpu registers killed by calls |
aoqi@0 | 55 | pd_nof_fpu_regs_reg_alloc = 32, // number of registers that are visible to register allocator |
aoqi@0 | 56 | pd_nof_fpu_regs_linearscan = 32, // number of registers visible to linear scan |
aoqi@0 | 57 | pd_first_fpu_reg = pd_nof_cpu_regs_frame_map, |
aoqi@0 | 58 | pd_last_fpu_reg = pd_nof_cpu_regs_frame_map + pd_nof_fpu_regs_frame_map - 1, |
aoqi@0 | 59 | |
aoqi@0 | 60 | pd_nof_xmm_regs_linearscan = 0, |
aoqi@0 | 61 | pd_nof_caller_save_xmm_regs = 0, |
aoqi@0 | 62 | pd_first_xmm_reg = -1, |
aoqi@0 | 63 | pd_last_xmm_reg = -1 |
aoqi@0 | 64 | }; |
aoqi@0 | 65 | |
aoqi@0 | 66 | |
aoqi@0 | 67 | // for debug info: a float value in a register is saved in single precision by runtime stubs |
aoqi@0 | 68 | enum { |
aoqi@0 | 69 | pd_float_saved_as_double = false |
aoqi@0 | 70 | }; |
aoqi@0 | 71 | |
aoqi@0 | 72 | #endif // CPU_SPARC_VM_C1_DEFS_SPARC_HPP |