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src/cpu/zero/vm/nativeInst_zero.hpp@e16282db4946 (annotated)

src/cpu/zero/vm/nativeInst_zero.hpp

Tue, 20 Aug 2013 10:57:50 -0700

author

twisti

date

Tue, 20 Aug 2013 10:57:50 -0700

changeset 5545

e16282db4946

parent 2314

f95d63e2154a

child 6198

55fb97c4c58d

permissions

-rw-r--r--

8022956: Clang: enable return type warnings on BSD
Reviewed-by: coleenp, sla

never@1445	1	/*
stefank@2314	2	* Copyright (c) 2003, 2010, Oracle and/or its affiliates. All rights reserved.
never@1445	3	* Copyright 2007 Red Hat, Inc.
never@1445	4	* DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
never@1445	5	*
never@1445	6	* This code is free software; you can redistribute it and/or modify it
never@1445	7	* under the terms of the GNU General Public License version 2 only, as
never@1445	8	* published by the Free Software Foundation.
never@1445	9	*
never@1445	10	* This code is distributed in the hope that it will be useful, but WITHOUT
never@1445	11	* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
never@1445	12	* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
never@1445	13	* version 2 for more details (a copy is included in the LICENSE file that
never@1445	14	* accompanied this code).
never@1445	15	*
never@1445	16	* You should have received a copy of the GNU General Public License version
never@1445	17	* 2 along with this work; if not, write to the Free Software Foundation,
never@1445	18	* Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
never@1445	19	*
trims@1907	20	* Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA
trims@1907	21	* or visit www.oracle.com if you need additional information or have any
trims@1907	22	* questions.
never@1445	23	*
never@1445	24	*/
never@1445	25
stefank@2314	26	#ifndef CPU_ZERO_VM_NATIVEINST_ZERO_HPP
stefank@2314	27	#define CPU_ZERO_VM_NATIVEINST_ZERO_HPP
stefank@2314	28
stefank@2314	29	#include "asm/assembler.hpp"
stefank@2314	30	#include "memory/allocation.hpp"
stefank@2314	31	#include "runtime/icache.hpp"
stefank@2314	32	#include "runtime/os.hpp"
stefank@2314	33	#include "utilities/top.hpp"
stefank@2314	34
never@1445	35	// We have interfaces for the following instructions:
never@1445	36	// - NativeInstruction
never@1445	37	// - - NativeCall
never@1445	38	// - - NativeMovConstReg
never@1445	39	// - - NativeMovConstRegPatching
never@1445	40	// - - NativeJump
never@1445	41	// - - NativeIllegalOpCode
never@1445	42	// - - NativeReturn
never@1445	43	// - - NativeReturnX (return with argument)
never@1445	44	// - - NativePushConst
never@1445	45	// - - NativeTstRegMem
never@1445	46
never@1445	47	// The base class for different kinds of native instruction abstractions.
never@1445	48	// Provides the primitive operations to manipulate code relative to this.
never@1445	49
never@1445	50	class NativeInstruction VALUE_OBJ_CLASS_SPEC {
never@1445	51	public:
never@1445	52	bool is_jump() {
never@1445	53	ShouldNotCallThis();
twisti@5545	54	return false;
never@1445	55	}
never@1445	56
never@1445	57	bool is_safepoint_poll() {
never@1445	58	ShouldNotCallThis();
twisti@5545	59	return false;
never@1445	60	}
never@1445	61	};
never@1445	62
never@1445	63	inline NativeInstruction* nativeInstruction_at(address address) {
never@1445	64	ShouldNotCallThis();
twisti@5545	65	return NULL;
never@1445	66	}
never@1445	67
never@1445	68	class NativeCall : public NativeInstruction {
never@1445	69	public:
never@1445	70	enum zero_specific_constants {
never@1445	71	instruction_size = 0 // not used within the interpreter
never@1445	72	};
never@1445	73
never@1445	74	address instruction_address() const {
never@1445	75	ShouldNotCallThis();
twisti@5545	76	return NULL;
never@1445	77	}
never@1445	78
never@1445	79	address next_instruction_address() const {
never@1445	80	ShouldNotCallThis();
twisti@5545	81	return NULL;
never@1445	82	}
never@1445	83
never@1445	84	address return_address() const {
never@1445	85	ShouldNotCallThis();
twisti@5545	86	return NULL;
never@1445	87	}
never@1445	88
never@1445	89	address destination() const {
never@1445	90	ShouldNotCallThis();
twisti@5545	91	return NULL;
never@1445	92	}
never@1445	93
never@1445	94	void set_destination_mt_safe(address dest) {
never@1445	95	ShouldNotCallThis();
never@1445	96	}
never@1445	97
never@1445	98	void verify_alignment() {
never@1445	99	ShouldNotCallThis();
never@1445	100	}
never@1445	101
never@1445	102	void verify() {
never@1445	103	ShouldNotCallThis();
never@1445	104	}
never@1445	105
never@1445	106	static bool is_call_before(address return_address) {
never@1445	107	ShouldNotCallThis();
twisti@5545	108	return false;
never@1445	109	}
never@1445	110	};
never@1445	111
never@1445	112	inline NativeCall* nativeCall_before(address return_address) {
never@1445	113	ShouldNotCallThis();
twisti@5545	114	return NULL;
never@1445	115	}
never@1445	116
never@1445	117	inline NativeCall* nativeCall_at(address address) {
never@1445	118	ShouldNotCallThis();
twisti@5545	119	return NULL;
never@1445	120	}
never@1445	121
never@1445	122	class NativeMovConstReg : public NativeInstruction {
never@1445	123	public:
never@1445	124	address next_instruction_address() const {
never@1445	125	ShouldNotCallThis();
twisti@5545	126	return NULL;
never@1445	127	}
never@1445	128
never@1445	129	intptr_t data() const {
never@1445	130	ShouldNotCallThis();
twisti@5545	131	return 0;
never@1445	132	}
never@1445	133
never@1445	134	void set_data(intptr_t x) {
never@1445	135	ShouldNotCallThis();
never@1445	136	}
never@1445	137	};
never@1445	138
never@1445	139	inline NativeMovConstReg* nativeMovConstReg_at(address address) {
never@1445	140	ShouldNotCallThis();
twisti@5545	141	return NULL;
never@1445	142	}
never@1445	143
never@1445	144	class NativeMovRegMem : public NativeInstruction {
never@1445	145	public:
never@1445	146	int offset() const {
never@1445	147	ShouldNotCallThis();
twisti@5545	148	return 0;
never@1445	149	}
never@1445	150
never@1445	151	void set_offset(intptr_t x) {
never@1445	152	ShouldNotCallThis();
never@1445	153	}
never@1445	154
never@1445	155	void add_offset_in_bytes(int add_offset) {
never@1445	156	ShouldNotCallThis();
never@1445	157	}
never@1445	158	};
never@1445	159
never@1445	160	inline NativeMovRegMem* nativeMovRegMem_at(address address) {
never@1445	161	ShouldNotCallThis();
twisti@5545	162	return NULL;
never@1445	163	}
never@1445	164
never@1445	165	class NativeJump : public NativeInstruction {
never@1445	166	public:
never@1445	167	enum zero_specific_constants {
never@1445	168	instruction_size = 0 // not used within the interpreter
never@1445	169	};
never@1445	170
never@1445	171	address jump_destination() const {
never@1445	172	ShouldNotCallThis();
twisti@5545	173	return NULL;
never@1445	174	}
never@1445	175
never@1445	176	void set_jump_destination(address dest) {
never@1445	177	ShouldNotCallThis();
never@1445	178	}
never@1445	179
never@1445	180	static void check_verified_entry_alignment(address entry,
never@1445	181	address verified_entry) {
never@1445	182	}
never@1445	183
never@1445	184	static void patch_verified_entry(address entry,
never@1445	185	address verified_entry,
never@1445	186	address dest);
never@1445	187	};
never@1445	188
never@1445	189	inline NativeJump* nativeJump_at(address address) {
never@1445	190	ShouldNotCallThis();
twisti@5545	191	return NULL;
never@1445	192	}
never@1445	193
never@1445	194	class NativeGeneralJump : public NativeInstruction {
never@1445	195	public:
never@1445	196	address jump_destination() const {
never@1445	197	ShouldNotCallThis();
twisti@5545	198	return NULL;
never@1445	199	}
never@1445	200
never@1445	201	static void insert_unconditional(address code_pos, address entry) {
never@1445	202	ShouldNotCallThis();
never@1445	203	}
never@1445	204
never@1445	205	static void replace_mt_safe(address instr_addr, address code_buffer) {
never@1445	206	ShouldNotCallThis();
never@1445	207	}
never@1445	208	};
never@1445	209
never@1445	210	inline NativeGeneralJump* nativeGeneralJump_at(address address) {
never@1445	211	ShouldNotCallThis();
twisti@5545	212	return NULL;
never@1445	213	}
stefank@2314	214
stefank@2314	215	#endif // CPU_ZERO_VM_NATIVEINST_ZERO_HPP