src/os_cpu/solaris_sparc/vm/vm_version_solaris_sparc.cpp

Mon, 08 Sep 2014 18:11:37 -0700

author
iveresov
date
Mon, 08 Sep 2014 18:11:37 -0700
changeset 7135
d635fd1ac81c
parent 7027
b20a35eae442
child 7296
c49cd31b6da6
permissions
-rw-r--r--

8056124: Hotspot should use PICL interface to get cacheline size on SPARC
Summary: Using libpicl to get L1 data and L2 cache line sizes
Reviewed-by: kvn, roland, morris

duke@435 1 /*
kvn@7027 2 * Copyright (c) 2006, 2014, Oracle and/or its affiliates. All rights reserved.
duke@435 3 * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
duke@435 4 *
duke@435 5 * This code is free software; you can redistribute it and/or modify it
duke@435 6 * under the terms of the GNU General Public License version 2 only, as
duke@435 7 * published by the Free Software Foundation.
duke@435 8 *
duke@435 9 * This code is distributed in the hope that it will be useful, but WITHOUT
duke@435 10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
duke@435 11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
duke@435 12 * version 2 for more details (a copy is included in the LICENSE file that
duke@435 13 * accompanied this code).
duke@435 14 *
duke@435 15 * You should have received a copy of the GNU General Public License version
duke@435 16 * 2 along with this work; if not, write to the Free Software Foundation,
duke@435 17 * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
duke@435 18 *
trims@1907 19 * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA
trims@1907 20 * or visit www.oracle.com if you need additional information or have any
trims@1907 21 * questions.
duke@435 22 *
duke@435 23 */
duke@435 24
stefank@2314 25 #include "precompiled.hpp"
stefank@2314 26 #include "runtime/os.hpp"
stefank@2314 27 #include "vm_version_sparc.hpp"
duke@435 28
iveresov@7135 29 #include <sys/auxv.h>
iveresov@7135 30 #include <sys/auxv_SPARC.h>
iveresov@7135 31 #include <sys/systeminfo.h>
iveresov@7135 32 #include <kstat.h>
iveresov@7135 33 #include <picl.h>
iveresov@7135 34
iveresov@7135 35 extern "C" static int PICL_get_l1_data_cache_line_size_helper(picl_nodehdl_t nodeh, void *result);
iveresov@7135 36 extern "C" static int PICL_get_l2_cache_line_size_helper(picl_nodehdl_t nodeh, void *result);
iveresov@7135 37
iveresov@7135 38 class PICL {
iveresov@7135 39 // Get a value of the integer property. The value in the tree can be either 32 or 64 bit
iveresov@7135 40 // depending on the platform. The result is converted to int.
iveresov@7135 41 static int get_int_property(picl_nodehdl_t nodeh, const char* name, int* result) {
iveresov@7135 42 picl_propinfo_t pinfo;
iveresov@7135 43 picl_prophdl_t proph;
iveresov@7135 44 if (picl_get_prop_by_name(nodeh, name, &proph) != PICL_SUCCESS ||
iveresov@7135 45 picl_get_propinfo(proph, &pinfo) != PICL_SUCCESS) {
iveresov@7135 46 return PICL_FAILURE;
iveresov@7135 47 }
iveresov@7135 48
iveresov@7135 49 if (pinfo.type != PICL_PTYPE_INT && pinfo.type != PICL_PTYPE_UNSIGNED_INT) {
iveresov@7135 50 assert(false, "Invalid property type");
iveresov@7135 51 return PICL_FAILURE;
iveresov@7135 52 }
iveresov@7135 53 if (pinfo.size == sizeof(int64_t)) {
iveresov@7135 54 int64_t val;
iveresov@7135 55 if (picl_get_propval(proph, &val, sizeof(int64_t)) != PICL_SUCCESS) {
iveresov@7135 56 return PICL_FAILURE;
iveresov@7135 57 }
iveresov@7135 58 *result = static_cast<int>(val);
iveresov@7135 59 } else if (pinfo.size == sizeof(int32_t)) {
iveresov@7135 60 int32_t val;
iveresov@7135 61 if (picl_get_propval(proph, &val, sizeof(int32_t)) != PICL_SUCCESS) {
iveresov@7135 62 return PICL_FAILURE;
iveresov@7135 63 }
iveresov@7135 64 *result = static_cast<int>(val);
iveresov@7135 65 } else {
iveresov@7135 66 assert(false, "Unexpected integer property size");
iveresov@7135 67 return PICL_FAILURE;
iveresov@7135 68 }
iveresov@7135 69 return PICL_SUCCESS;
iveresov@7135 70 }
iveresov@7135 71
iveresov@7135 72 // Visitor and a state machine that visits integer properties and verifies that the
iveresov@7135 73 // values are the same. Stores the unique value observed.
iveresov@7135 74 class UniqueValueVisitor {
iveresov@7135 75 enum {
iveresov@7135 76 INITIAL, // Start state, no assignments happened
iveresov@7135 77 ASSIGNED, // Assigned a value
iveresov@7135 78 INCONSISTENT // Inconsistent value seen
iveresov@7135 79 } _state;
iveresov@7135 80 int _value;
iveresov@7135 81 public:
iveresov@7135 82 UniqueValueVisitor() : _state(INITIAL) { }
iveresov@7135 83 int value() {
iveresov@7135 84 assert(_state == ASSIGNED, "Precondition");
iveresov@7135 85 return _value;
iveresov@7135 86 }
iveresov@7135 87 void set_value(int value) {
iveresov@7135 88 assert(_state == INITIAL, "Precondition");
iveresov@7135 89 _value = value;
iveresov@7135 90 _state = ASSIGNED;
iveresov@7135 91 }
iveresov@7135 92 bool is_initial() { return _state == INITIAL; }
iveresov@7135 93 bool is_assigned() { return _state == ASSIGNED; }
iveresov@7135 94 bool is_inconsistent() { return _state == INCONSISTENT; }
iveresov@7135 95 void set_inconsistent() { _state = INCONSISTENT; }
iveresov@7135 96
iveresov@7135 97 static int visit(picl_nodehdl_t nodeh, const char* name, void *arg) {
iveresov@7135 98 UniqueValueVisitor *state = static_cast<UniqueValueVisitor*>(arg);
iveresov@7135 99 assert(!state->is_inconsistent(), "Precondition");
iveresov@7135 100 int curr;
iveresov@7135 101 if (PICL::get_int_property(nodeh, name, &curr) == PICL_SUCCESS) {
iveresov@7135 102 if (!state->is_assigned()) { // first iteration
iveresov@7135 103 state->set_value(curr);
iveresov@7135 104 } else if (curr != state->value()) { // following iterations
iveresov@7135 105 state->set_inconsistent();
iveresov@7135 106 }
iveresov@7135 107 }
iveresov@7135 108 if (state->is_inconsistent()) {
iveresov@7135 109 return PICL_WALK_TERMINATE;
iveresov@7135 110 }
iveresov@7135 111 return PICL_WALK_CONTINUE;
iveresov@7135 112 }
iveresov@7135 113 };
iveresov@7135 114
iveresov@7135 115 int _L1_data_cache_line_size;
iveresov@7135 116 int _L2_cache_line_size;
iveresov@7135 117 public:
iveresov@7135 118 static int get_l1_data_cache_line_size(picl_nodehdl_t nodeh, void *state) {
iveresov@7135 119 return UniqueValueVisitor::visit(nodeh, "l1-dcache-line-size", state);
iveresov@7135 120 }
iveresov@7135 121 static int get_l2_cache_line_size(picl_nodehdl_t nodeh, void *state) {
iveresov@7135 122 return UniqueValueVisitor::visit(nodeh, "l2-cache-line-size", state);
iveresov@7135 123 }
iveresov@7135 124
iveresov@7135 125 PICL() : _L1_data_cache_line_size(0), _L2_cache_line_size(0) {
iveresov@7135 126 if (picl_initialize() == PICL_SUCCESS) {
iveresov@7135 127 picl_nodehdl_t rooth;
iveresov@7135 128 if (picl_get_root(&rooth) == PICL_SUCCESS) {
iveresov@7135 129 UniqueValueVisitor L1_state;
iveresov@7135 130 // Visit all "cpu" class instances
iveresov@7135 131 picl_walk_tree_by_class(rooth, "cpu", &L1_state, PICL_get_l1_data_cache_line_size_helper);
iveresov@7135 132 if (L1_state.is_initial()) { // Still initial, iteration found no values
iveresov@7135 133 // Try walk all "core" class instances, it might be a Fujitsu machine
iveresov@7135 134 picl_walk_tree_by_class(rooth, "core", &L1_state, PICL_get_l1_data_cache_line_size_helper);
iveresov@7135 135 }
iveresov@7135 136 if (L1_state.is_assigned()) { // Is there a value?
iveresov@7135 137 _L1_data_cache_line_size = L1_state.value();
iveresov@7135 138 }
iveresov@7135 139
iveresov@7135 140 UniqueValueVisitor L2_state;
iveresov@7135 141 picl_walk_tree_by_class(rooth, "cpu", &L2_state, PICL_get_l2_cache_line_size_helper);
iveresov@7135 142 if (L2_state.is_initial()) {
iveresov@7135 143 picl_walk_tree_by_class(rooth, "core", &L2_state, PICL_get_l2_cache_line_size_helper);
iveresov@7135 144 }
iveresov@7135 145 if (L2_state.is_assigned()) {
iveresov@7135 146 _L2_cache_line_size = L2_state.value();
iveresov@7135 147 }
iveresov@7135 148 }
iveresov@7135 149 picl_shutdown();
iveresov@7135 150 }
iveresov@7135 151 }
iveresov@7135 152
iveresov@7135 153 unsigned int L1_data_cache_line_size() const { return _L1_data_cache_line_size; }
iveresov@7135 154 unsigned int L2_cache_line_size() const { return _L2_cache_line_size; }
iveresov@7135 155 };
iveresov@7135 156
iveresov@7135 157 extern "C" static int PICL_get_l1_data_cache_line_size_helper(picl_nodehdl_t nodeh, void *result) {
iveresov@7135 158 return PICL::get_l1_data_cache_line_size(nodeh, result);
iveresov@7135 159 }
iveresov@7135 160 extern "C" static int PICL_get_l2_cache_line_size_helper(picl_nodehdl_t nodeh, void *result) {
iveresov@7135 161 return PICL::get_l2_cache_line_size(nodeh, result);
iveresov@7135 162 }
duke@435 163
twisti@1076 164 // We need to keep these here as long as we have to build on Solaris
twisti@1076 165 // versions before 10.
twisti@1076 166 #ifndef SI_ARCHITECTURE_32
twisti@1076 167 #define SI_ARCHITECTURE_32 516 /* basic 32-bit SI_ARCHITECTURE */
twisti@1076 168 #endif
twisti@1076 169
twisti@1076 170 #ifndef SI_ARCHITECTURE_64
twisti@1076 171 #define SI_ARCHITECTURE_64 517 /* basic 64-bit SI_ARCHITECTURE */
twisti@1076 172 #endif
twisti@1076 173
twisti@1076 174 static void do_sysinfo(int si, const char* string, int* features, int mask) {
twisti@1076 175 char tmp;
twisti@1076 176 size_t bufsize = sysinfo(si, &tmp, 1);
twisti@1076 177
twisti@1076 178 // All SI defines used below must be supported.
twisti@1076 179 guarantee(bufsize != -1, "must be supported");
twisti@1076 180
twisti@1076 181 char* buf = (char*) malloc(bufsize);
twisti@1076 182
twisti@1076 183 if (buf == NULL)
twisti@1076 184 return;
twisti@1076 185
twisti@1076 186 if (sysinfo(si, buf, bufsize) == bufsize) {
twisti@1076 187 // Compare the string.
twisti@1076 188 if (strcmp(buf, string) == 0) {
twisti@1076 189 *features |= mask;
twisti@1076 190 }
twisti@1076 191 }
twisti@1076 192
twisti@1076 193 free(buf);
twisti@1076 194 }
twisti@1076 195
duke@435 196 int VM_Version::platform_features(int features) {
twisti@1076 197 // getisax(2), SI_ARCHITECTURE_32, and SI_ARCHITECTURE_64 are
twisti@1076 198 // supported on Solaris 10 and later.
twisti@1076 199 if (os::Solaris::supports_getisax()) {
duke@435 200
twisti@1076 201 // Check 32-bit architecture.
twisti@1076 202 do_sysinfo(SI_ARCHITECTURE_32, "sparc", &features, v8_instructions_m);
duke@435 203
twisti@1076 204 // Check 64-bit architecture.
twisti@1076 205 do_sysinfo(SI_ARCHITECTURE_64, "sparcv9", &features, generic_v9_m);
duke@435 206
twisti@1076 207 // Extract valid instruction set extensions.
jmasa@6325 208 uint_t avs[2];
jmasa@6325 209 uint_t avn = os::Solaris::getisax(avs, 2);
jmasa@6325 210 assert(avn <= 2, "should return two or less av's");
jmasa@6325 211 uint_t av = avs[0];
twisti@1076 212
kvn@2269 213 #ifndef PRODUCT
jmasa@6325 214 if (PrintMiscellaneous && Verbose) {
jmasa@6325 215 tty->print("getisax(2) returned: " PTR32_FORMAT, av);
jmasa@6325 216 if (avn > 1) {
jmasa@6325 217 tty->print(", " PTR32_FORMAT, avs[1]);
jmasa@6325 218 }
jmasa@6325 219 tty->cr();
jmasa@6325 220 }
kvn@2269 221 #endif
kvn@2269 222
twisti@1076 223 if (av & AV_SPARC_MUL32) features |= hardware_mul32_m;
twisti@1076 224 if (av & AV_SPARC_DIV32) features |= hardware_div32_m;
twisti@1076 225 if (av & AV_SPARC_FSMULD) features |= hardware_fsmuld_m;
twisti@1076 226 if (av & AV_SPARC_V8PLUS) features |= v9_instructions_m;
twisti@1078 227 if (av & AV_SPARC_POPC) features |= hardware_popc_m;
twisti@1076 228 if (av & AV_SPARC_VIS) features |= vis1_instructions_m;
twisti@1076 229 if (av & AV_SPARC_VIS2) features |= vis2_instructions_m;
jmasa@6325 230 if (avn > 1) {
jmasa@6325 231 uint_t av2 = avs[1];
jmasa@6325 232 #ifndef AV2_SPARC_SPARC5
jmasa@6325 233 #define AV2_SPARC_SPARC5 0x00000008 /* The 29 new fp and sub instructions */
jmasa@6325 234 #endif
jmasa@6325 235 if (av2 & AV2_SPARC_SPARC5) features |= sparc5_instructions_m;
jmasa@6325 236 }
kvn@2269 237
kvn@2269 238 // Next values are not defined before Solaris 10
kvn@2269 239 // but Solaris 8 is used for jdk6 update builds.
kvn@2269 240 #ifndef AV_SPARC_ASI_BLK_INIT
kvn@2269 241 #define AV_SPARC_ASI_BLK_INIT 0x0080 /* ASI_BLK_INIT_xxx ASI */
kvn@2269 242 #endif
kvn@2403 243 if (av & AV_SPARC_ASI_BLK_INIT) features |= blk_init_instructions_m;
kvn@2403 244
kvn@2269 245 #ifndef AV_SPARC_FMAF
kvn@2403 246 #define AV_SPARC_FMAF 0x0100 /* Fused Multiply-Add */
kvn@2269 247 #endif
kvn@2269 248 if (av & AV_SPARC_FMAF) features |= fmaf_instructions_m;
kvn@2403 249
kvn@2403 250 #ifndef AV_SPARC_FMAU
kvn@2403 251 #define AV_SPARC_FMAU 0x0200 /* Unfused Multiply-Add */
kvn@2403 252 #endif
kvn@2403 253 if (av & AV_SPARC_FMAU) features |= fmau_instructions_m;
kvn@2403 254
kvn@2403 255 #ifndef AV_SPARC_VIS3
kvn@2403 256 #define AV_SPARC_VIS3 0x0400 /* VIS3 instruction set extensions */
kvn@2403 257 #endif
kvn@2403 258 if (av & AV_SPARC_VIS3) features |= vis3_instructions_m;
kvn@2403 259
kvn@3037 260 #ifndef AV_SPARC_CBCOND
kvn@3037 261 #define AV_SPARC_CBCOND 0x10000000 /* compare and branch instrs supported */
kvn@3037 262 #endif
kvn@3037 263 if (av & AV_SPARC_CBCOND) features |= cbcond_instructions_m;
kvn@3037 264
kvn@6312 265 #ifndef AV_SPARC_AES
kvn@6312 266 #define AV_SPARC_AES 0x00020000 /* aes instrs supported */
kvn@6312 267 #endif
kvn@6312 268 if (av & AV_SPARC_AES) features |= aes_instructions_m;
kvn@6312 269
kvn@7027 270 #ifndef AV_SPARC_SHA1
kvn@7027 271 #define AV_SPARC_SHA1 0x00400000 /* sha1 instruction supported */
kvn@7027 272 #endif
kvn@7027 273 if (av & AV_SPARC_SHA1) features |= sha1_instruction_m;
kvn@7027 274
kvn@7027 275 #ifndef AV_SPARC_SHA256
kvn@7027 276 #define AV_SPARC_SHA256 0x00800000 /* sha256 instruction supported */
kvn@7027 277 #endif
kvn@7027 278 if (av & AV_SPARC_SHA256) features |= sha256_instruction_m;
kvn@7027 279
kvn@7027 280 #ifndef AV_SPARC_SHA512
kvn@7027 281 #define AV_SPARC_SHA512 0x01000000 /* sha512 instruction supported */
kvn@7027 282 #endif
kvn@7027 283 if (av & AV_SPARC_SHA512) features |= sha512_instruction_m;
kvn@7027 284
twisti@1076 285 } else {
twisti@1076 286 // getisax(2) failed, use the old legacy code.
twisti@1076 287 #ifndef PRODUCT
twisti@1076 288 if (PrintMiscellaneous && Verbose)
kvn@2269 289 tty->print_cr("getisax(2) is not supported.");
twisti@1076 290 #endif
twisti@1076 291
twisti@1076 292 char tmp;
twisti@1076 293 size_t bufsize = sysinfo(SI_ISALIST, &tmp, 1);
twisti@1076 294 char* buf = (char*) malloc(bufsize);
twisti@1076 295
twisti@1076 296 if (buf != NULL) {
twisti@1076 297 if (sysinfo(SI_ISALIST, buf, bufsize) == bufsize) {
twisti@1076 298 // Figure out what kind of sparc we have
twisti@1076 299 char *sparc_string = strstr(buf, "sparc");
twisti@1076 300 if (sparc_string != NULL) { features |= v8_instructions_m;
twisti@1076 301 if (sparc_string[5] == 'v') {
twisti@1076 302 if (sparc_string[6] == '8') {
twisti@1076 303 if (sparc_string[7] == '-') { features |= hardware_mul32_m;
twisti@1076 304 features |= hardware_div32_m;
twisti@1076 305 } else if (sparc_string[7] == 'p') features |= generic_v9_m;
twisti@1076 306 else features |= generic_v8_m;
twisti@1076 307 } else if (sparc_string[6] == '9') features |= generic_v9_m;
twisti@1076 308 }
twisti@1076 309 }
twisti@1076 310
twisti@1076 311 // Check for visualization instructions
twisti@1076 312 char *vis = strstr(buf, "vis");
twisti@1076 313 if (vis != NULL) { features |= vis1_instructions_m;
twisti@1076 314 if (vis[3] == '2') features |= vis2_instructions_m;
duke@435 315 }
duke@435 316 }
twisti@1076 317 free(buf);
duke@435 318 }
duke@435 319 }
duke@435 320
twisti@1076 321 // Determine the machine type.
twisti@1076 322 do_sysinfo(SI_MACHINE, "sun4v", &features, sun4v_m);
duke@435 323
kvn@2403 324 {
kvn@2403 325 // Using kstat to determine the machine type.
kvn@2403 326 kstat_ctl_t* kc = kstat_open();
kvn@2403 327 kstat_t* ksp = kstat_lookup(kc, (char*)"cpu_info", -1, NULL);
kvn@2403 328 const char* implementation = "UNKNOWN";
kvn@2403 329 if (ksp != NULL) {
kvn@2403 330 if (kstat_read(kc, ksp, NULL) != -1 && ksp->ks_data != NULL) {
kvn@2403 331 kstat_named_t* knm = (kstat_named_t *)ksp->ks_data;
kvn@2403 332 for (int i = 0; i < ksp->ks_ndata; i++) {
kvn@2403 333 if (strcmp((const char*)&(knm[i].name),"implementation") == 0) {
kvn@2403 334 #ifndef KSTAT_DATA_STRING
kvn@2403 335 #define KSTAT_DATA_STRING 9
kvn@2403 336 #endif
kvn@2403 337 if (knm[i].data_type == KSTAT_DATA_CHAR) {
kvn@2403 338 // VM is running on Solaris 8 which does not have value.str.
kvn@2403 339 implementation = &(knm[i].value.c[0]);
kvn@2403 340 } else if (knm[i].data_type == KSTAT_DATA_STRING) {
kvn@2403 341 // VM is running on Solaris 10.
kvn@2403 342 #ifndef KSTAT_NAMED_STR_PTR
kvn@2403 343 // Solaris 8 was used to build VM, define the structure it misses.
kvn@2403 344 struct str_t {
kvn@2403 345 union {
kvn@2403 346 char *ptr; /* NULL-term string */
kvn@2403 347 char __pad[8]; /* 64-bit padding */
kvn@2403 348 } addr;
kvn@2403 349 uint32_t len; /* # bytes for strlen + '\0' */
kvn@2403 350 };
kvn@2403 351 #define KSTAT_NAMED_STR_PTR(knptr) (( (str_t*)&((knptr)->value) )->addr.ptr)
kvn@2403 352 #endif
kvn@2403 353 implementation = KSTAT_NAMED_STR_PTR(&knm[i]);
kvn@2403 354 }
kvn@2403 355 #ifndef PRODUCT
kvn@2403 356 if (PrintMiscellaneous && Verbose) {
kvn@2403 357 tty->print_cr("cpu_info.implementation: %s", implementation);
kvn@2403 358 }
kvn@2403 359 #endif
kvn@2554 360 // Convert to UPPER case before compare.
kvn@2554 361 char* impl = strdup(implementation);
kvn@2554 362
kvn@2554 363 for (int i = 0; impl[i] != 0; i++)
kvn@2554 364 impl[i] = (char)toupper((uint)impl[i]);
kvn@2554 365 if (strstr(impl, "SPARC64") != NULL) {
kvn@2403 366 features |= sparc64_family_m;
kvn@3972 367 } else if (strstr(impl, "SPARC-M") != NULL) {
kvn@3972 368 // M-series SPARC is based on T-series.
kvn@3972 369 features |= (M_family_m | T_family_m);
kvn@2554 370 } else if (strstr(impl, "SPARC-T") != NULL) {
kvn@2403 371 features |= T_family_m;
kvn@2554 372 if (strstr(impl, "SPARC-T1") != NULL) {
kvn@2403 373 features |= T1_model_m;
kvn@2403 374 }
kvn@2554 375 } else {
kvn@3972 376 if (strstr(impl, "SPARC") == NULL) {
kvn@3972 377 #ifndef PRODUCT
kvn@3972 378 // kstat on Solaris 8 virtual machines (branded zones)
kvn@3972 379 // returns "(unsupported)" implementation.
kvn@3972 380 warning("kstat cpu_info implementation = '%s', should contain SPARC", impl);
kvn@3972 381 #endif
kvn@3972 382 implementation = "SPARC";
kvn@3972 383 }
kvn@2403 384 }
kvn@2554 385 free((void*)impl);
kvn@2403 386 break;
kvn@2403 387 }
kvn@2403 388 } // for(
kvn@2403 389 }
kvn@2403 390 }
kvn@2403 391 assert(strcmp(implementation, "UNKNOWN") != 0,
kvn@2403 392 "unknown cpu info (changed kstat interface?)");
kvn@2403 393 kstat_close(kc);
kvn@2403 394 }
kvn@2403 395
iveresov@7135 396 // Figure out cache line sizes using PICL
iveresov@7135 397 PICL picl;
iveresov@7135 398 _L2_cache_line_size = picl.L2_cache_line_size();
iveresov@7135 399
duke@435 400 return features;
duke@435 401 }

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