Thu, 26 Mar 2009 14:31:45 -0700
6822204: volatile fences should prefer lock:addl to actual mfence instructions
Reviewed-by: kvn, phh
duke@435 | 1 | !! |
xdono@631 | 2 | !! Copyright 2005-2008 Sun Microsystems, Inc. All Rights Reserved. |
duke@435 | 3 | !! DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. |
duke@435 | 4 | !! |
duke@435 | 5 | !! This code is free software; you can redistribute it and/or modify it |
duke@435 | 6 | !! under the terms of the GNU General Public License version 2 only, as |
duke@435 | 7 | !! published by the Free Software Foundation. |
duke@435 | 8 | !! |
duke@435 | 9 | !! This code is distributed in the hope that it will be useful, but WITHOUT |
duke@435 | 10 | !! ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or |
duke@435 | 11 | !! FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License |
duke@435 | 12 | !! version 2 for more details (a copy is included in the LICENSE file that |
duke@435 | 13 | !! accompanied this code). |
duke@435 | 14 | !! |
duke@435 | 15 | !! You should have received a copy of the GNU General Public License version |
duke@435 | 16 | !! 2 along with this work; if not, write to the Free Software Foundation, |
duke@435 | 17 | !! Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA. |
duke@435 | 18 | !! |
duke@435 | 19 | !! Please contact Sun Microsystems, Inc., 4150 Network Circle, Santa Clara, |
duke@435 | 20 | !! CA 95054 USA or visit www.sun.com if you need additional information or |
duke@435 | 21 | !! have any questions. |
duke@435 | 22 | !! |
duke@435 | 23 | |
duke@435 | 24 | !! Prototype: int SafeFetch32 (int * adr, int ErrValue) |
duke@435 | 25 | !! The "ld" at Fetch32 is potentially faulting instruction. |
duke@435 | 26 | !! If the instruction traps the trap handler will arrange |
duke@435 | 27 | !! for control to resume at Fetch32Resume. |
duke@435 | 28 | !! By convention with the trap handler we ensure there is a non-CTI |
duke@435 | 29 | !! instruction in the trap shadow. |
duke@435 | 30 | !! |
duke@435 | 31 | !! The reader might be tempted to move this service to .il. |
duke@435 | 32 | !! Don't. Sun's CC back-end reads and optimize code emitted |
duke@435 | 33 | !! by the .il "call", in some cases optimizing the code, completely eliding it, |
duke@435 | 34 | !! or by moving the code from the "call site". |
duke@435 | 35 | |
coleenp@548 | 36 | !! ASM better know we may use G6 for our own purposes |
coleenp@548 | 37 | .register %g6, #ignore |
coleenp@548 | 38 | |
duke@435 | 39 | .globl SafeFetch32 |
duke@435 | 40 | .align 32 |
duke@435 | 41 | .global Fetch32PFI, Fetch32Resume |
duke@435 | 42 | SafeFetch32: |
duke@435 | 43 | mov %o0, %g1 |
duke@435 | 44 | mov %o1, %o0 |
duke@435 | 45 | Fetch32PFI: |
duke@435 | 46 | ld [%g1], %o0 !! <-- Potentially faulting instruction |
duke@435 | 47 | Fetch32Resume: |
duke@435 | 48 | nop |
duke@435 | 49 | retl |
duke@435 | 50 | nop |
duke@435 | 51 | |
duke@435 | 52 | .globl SafeFetchN |
duke@435 | 53 | .align 32 |
duke@435 | 54 | .globl FetchNPFI, FetchNResume |
duke@435 | 55 | SafeFetchN: |
duke@435 | 56 | mov %o0, %g1 |
duke@435 | 57 | mov %o1, %o0 |
duke@435 | 58 | FetchNPFI: |
duke@435 | 59 | ldn [%g1], %o0 |
duke@435 | 60 | FetchNResume: |
duke@435 | 61 | nop |
duke@435 | 62 | retl |
duke@435 | 63 | nop |
duke@435 | 64 | |
duke@435 | 65 | !! Possibilities: |
duke@435 | 66 | !! -- membar |
duke@435 | 67 | !! -- CAS (SP + BIAS, G0, G0) |
duke@435 | 68 | !! -- wr %g0, %asi |
duke@435 | 69 | |
duke@435 | 70 | .global SpinPause |
duke@435 | 71 | .align 32 |
duke@435 | 72 | SpinPause: |
duke@435 | 73 | retl |
duke@435 | 74 | mov %g0, %o0 |
duke@435 | 75 | |
duke@435 | 76 | |
duke@435 | 77 | |
duke@435 | 78 | .globl _Copy_conjoint_jlongs_atomic |
duke@435 | 79 | .align 32 |
duke@435 | 80 | .global _Copy_conjoint_jlongs_atomic |
duke@435 | 81 | _Copy_conjoint_jlongs_atomic: |
duke@435 | 82 | cmp %o0, %o1 |
duke@435 | 83 | bleu 4f |
duke@435 | 84 | sll %o2, 3, %o4 |
duke@435 | 85 | ba 2f |
duke@435 | 86 | 1: |
duke@435 | 87 | subcc %o4, 8, %o4 |
duke@435 | 88 | std %o2, [%o1] |
duke@435 | 89 | add %o0, 8, %o0 |
duke@435 | 90 | add %o1, 8, %o1 |
duke@435 | 91 | 2: |
duke@435 | 92 | bge,a 1b |
duke@435 | 93 | ldd [%o0], %o2 |
duke@435 | 94 | ba 5f |
duke@435 | 95 | nop |
duke@435 | 96 | 3: |
duke@435 | 97 | std %o2, [%o1+%o4] |
duke@435 | 98 | 4: |
duke@435 | 99 | subcc %o4, 8, %o4 |
duke@435 | 100 | bge,a 3b |
duke@435 | 101 | ldd [%o0+%o4], %o2 |
duke@435 | 102 | 5: |
duke@435 | 103 | retl |
duke@435 | 104 | nop |
duke@435 | 105 | |
duke@435 | 106 | |
duke@435 | 107 | |
duke@435 | 108 | .globl _raw_thread_id |
duke@435 | 109 | .align 32 |
duke@435 | 110 | _raw_thread_id: |
coleenp@548 | 111 | .register %g7, #scratch |
duke@435 | 112 | retl |
duke@435 | 113 | mov %g7, %o0 |
duke@435 | 114 | |
duke@435 | 115 | |
duke@435 | 116 | .globl _flush_reg_windows |
duke@435 | 117 | .align 32 |
duke@435 | 118 | _flush_reg_windows: |
duke@435 | 119 | ta 0x03 |
duke@435 | 120 | retl |
duke@435 | 121 | mov %fp, %o0 |
duke@435 | 122 | |
duke@435 | 123 |