src/os_cpu/solaris_sparc/vm/solaris_sparc.s

Sat, 01 Dec 2007 00:00:00 +0000

author
duke
date
Sat, 01 Dec 2007 00:00:00 +0000
changeset 435
a61af66fc99e
child 548
ba764ed4b6f2
permissions
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duke@435 1 !!
duke@435 2 !! Copyright 2005-2007 Sun Microsystems, Inc. All Rights Reserved.
duke@435 3 !! DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
duke@435 4 !!
duke@435 5 !! This code is free software; you can redistribute it and/or modify it
duke@435 6 !! under the terms of the GNU General Public License version 2 only, as
duke@435 7 !! published by the Free Software Foundation.
duke@435 8 !!
duke@435 9 !! This code is distributed in the hope that it will be useful, but WITHOUT
duke@435 10 !! ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
duke@435 11 !! FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
duke@435 12 !! version 2 for more details (a copy is included in the LICENSE file that
duke@435 13 !! accompanied this code).
duke@435 14 !!
duke@435 15 !! You should have received a copy of the GNU General Public License version
duke@435 16 !! 2 along with this work; if not, write to the Free Software Foundation,
duke@435 17 !! Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
duke@435 18 !!
duke@435 19 !! Please contact Sun Microsystems, Inc., 4150 Network Circle, Santa Clara,
duke@435 20 !! CA 95054 USA or visit www.sun.com if you need additional information or
duke@435 21 !! have any questions.
duke@435 22 !!
duke@435 23
duke@435 24 !! Prototype: int SafeFetch32 (int * adr, int ErrValue)
duke@435 25 !! The "ld" at Fetch32 is potentially faulting instruction.
duke@435 26 !! If the instruction traps the trap handler will arrange
duke@435 27 !! for control to resume at Fetch32Resume.
duke@435 28 !! By convention with the trap handler we ensure there is a non-CTI
duke@435 29 !! instruction in the trap shadow.
duke@435 30 !!
duke@435 31 !! The reader might be tempted to move this service to .il.
duke@435 32 !! Don't. Sun's CC back-end reads and optimize code emitted
duke@435 33 !! by the .il "call", in some cases optimizing the code, completely eliding it,
duke@435 34 !! or by moving the code from the "call site".
duke@435 35
duke@435 36
duke@435 37 .globl SafeFetch32
duke@435 38 .align 32
duke@435 39 .global Fetch32PFI, Fetch32Resume
duke@435 40 SafeFetch32:
duke@435 41 mov %o0, %g1
duke@435 42 mov %o1, %o0
duke@435 43 Fetch32PFI:
duke@435 44 ld [%g1], %o0 !! <-- Potentially faulting instruction
duke@435 45 Fetch32Resume:
duke@435 46 nop
duke@435 47 retl
duke@435 48 nop
duke@435 49
duke@435 50 .globl SafeFetchN
duke@435 51 .align 32
duke@435 52 .globl FetchNPFI, FetchNResume
duke@435 53 SafeFetchN:
duke@435 54 mov %o0, %g1
duke@435 55 mov %o1, %o0
duke@435 56 FetchNPFI:
duke@435 57 ldn [%g1], %o0
duke@435 58 FetchNResume:
duke@435 59 nop
duke@435 60 retl
duke@435 61 nop
duke@435 62
duke@435 63 !! Possibilities:
duke@435 64 !! -- membar
duke@435 65 !! -- CAS (SP + BIAS, G0, G0)
duke@435 66 !! -- wr %g0, %asi
duke@435 67
duke@435 68 .global SpinPause
duke@435 69 .align 32
duke@435 70 SpinPause:
duke@435 71 retl
duke@435 72 mov %g0, %o0
duke@435 73
duke@435 74
duke@435 75
duke@435 76 .globl _Copy_conjoint_jlongs_atomic
duke@435 77 .align 32
duke@435 78 .global _Copy_conjoint_jlongs_atomic
duke@435 79 _Copy_conjoint_jlongs_atomic:
duke@435 80 cmp %o0, %o1
duke@435 81 bleu 4f
duke@435 82 sll %o2, 3, %o4
duke@435 83 ba 2f
duke@435 84 1:
duke@435 85 subcc %o4, 8, %o4
duke@435 86 std %o2, [%o1]
duke@435 87 add %o0, 8, %o0
duke@435 88 add %o1, 8, %o1
duke@435 89 2:
duke@435 90 bge,a 1b
duke@435 91 ldd [%o0], %o2
duke@435 92 ba 5f
duke@435 93 nop
duke@435 94 3:
duke@435 95 std %o2, [%o1+%o4]
duke@435 96 4:
duke@435 97 subcc %o4, 8, %o4
duke@435 98 bge,a 3b
duke@435 99 ldd [%o0+%o4], %o2
duke@435 100 5:
duke@435 101 retl
duke@435 102 nop
duke@435 103
duke@435 104
duke@435 105
duke@435 106 .globl _raw_thread_id
duke@435 107 .align 32
duke@435 108 _raw_thread_id:
duke@435 109 retl
duke@435 110 mov %g7, %o0
duke@435 111
duke@435 112
duke@435 113 .globl _flush_reg_windows
duke@435 114 .align 32
duke@435 115 _flush_reg_windows:
duke@435 116 ta 0x03
duke@435 117 retl
duke@435 118 mov %fp, %o0
duke@435 119
duke@435 120

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