src/share/vm/opto/regmask.hpp

Wed, 03 Jun 2015 14:22:57 +0200

author
roland
date
Wed, 03 Jun 2015 14:22:57 +0200
changeset 7859
c1c199dde5c9
parent 7598
ddce0b7cee93
child 7994
04ff2f6cd0eb
permissions
-rw-r--r--

8077504: Unsafe load can loose control dependency and cause crash
Summary: Node::depends_only_on_test() should return false for Unsafe loads
Reviewed-by: kvn, adinn

duke@435 1 /*
dlong@7598 2 * Copyright (c) 1997, 2015, Oracle and/or its affiliates. All rights reserved.
duke@435 3 * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
duke@435 4 *
duke@435 5 * This code is free software; you can redistribute it and/or modify it
duke@435 6 * under the terms of the GNU General Public License version 2 only, as
duke@435 7 * published by the Free Software Foundation.
duke@435 8 *
duke@435 9 * This code is distributed in the hope that it will be useful, but WITHOUT
duke@435 10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
duke@435 11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
duke@435 12 * version 2 for more details (a copy is included in the LICENSE file that
duke@435 13 * accompanied this code).
duke@435 14 *
duke@435 15 * You should have received a copy of the GNU General Public License version
duke@435 16 * 2 along with this work; if not, write to the Free Software Foundation,
duke@435 17 * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
duke@435 18 *
trims@1907 19 * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA
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duke@435 23 */
duke@435 24
stefank@2314 25 #ifndef SHARE_VM_OPTO_REGMASK_HPP
stefank@2314 26 #define SHARE_VM_OPTO_REGMASK_HPP
stefank@2314 27
stefank@2314 28 #include "code/vmreg.hpp"
stefank@2314 29 #include "libadt/port.hpp"
stefank@2314 30 #include "opto/optoreg.hpp"
dlong@7598 31 #if defined ADGLOBALS_MD_HPP
dlong@7598 32 # include ADGLOBALS_MD_HPP
dlong@7598 33 #elif defined TARGET_ARCH_MODEL_x86_32
stefank@2314 34 # include "adfiles/adGlobals_x86_32.hpp"
dlong@7598 35 #elif defined TARGET_ARCH_MODEL_x86_64
stefank@2314 36 # include "adfiles/adGlobals_x86_64.hpp"
dlong@7598 37 #elif defined TARGET_ARCH_MODEL_sparc
stefank@2314 38 # include "adfiles/adGlobals_sparc.hpp"
dlong@7598 39 #elif defined TARGET_ARCH_MODEL_zero
stefank@2314 40 # include "adfiles/adGlobals_zero.hpp"
dlong@7598 41 #elif defined TARGET_ARCH_MODEL_ppc_64
goetz@6441 42 # include "adfiles/adGlobals_ppc_64.hpp"
bobv@2508 43 #endif
stefank@2314 44
duke@435 45 // Some fun naming (textual) substitutions:
duke@435 46 //
duke@435 47 // RegMask::get_low_elem() ==> RegMask::find_first_elem()
duke@435 48 // RegMask::Special ==> RegMask::Empty
duke@435 49 // RegMask::_flags ==> RegMask::is_AllStack()
duke@435 50 // RegMask::operator<<=() ==> RegMask::Insert()
duke@435 51 // RegMask::operator>>=() ==> RegMask::Remove()
duke@435 52 // RegMask::Union() ==> RegMask::OR
duke@435 53 // RegMask::Inter() ==> RegMask::AND
duke@435 54 //
duke@435 55 // OptoRegister::RegName ==> OptoReg::Name
duke@435 56 //
duke@435 57 // OptoReg::stack0() ==> _last_Mach_Reg or ZERO in core version
duke@435 58 //
duke@435 59 // numregs in chaitin ==> proper degree in chaitin
duke@435 60
duke@435 61 //-------------Non-zero bit search methods used by RegMask---------------------
duke@435 62 // Find lowest 1, or return 32 if empty
duke@435 63 int find_lowest_bit( uint32 mask );
duke@435 64 // Find highest 1, or return 32 if empty
duke@435 65 int find_hihghest_bit( uint32 mask );
duke@435 66
duke@435 67 //------------------------------RegMask----------------------------------------
duke@435 68 // The ADL file describes how to print the machine-specific registers, as well
duke@435 69 // as any notion of register classes. We provide a register mask, which is
duke@435 70 // just a collection of Register numbers.
duke@435 71
duke@435 72 // The ADLC defines 2 macros, RM_SIZE and FORALL_BODY.
duke@435 73 // RM_SIZE is the size of a register mask in words.
duke@435 74 // FORALL_BODY replicates a BODY macro once per word in the register mask.
duke@435 75 // The usage is somewhat clumsy and limited to the regmask.[h,c]pp files.
duke@435 76 // However, it means the ADLC can redefine the unroll macro and all loops
duke@435 77 // over register masks will be unrolled by the correct amount.
duke@435 78
duke@435 79 class RegMask VALUE_OBJ_CLASS_SPEC {
duke@435 80 union {
duke@435 81 double _dummy_force_double_alignment[RM_SIZE>>1];
duke@435 82 // Array of Register Mask bits. This array is large enough to cover
duke@435 83 // all the machine registers and all parameters that need to be passed
duke@435 84 // on the stack (stack registers) up to some interesting limit. Methods
duke@435 85 // that need more parameters will NOT be compiled. On Intel, the limit
duke@435 86 // is something like 90+ parameters.
duke@435 87 int _A[RM_SIZE];
duke@435 88 };
duke@435 89
duke@435 90 enum {
duke@435 91 _WordBits = BitsPerInt,
duke@435 92 _LogWordBits = LogBitsPerInt,
duke@435 93 _RM_SIZE = RM_SIZE // local constant, imported, then hidden by #undef
duke@435 94 };
duke@435 95
duke@435 96 public:
duke@435 97 enum { CHUNK_SIZE = RM_SIZE*_WordBits };
duke@435 98
duke@435 99 // SlotsPerLong is 2, since slots are 32 bits and longs are 64 bits.
duke@435 100 // Also, consider the maximum alignment size for a normally allocated
duke@435 101 // value. Since we allocate register pairs but not register quads (at
duke@435 102 // present), this alignment is SlotsPerLong (== 2). A normally
duke@435 103 // aligned allocated register is either a single register, or a pair
duke@435 104 // of adjacent registers, the lower-numbered being even.
duke@435 105 // See also is_aligned_Pairs() below, and the padding added before
duke@435 106 // Matcher::_new_SP to keep allocated pairs aligned properly.
duke@435 107 // If we ever go to quad-word allocations, SlotsPerQuad will become
duke@435 108 // the controlling alignment constraint. Note that this alignment
duke@435 109 // requirement is internal to the allocator, and independent of any
duke@435 110 // particular platform.
kvn@3882 111 enum { SlotsPerLong = 2,
kvn@3882 112 SlotsPerVecS = 1,
kvn@3882 113 SlotsPerVecD = 2,
kvn@3882 114 SlotsPerVecX = 4,
kvn@3882 115 SlotsPerVecY = 8 };
duke@435 116
duke@435 117 // A constructor only used by the ADLC output. All mask fields are filled
duke@435 118 // in directly. Calls to this look something like RM(1,2,3,4);
duke@435 119 RegMask(
duke@435 120 # define BODY(I) int a##I,
duke@435 121 FORALL_BODY
duke@435 122 # undef BODY
duke@435 123 int dummy = 0 ) {
duke@435 124 # define BODY(I) _A[I] = a##I;
duke@435 125 FORALL_BODY
duke@435 126 # undef BODY
duke@435 127 }
duke@435 128
duke@435 129 // Handy copying constructor
duke@435 130 RegMask( RegMask *rm ) {
duke@435 131 # define BODY(I) _A[I] = rm->_A[I];
duke@435 132 FORALL_BODY
duke@435 133 # undef BODY
duke@435 134 }
duke@435 135
duke@435 136 // Construct an empty mask
duke@435 137 RegMask( ) { Clear(); }
duke@435 138
duke@435 139 // Construct a mask with a single bit
duke@435 140 RegMask( OptoReg::Name reg ) { Clear(); Insert(reg); }
duke@435 141
duke@435 142 // Check for register being in mask
duke@435 143 int Member( OptoReg::Name reg ) const {
duke@435 144 assert( reg < CHUNK_SIZE, "" );
duke@435 145 return _A[reg>>_LogWordBits] & (1<<(reg&(_WordBits-1)));
duke@435 146 }
duke@435 147
duke@435 148 // The last bit in the register mask indicates that the mask should repeat
duke@435 149 // indefinitely with ONE bits. Returns TRUE if mask is infinite or
duke@435 150 // unbounded in size. Returns FALSE if mask is finite size.
duke@435 151 int is_AllStack() const { return _A[RM_SIZE-1] >> (_WordBits-1); }
duke@435 152
duke@435 153 // Work around an -xO3 optimization problme in WS6U1. The old way:
duke@435 154 // void set_AllStack() { _A[RM_SIZE-1] |= (1<<(_WordBits-1)); }
duke@435 155 // will cause _A[RM_SIZE-1] to be clobbered, not updated when set_AllStack()
duke@435 156 // follows an Insert() loop, like the one found in init_spill_mask(). Using
duke@435 157 // Insert() instead works because the index into _A in computed instead of
duke@435 158 // constant. See bug 4665841.
duke@435 159 void set_AllStack() { Insert(OptoReg::Name(CHUNK_SIZE-1)); }
duke@435 160
duke@435 161 // Test for being a not-empty mask.
duke@435 162 int is_NotEmpty( ) const {
duke@435 163 int tmp = 0;
duke@435 164 # define BODY(I) tmp |= _A[I];
duke@435 165 FORALL_BODY
duke@435 166 # undef BODY
duke@435 167 return tmp;
duke@435 168 }
duke@435 169
duke@435 170 // Find lowest-numbered register from mask, or BAD if mask is empty.
duke@435 171 OptoReg::Name find_first_elem() const {
duke@435 172 int base, bits;
duke@435 173 # define BODY(I) if( (bits = _A[I]) != 0 ) base = I<<_LogWordBits; else
duke@435 174 FORALL_BODY
duke@435 175 # undef BODY
duke@435 176 { base = OptoReg::Bad; bits = 1<<0; }
duke@435 177 return OptoReg::Name(base + find_lowest_bit(bits));
duke@435 178 }
duke@435 179 // Get highest-numbered register from mask, or BAD if mask is empty.
duke@435 180 OptoReg::Name find_last_elem() const {
duke@435 181 int base, bits;
duke@435 182 # define BODY(I) if( (bits = _A[RM_SIZE-1-I]) != 0 ) base = (RM_SIZE-1-I)<<_LogWordBits; else
duke@435 183 FORALL_BODY
duke@435 184 # undef BODY
duke@435 185 { base = OptoReg::Bad; bits = 1<<0; }
duke@435 186 return OptoReg::Name(base + find_hihghest_bit(bits));
duke@435 187 }
duke@435 188
duke@435 189 // Find the lowest-numbered register pair in the mask. Return the
duke@435 190 // HIGHEST register number in the pair, or BAD if no pairs.
duke@435 191 // Assert that the mask contains only bit pairs.
duke@435 192 OptoReg::Name find_first_pair() const;
duke@435 193
duke@435 194 // Clear out partial bits; leave only aligned adjacent bit pairs.
kvn@3882 195 void clear_to_pairs();
duke@435 196 // Smear out partial bits; leave only aligned adjacent bit pairs.
kvn@3882 197 void smear_to_pairs();
duke@435 198 // Verify that the mask contains only aligned adjacent bit pairs
kvn@3882 199 void verify_pairs() const { assert( is_aligned_pairs(), "mask is not aligned, adjacent pairs" ); }
duke@435 200 // Test that the mask contains only aligned adjacent bit pairs
kvn@3882 201 bool is_aligned_pairs() const;
duke@435 202
duke@435 203 // mask is a pair of misaligned registers
kvn@3882 204 bool is_misaligned_pair() const { return Size()==2 && !is_aligned_pairs(); }
duke@435 205 // Test for single register
duke@435 206 int is_bound1() const;
duke@435 207 // Test for a single adjacent pair
kvn@3882 208 int is_bound_pair() const;
kvn@3882 209 // Test for a single adjacent set of ideal register's size.
kvn@3882 210 int is_bound(uint ireg) const {
kvn@3882 211 if (is_vector(ireg)) {
kvn@3882 212 if (is_bound_set(num_registers(ireg)))
kvn@3882 213 return true;
kvn@3882 214 } else if (is_bound1() || is_bound_pair()) {
kvn@3882 215 return true;
kvn@3882 216 }
kvn@3882 217 return false;
kvn@3882 218 }
kvn@3882 219
kvn@3882 220 // Find the lowest-numbered register set in the mask. Return the
kvn@3882 221 // HIGHEST register number in the set, or BAD if no sets.
kvn@3882 222 // Assert that the mask contains only bit sets.
drchase@4585 223 OptoReg::Name find_first_set(const int size) const;
kvn@3882 224
kvn@3882 225 // Clear out partial bits; leave only aligned adjacent bit sets of size.
drchase@4585 226 void clear_to_sets(const int size);
kvn@3882 227 // Smear out partial bits to aligned adjacent bit sets.
drchase@4585 228 void smear_to_sets(const int size);
kvn@3882 229 // Verify that the mask contains only aligned adjacent bit sets
kvn@3882 230 void verify_sets(int size) const { assert(is_aligned_sets(size), "mask is not aligned, adjacent sets"); }
kvn@3882 231 // Test that the mask contains only aligned adjacent bit sets
drchase@4585 232 bool is_aligned_sets(const int size) const;
kvn@3882 233
kvn@3882 234 // mask is a set of misaligned registers
kvn@3882 235 bool is_misaligned_set(int size) const { return (int)Size()==size && !is_aligned_sets(size);}
kvn@3882 236
kvn@3882 237 // Test for a single adjacent set
drchase@4585 238 int is_bound_set(const int size) const;
kvn@3882 239
kvn@3882 240 static bool is_vector(uint ireg);
kvn@3882 241 static int num_registers(uint ireg);
duke@435 242
duke@435 243 // Fast overlap test. Non-zero if any registers in common.
duke@435 244 int overlap( const RegMask &rm ) const {
duke@435 245 return
duke@435 246 # define BODY(I) (_A[I] & rm._A[I]) |
duke@435 247 FORALL_BODY
duke@435 248 # undef BODY
duke@435 249 0 ;
duke@435 250 }
duke@435 251
duke@435 252 // Special test for register pressure based splitting
duke@435 253 // UP means register only, Register plus stack, or stack only is DOWN
duke@435 254 bool is_UP() const;
duke@435 255
duke@435 256 // Clear a register mask
duke@435 257 void Clear( ) {
duke@435 258 # define BODY(I) _A[I] = 0;
duke@435 259 FORALL_BODY
duke@435 260 # undef BODY
duke@435 261 }
duke@435 262
duke@435 263 // Fill a register mask with 1's
duke@435 264 void Set_All( ) {
duke@435 265 # define BODY(I) _A[I] = -1;
duke@435 266 FORALL_BODY
duke@435 267 # undef BODY
duke@435 268 }
duke@435 269
duke@435 270 // Insert register into mask
duke@435 271 void Insert( OptoReg::Name reg ) {
duke@435 272 assert( reg < CHUNK_SIZE, "" );
duke@435 273 _A[reg>>_LogWordBits] |= (1<<(reg&(_WordBits-1)));
duke@435 274 }
duke@435 275
duke@435 276 // Remove register from mask
duke@435 277 void Remove( OptoReg::Name reg ) {
duke@435 278 assert( reg < CHUNK_SIZE, "" );
duke@435 279 _A[reg>>_LogWordBits] &= ~(1<<(reg&(_WordBits-1)));
duke@435 280 }
duke@435 281
duke@435 282 // OR 'rm' into 'this'
duke@435 283 void OR( const RegMask &rm ) {
duke@435 284 # define BODY(I) this->_A[I] |= rm._A[I];
duke@435 285 FORALL_BODY
duke@435 286 # undef BODY
duke@435 287 }
duke@435 288
duke@435 289 // AND 'rm' into 'this'
duke@435 290 void AND( const RegMask &rm ) {
duke@435 291 # define BODY(I) this->_A[I] &= rm._A[I];
duke@435 292 FORALL_BODY
duke@435 293 # undef BODY
duke@435 294 }
duke@435 295
duke@435 296 // Subtract 'rm' from 'this'
duke@435 297 void SUBTRACT( const RegMask &rm ) {
duke@435 298 # define BODY(I) _A[I] &= ~rm._A[I];
duke@435 299 FORALL_BODY
duke@435 300 # undef BODY
duke@435 301 }
duke@435 302
duke@435 303 // Compute size of register mask: number of bits
duke@435 304 uint Size() const;
duke@435 305
duke@435 306 #ifndef PRODUCT
duke@435 307 void print() const { dump(); }
kvn@4478 308 void dump(outputStream *st = tty) const; // Print a mask
duke@435 309 #endif
duke@435 310
duke@435 311 static const RegMask Empty; // Common empty mask
duke@435 312
duke@435 313 static bool can_represent(OptoReg::Name reg) {
duke@435 314 // NOTE: -1 in computation reflects the usage of the last
kvn@3882 315 // bit of the regmask as an infinite stack flag and
kvn@3882 316 // -7 is to keep mask aligned for largest value (VecY).
duke@435 317 return (int)reg < (int)(CHUNK_SIZE-1);
duke@435 318 }
kvn@3882 319 static bool can_represent_arg(OptoReg::Name reg) {
kvn@3882 320 // NOTE: -SlotsPerVecY in computation reflects the need
kvn@3882 321 // to keep mask aligned for largest value (VecY).
kvn@3882 322 return (int)reg < (int)(CHUNK_SIZE-SlotsPerVecY);
kvn@3882 323 }
duke@435 324 };
duke@435 325
duke@435 326 // Do not use this constant directly in client code!
duke@435 327 #undef RM_SIZE
stefank@2314 328
stefank@2314 329 #endif // SHARE_VM_OPTO_REGMASK_HPP

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