Thu, 30 Aug 2012 11:20:01 -0400
7154641: Servicability agent should work on platforms other than x86, sparc
Summary: Added capability to load support classes for other cpus
Reviewed-by: coleenp, bobv, sla
Contributed-by: Bill Pittore <bill.pittore@oracle.com>
duke@435 | 1 | /* |
trims@1907 | 2 | * Copyright (c) 2003, Oracle and/or its affiliates. All rights reserved. |
duke@435 | 3 | * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. |
duke@435 | 4 | * |
duke@435 | 5 | * This code is free software; you can redistribute it and/or modify it |
duke@435 | 6 | * under the terms of the GNU General Public License version 2 only, as |
duke@435 | 7 | * published by the Free Software Foundation. |
duke@435 | 8 | * |
duke@435 | 9 | * This code is distributed in the hope that it will be useful, but WITHOUT |
duke@435 | 10 | * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or |
duke@435 | 11 | * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License |
duke@435 | 12 | * version 2 for more details (a copy is included in the LICENSE file that |
duke@435 | 13 | * accompanied this code). |
duke@435 | 14 | * |
duke@435 | 15 | * You should have received a copy of the GNU General Public License version |
duke@435 | 16 | * 2 along with this work; if not, write to the Free Software Foundation, |
duke@435 | 17 | * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA. |
duke@435 | 18 | * |
trims@1907 | 19 | * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA |
trims@1907 | 20 | * or visit www.oracle.com if you need additional information or have any |
trims@1907 | 21 | * questions. |
duke@435 | 22 | * |
duke@435 | 23 | */ |
duke@435 | 24 | |
duke@435 | 25 | package sun.jvm.hotspot.debugger.ia64; |
duke@435 | 26 | |
duke@435 | 27 | import sun.jvm.hotspot.debugger.*; |
bpittore@4028 | 28 | import sun.jvm.hotspot.debugger.cdbg.*; |
duke@435 | 29 | |
duke@435 | 30 | /** Specifies the thread context on ia64 platform; only a sub-portion |
duke@435 | 31 | of the context is guaranteed to be present on all operating |
duke@435 | 32 | systems. */ |
duke@435 | 33 | |
duke@435 | 34 | public abstract class IA64ThreadContext implements ThreadContext { |
duke@435 | 35 | // Refer to winnt.h CONTEXT structure - Nov 2001 edition Platform SDK |
duke@435 | 36 | // only a relevant subset of CONTEXT structure is used here. |
duke@435 | 37 | // For eg. floating point registers are ignored. |
duke@435 | 38 | |
duke@435 | 39 | // NOTE: the indices for the various registers must be maintained as |
duke@435 | 40 | // listed across various operating systems. However, only a |
duke@435 | 41 | // subset of the registers' values are guaranteed to be present |
duke@435 | 42 | |
duke@435 | 43 | // global registers r0-r31 |
duke@435 | 44 | public static final int GR0 = 0; |
duke@435 | 45 | public static final int GR1 = 1; |
duke@435 | 46 | public static final int GR2 = 2; |
duke@435 | 47 | public static final int GR3 = 3; |
duke@435 | 48 | public static final int GR4 = 4; |
duke@435 | 49 | public static final int GR5 = 5; |
duke@435 | 50 | public static final int GR6 = 6; |
duke@435 | 51 | public static final int GR7 = 7; |
duke@435 | 52 | public static final int GR8 = 8; |
duke@435 | 53 | public static final int GR9 = 9; |
duke@435 | 54 | public static final int GR10 = 10; |
duke@435 | 55 | public static final int GR11 = 11; |
duke@435 | 56 | public static final int GR12 = 12; |
duke@435 | 57 | public static final int SP = GR12; |
duke@435 | 58 | public static final int GR13 = 13; |
duke@435 | 59 | public static final int GR14 = 14; |
duke@435 | 60 | public static final int GR15 = 15; |
duke@435 | 61 | public static final int GR16 = 16; |
duke@435 | 62 | public static final int GR17 = 17; |
duke@435 | 63 | public static final int GR18 = 18; |
duke@435 | 64 | public static final int GR19 = 19; |
duke@435 | 65 | public static final int GR20 = 20; |
duke@435 | 66 | public static final int GR21 = 21; |
duke@435 | 67 | public static final int GR22 = 22; |
duke@435 | 68 | public static final int GR23 = 23; |
duke@435 | 69 | public static final int GR24 = 24; |
duke@435 | 70 | public static final int GR25 = 25; |
duke@435 | 71 | public static final int GR26 = 26; |
duke@435 | 72 | public static final int GR27 = 27; |
duke@435 | 73 | public static final int GR28 = 28; |
duke@435 | 74 | public static final int GR29 = 29; |
duke@435 | 75 | public static final int GR30 = 30; |
duke@435 | 76 | public static final int GR31 = 31; |
duke@435 | 77 | |
duke@435 | 78 | // Nat bits for r1-r31 |
duke@435 | 79 | public static final int INT_NATS = 32; |
duke@435 | 80 | |
duke@435 | 81 | // predicates |
duke@435 | 82 | public static final int PREDS = 33; |
duke@435 | 83 | |
duke@435 | 84 | // branch registers |
duke@435 | 85 | public static final int BR0 = 34; |
duke@435 | 86 | public static final int BR_RP = BR0; |
duke@435 | 87 | public static final int BR1 = 35; |
duke@435 | 88 | public static final int BR2 = 36; |
duke@435 | 89 | public static final int BR3 = 37; |
duke@435 | 90 | public static final int BR4 = 38; |
duke@435 | 91 | public static final int BR5 = 39; |
duke@435 | 92 | public static final int BR6 = 40; |
duke@435 | 93 | public static final int BR7 = 41; |
duke@435 | 94 | |
duke@435 | 95 | // application registers |
duke@435 | 96 | public static final int AP_UNAT = 42; // User Nat Collection register |
duke@435 | 97 | public static final int AP_LC = 43; // Loop counter register |
duke@435 | 98 | public static final int AP_EC = 43; // Epilog counter register |
duke@435 | 99 | public static final int AP_CCV = 45; // CMPXCHG value register |
duke@435 | 100 | public static final int AP_DCR = 46; // Default control register |
duke@435 | 101 | |
duke@435 | 102 | // register stack info |
duke@435 | 103 | public static final int RS_PFS = 47; // Previous function state |
duke@435 | 104 | public static final int AP_PFS = RS_PFS; |
duke@435 | 105 | public static final int RS_BSP = 48; // Backing store pointer |
duke@435 | 106 | public static final int AR_BSP = RS_BSP; |
duke@435 | 107 | public static final int RS_BSPSTORE = 49; |
duke@435 | 108 | public static final int AP_BSPSTORE = RS_BSPSTORE; |
duke@435 | 109 | public static final int RS_RSC = 50; // RSE configuration |
duke@435 | 110 | public static final int AP_RSC = RS_RSC; |
duke@435 | 111 | public static final int RS_RNAT = 51; // RSE Nat collection register |
duke@435 | 112 | public static final int AP_RNAT = RS_RNAT; |
duke@435 | 113 | |
duke@435 | 114 | // trap status register |
duke@435 | 115 | public static final int ST_IPSR = 52; // Interuption Processor Status |
duke@435 | 116 | public static final int ST_IIP = 53; // Interruption IP |
duke@435 | 117 | public static final int ST_IFS = 54; // Interruption Function State |
duke@435 | 118 | |
duke@435 | 119 | // debug registers |
duke@435 | 120 | public static final int DB_I0 = 55; |
duke@435 | 121 | public static final int DB_I1 = 56; |
duke@435 | 122 | public static final int DB_I2 = 57; |
duke@435 | 123 | public static final int DB_I3 = 58; |
duke@435 | 124 | public static final int DB_I4 = 59; |
duke@435 | 125 | public static final int DB_I5 = 60; |
duke@435 | 126 | public static final int DB_I6 = 61; |
duke@435 | 127 | public static final int DB_I7 = 62; |
duke@435 | 128 | |
duke@435 | 129 | public static final int DB_D0 = 63; |
duke@435 | 130 | public static final int DB_D1 = 64; |
duke@435 | 131 | public static final int DB_D2 = 65; |
duke@435 | 132 | public static final int DB_D3 = 66; |
duke@435 | 133 | public static final int DB_D4 = 67; |
duke@435 | 134 | public static final int DB_D5 = 68; |
duke@435 | 135 | public static final int DB_D6 = 69; |
duke@435 | 136 | public static final int DB_D7 = 70; |
duke@435 | 137 | |
duke@435 | 138 | public static final int NPRGREG = 71; |
duke@435 | 139 | |
duke@435 | 140 | private static final String[] regNames = { |
duke@435 | 141 | "GR0", "GR1", "GR2", "GR3", "GR4", "GR5", "GR6", "GR7", "GR8", |
duke@435 | 142 | "GR9", "GR10", "GR11", "GR12", "GR13", "GR14", "GR15", "GR16", |
duke@435 | 143 | "GR17","GR18", "GR19", "GR20", "GR21", "GR22", "GR23", "GR24", |
duke@435 | 144 | "GR25","GR26", "GR27", "GR28", "GR29", "GR30", "GR31", |
duke@435 | 145 | "INT_NATS", "PREDS", |
duke@435 | 146 | "BR0", "BR1", "BR2", "BR3", "BR4", "BR5", "BR6", "BR7", |
duke@435 | 147 | "AP_UNAT", "AP_LC", "AP_EC", "AP_CCV", "AP_DCR", |
duke@435 | 148 | "RS_FPS", "RS_BSP", "RS_BSPSTORE", "RS_RSC", "RS_RNAT", |
duke@435 | 149 | "ST_IPSR", "ST_IIP", "ST_IFS", |
duke@435 | 150 | "DB_I0", "DB_I1", "DB_I2", "DB_I3", "DB_I4", "DB_I5", "DB_I6", "DB_I7", |
duke@435 | 151 | "DB_D0", "DB_D1", "DB_D2", "DB_D3", "DB_D4", "DB_D5", "DB_D6", "DB_D7" |
duke@435 | 152 | }; |
duke@435 | 153 | |
duke@435 | 154 | private long[] data; |
duke@435 | 155 | |
duke@435 | 156 | public IA64ThreadContext() { |
duke@435 | 157 | data = new long[NPRGREG]; |
duke@435 | 158 | } |
duke@435 | 159 | |
duke@435 | 160 | public int getNumRegisters() { |
duke@435 | 161 | return NPRGREG; |
duke@435 | 162 | } |
duke@435 | 163 | |
duke@435 | 164 | public String getRegisterName(int index) { |
duke@435 | 165 | return regNames[index]; |
duke@435 | 166 | } |
duke@435 | 167 | |
duke@435 | 168 | public void setRegister(int index, long value) { |
duke@435 | 169 | data[index] = value; |
duke@435 | 170 | } |
duke@435 | 171 | |
duke@435 | 172 | public long getRegister(int index) { |
duke@435 | 173 | return data[index]; |
duke@435 | 174 | } |
duke@435 | 175 | |
bpittore@4028 | 176 | public CFrame getTopFrame(Debugger dbg) { |
bpittore@4028 | 177 | return null; |
bpittore@4028 | 178 | } |
bpittore@4028 | 179 | |
duke@435 | 180 | /** This can't be implemented in this class since we would have to |
duke@435 | 181 | tie the implementation to, for example, the debugging system */ |
duke@435 | 182 | public abstract void setRegisterAsAddress(int index, Address value); |
duke@435 | 183 | |
duke@435 | 184 | /** This can't be implemented in this class since we would have to |
duke@435 | 185 | tie the implementation to, for example, the debugging system */ |
duke@435 | 186 | public abstract Address getRegisterAsAddress(int index); |
duke@435 | 187 | } |