• file
• revisions
• annotate
• diff
• comparison
• raw

src/cpu/sparc/vm/c1_FrameMap_sparc.hpp@8a02ca5e5576 (annotated)

src/cpu/sparc/vm/c1_FrameMap_sparc.hpp

Tue, 11 Sep 2012 16:20:57 +0200

author

roland

date

Tue, 11 Sep 2012 16:20:57 +0200

changeset 4051

8a02ca5e5576

parent 2344

ac637b7220d1

child 4153

b9a9ed0f8eeb

permissions

-rw-r--r--

7195816: NPG: Crash in c1_ValueType - ShouldNotReachHere
Summary: C1 needs knowledge of T_METADATA at the LIR level.
Reviewed-by: kvn, coleenp

duke@435	1	/*
trims@1907	2	* Copyright (c) 1999, 2010, Oracle and/or its affiliates. All rights reserved.
duke@435	3	* DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
duke@435	4	*
duke@435	5	* This code is free software; you can redistribute it and/or modify it
duke@435	6	* under the terms of the GNU General Public License version 2 only, as
duke@435	7	* published by the Free Software Foundation.
duke@435	8	*
duke@435	9	* This code is distributed in the hope that it will be useful, but WITHOUT
duke@435	10	* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
duke@435	11	* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
duke@435	12	* version 2 for more details (a copy is included in the LICENSE file that
duke@435	13	* accompanied this code).
duke@435	14	*
duke@435	15	* You should have received a copy of the GNU General Public License version
duke@435	16	* 2 along with this work; if not, write to the Free Software Foundation,
duke@435	17	* Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
duke@435	18	*
trims@1907	19	* Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA
trims@1907	20	* or visit www.oracle.com if you need additional information or have any
trims@1907	21	* questions.
duke@435	22	*
duke@435	23	*/
duke@435	24
stefank@2314	25	#ifndef CPU_SPARC_VM_C1_FRAMEMAP_SPARC_HPP
stefank@2314	26	#define CPU_SPARC_VM_C1_FRAMEMAP_SPARC_HPP
stefank@2314	27
duke@435	28	public:
duke@435	29
duke@435	30	enum {
duke@435	31	nof_reg_args = 6, // registers o0-o5 are available for parameter passing
duke@435	32	first_available_sp_in_frame = frame::memory_parameter_word_sp_offset * BytesPerWord,
duke@435	33	frame_pad_in_bytes = 0
duke@435	34	};
duke@435	35
duke@435	36	static const int pd_c_runtime_reserved_arg_size;
duke@435	37
duke@435	38	static LIR_Opr G0_opr;
duke@435	39	static LIR_Opr G1_opr;
duke@435	40	static LIR_Opr G2_opr;
duke@435	41	static LIR_Opr G3_opr;
duke@435	42	static LIR_Opr G4_opr;
duke@435	43	static LIR_Opr G5_opr;
duke@435	44	static LIR_Opr G6_opr;
duke@435	45	static LIR_Opr G7_opr;
duke@435	46	static LIR_Opr O0_opr;
duke@435	47	static LIR_Opr O1_opr;
duke@435	48	static LIR_Opr O2_opr;
duke@435	49	static LIR_Opr O3_opr;
duke@435	50	static LIR_Opr O4_opr;
duke@435	51	static LIR_Opr O5_opr;
duke@435	52	static LIR_Opr O6_opr;
duke@435	53	static LIR_Opr O7_opr;
duke@435	54	static LIR_Opr L0_opr;
duke@435	55	static LIR_Opr L1_opr;
duke@435	56	static LIR_Opr L2_opr;
duke@435	57	static LIR_Opr L3_opr;
duke@435	58	static LIR_Opr L4_opr;
duke@435	59	static LIR_Opr L5_opr;
duke@435	60	static LIR_Opr L6_opr;
duke@435	61	static LIR_Opr L7_opr;
duke@435	62	static LIR_Opr I0_opr;
duke@435	63	static LIR_Opr I1_opr;
duke@435	64	static LIR_Opr I2_opr;
duke@435	65	static LIR_Opr I3_opr;
duke@435	66	static LIR_Opr I4_opr;
duke@435	67	static LIR_Opr I5_opr;
duke@435	68	static LIR_Opr I6_opr;
duke@435	69	static LIR_Opr I7_opr;
duke@435	70
duke@435	71	static LIR_Opr SP_opr;
duke@435	72	static LIR_Opr FP_opr;
duke@435	73
duke@435	74	static LIR_Opr G0_oop_opr;
duke@435	75	static LIR_Opr G1_oop_opr;
duke@435	76	static LIR_Opr G2_oop_opr;
duke@435	77	static LIR_Opr G3_oop_opr;
duke@435	78	static LIR_Opr G4_oop_opr;
duke@435	79	static LIR_Opr G5_oop_opr;
duke@435	80	static LIR_Opr G6_oop_opr;
duke@435	81	static LIR_Opr G7_oop_opr;
duke@435	82	static LIR_Opr O0_oop_opr;
duke@435	83	static LIR_Opr O1_oop_opr;
duke@435	84	static LIR_Opr O2_oop_opr;
duke@435	85	static LIR_Opr O3_oop_opr;
duke@435	86	static LIR_Opr O4_oop_opr;
duke@435	87	static LIR_Opr O5_oop_opr;
duke@435	88	static LIR_Opr O6_oop_opr;
duke@435	89	static LIR_Opr O7_oop_opr;
duke@435	90	static LIR_Opr L0_oop_opr;
duke@435	91	static LIR_Opr L1_oop_opr;
duke@435	92	static LIR_Opr L2_oop_opr;
duke@435	93	static LIR_Opr L3_oop_opr;
duke@435	94	static LIR_Opr L4_oop_opr;
duke@435	95	static LIR_Opr L5_oop_opr;
duke@435	96	static LIR_Opr L6_oop_opr;
duke@435	97	static LIR_Opr L7_oop_opr;
duke@435	98	static LIR_Opr I0_oop_opr;
duke@435	99	static LIR_Opr I1_oop_opr;
duke@435	100	static LIR_Opr I2_oop_opr;
duke@435	101	static LIR_Opr I3_oop_opr;
duke@435	102	static LIR_Opr I4_oop_opr;
duke@435	103	static LIR_Opr I5_oop_opr;
duke@435	104	static LIR_Opr I6_oop_opr;
duke@435	105	static LIR_Opr I7_oop_opr;
duke@435	106
roland@4051	107	static LIR_Opr G0_metadata_opr;
roland@4051	108	static LIR_Opr G1_metadata_opr;
roland@4051	109	static LIR_Opr G2_metadata_opr;
roland@4051	110	static LIR_Opr G3_metadata_opr;
roland@4051	111	static LIR_Opr G4_metadata_opr;
roland@4051	112	static LIR_Opr G5_metadata_opr;
roland@4051	113	static LIR_Opr G6_metadata_opr;
roland@4051	114	static LIR_Opr G7_metadata_opr;
roland@4051	115	static LIR_Opr O0_metadata_opr;
roland@4051	116	static LIR_Opr O1_metadata_opr;
roland@4051	117	static LIR_Opr O2_metadata_opr;
roland@4051	118	static LIR_Opr O3_metadata_opr;
roland@4051	119	static LIR_Opr O4_metadata_opr;
roland@4051	120	static LIR_Opr O5_metadata_opr;
roland@4051	121	static LIR_Opr O6_metadata_opr;
roland@4051	122	static LIR_Opr O7_metadata_opr;
roland@4051	123	static LIR_Opr L0_metadata_opr;
roland@4051	124	static LIR_Opr L1_metadata_opr;
roland@4051	125	static LIR_Opr L2_metadata_opr;
roland@4051	126	static LIR_Opr L3_metadata_opr;
roland@4051	127	static LIR_Opr L4_metadata_opr;
roland@4051	128	static LIR_Opr L5_metadata_opr;
roland@4051	129	static LIR_Opr L6_metadata_opr;
roland@4051	130	static LIR_Opr L7_metadata_opr;
roland@4051	131	static LIR_Opr I0_metadata_opr;
roland@4051	132	static LIR_Opr I1_metadata_opr;
roland@4051	133	static LIR_Opr I2_metadata_opr;
roland@4051	134	static LIR_Opr I3_metadata_opr;
roland@4051	135	static LIR_Opr I4_metadata_opr;
roland@4051	136	static LIR_Opr I5_metadata_opr;
roland@4051	137	static LIR_Opr I6_metadata_opr;
roland@4051	138	static LIR_Opr I7_metadata_opr;
roland@4051	139
duke@435	140	static LIR_Opr in_long_opr;
duke@435	141	static LIR_Opr out_long_opr;
iveresov@2138	142	static LIR_Opr g1_long_single_opr;
duke@435	143
duke@435	144	static LIR_Opr F0_opr;
duke@435	145	static LIR_Opr F0_double_opr;
duke@435	146
duke@435	147	static LIR_Opr Oexception_opr;
duke@435	148	static LIR_Opr Oissuing_pc_opr;
duke@435	149
duke@435	150	private:
duke@435	151	static FloatRegister _fpu_regs [nof_fpu_regs];
duke@435	152
iveresov@2138	153	static LIR_Opr as_long_single_opr(Register r) {
iveresov@2138	154	return LIR_OprFact::double_cpu(cpu_reg2rnr(r), cpu_reg2rnr(r));
iveresov@2138	155	}
iveresov@2138	156	static LIR_Opr as_long_pair_opr(Register r) {
iveresov@2138	157	return LIR_OprFact::double_cpu(cpu_reg2rnr(r->successor()), cpu_reg2rnr(r));
iveresov@2138	158	}
iveresov@2138	159
duke@435	160	public:
duke@435	161
duke@435	162	#ifdef _LP64
duke@435	163	static LIR_Opr as_long_opr(Register r) {
iveresov@2138	164	return as_long_single_opr(r);
duke@435	165	}
duke@435	166	static LIR_Opr as_pointer_opr(Register r) {
iveresov@2138	167	return as_long_single_opr(r);
duke@435	168	}
duke@435	169	#else
duke@435	170	static LIR_Opr as_long_opr(Register r) {
iveresov@2138	171	return as_long_pair_opr(r);
duke@435	172	}
duke@435	173	static LIR_Opr as_pointer_opr(Register r) {
duke@435	174	return as_opr(r);
duke@435	175	}
duke@435	176	#endif
duke@435	177	static LIR_Opr as_float_opr(FloatRegister r) {
duke@435	178	return LIR_OprFact::single_fpu(r->encoding());
duke@435	179	}
duke@435	180	static LIR_Opr as_double_opr(FloatRegister r) {
duke@435	181	return LIR_OprFact::double_fpu(r->successor()->encoding(), r->encoding());
duke@435	182	}
duke@435	183
duke@435	184	static FloatRegister nr2floatreg (int rnr);
duke@435	185
duke@435	186	static VMReg fpu_regname (int n);
duke@435	187
duke@435	188	static bool is_caller_save_register (LIR_Opr reg);
duke@435	189	static bool is_caller_save_register (Register r);
stefank@2314	190
iveresov@2344	191	static int nof_caller_save_cpu_regs() { return pd_nof_caller_save_cpu_regs_frame_map; }
iveresov@2344	192	static int last_cpu_reg() { return pd_last_cpu_reg; }
iveresov@2344	193
stefank@2314	194	#endif // CPU_SPARC_VM_C1_FRAMEMAP_SPARC_HPP