Thu, 12 Oct 2017 21:27:07 +0800
merge
aoqi@0 | 1 | /* |
aoqi@0 | 2 | * Copyright (c) 2003, 2013, Oracle and/or its affiliates. All rights reserved. |
aoqi@0 | 3 | * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. |
aoqi@0 | 4 | * |
aoqi@0 | 5 | * This code is free software; you can redistribute it and/or modify it |
aoqi@0 | 6 | * under the terms of the GNU General Public License version 2 only, as |
aoqi@0 | 7 | * published by the Free Software Foundation. |
aoqi@0 | 8 | * |
aoqi@0 | 9 | * This code is distributed in the hope that it will be useful, but WITHOUT |
aoqi@0 | 10 | * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or |
aoqi@0 | 11 | * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License |
aoqi@0 | 12 | * version 2 for more details (a copy is included in the LICENSE file that |
aoqi@0 | 13 | * accompanied this code). |
aoqi@0 | 14 | * |
aoqi@0 | 15 | * You should have received a copy of the GNU General Public License version |
aoqi@0 | 16 | * 2 along with this work; if not, write to the Free Software Foundation, |
aoqi@0 | 17 | * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA. |
aoqi@0 | 18 | * |
aoqi@0 | 19 | * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA |
aoqi@0 | 20 | * or visit www.oracle.com if you need additional information or have any |
aoqi@0 | 21 | * questions. |
aoqi@0 | 22 | * |
aoqi@0 | 23 | */ |
aoqi@0 | 24 | |
aoqi@0 | 25 | #include "precompiled.hpp" |
aoqi@0 | 26 | #include "asm/macroAssembler.inline.hpp" |
aoqi@0 | 27 | #include "code/debugInfoRec.hpp" |
aoqi@0 | 28 | #include "code/icBuffer.hpp" |
aoqi@0 | 29 | #include "code/vtableStubs.hpp" |
aoqi@0 | 30 | #include "interpreter/interpreter.hpp" |
aoqi@0 | 31 | #include "oops/compiledICHolder.hpp" |
aoqi@0 | 32 | #include "prims/jvmtiRedefineClassesTrace.hpp" |
aoqi@0 | 33 | #include "runtime/sharedRuntime.hpp" |
aoqi@0 | 34 | #include "runtime/vframeArray.hpp" |
aoqi@0 | 35 | #include "vmreg_sparc.inline.hpp" |
aoqi@0 | 36 | #ifdef COMPILER1 |
aoqi@0 | 37 | #include "c1/c1_Runtime1.hpp" |
aoqi@0 | 38 | #endif |
aoqi@0 | 39 | #ifdef COMPILER2 |
aoqi@0 | 40 | #include "opto/runtime.hpp" |
aoqi@0 | 41 | #endif |
aoqi@0 | 42 | #ifdef SHARK |
aoqi@0 | 43 | #include "compiler/compileBroker.hpp" |
aoqi@0 | 44 | #include "shark/sharkCompiler.hpp" |
aoqi@0 | 45 | #endif |
aoqi@0 | 46 | |
aoqi@0 | 47 | #define __ masm-> |
aoqi@0 | 48 | |
aoqi@0 | 49 | |
aoqi@0 | 50 | class RegisterSaver { |
aoqi@0 | 51 | |
aoqi@0 | 52 | // Used for saving volatile registers. This is Gregs, Fregs, I/L/O. |
aoqi@0 | 53 | // The Oregs are problematic. In the 32bit build the compiler can |
aoqi@0 | 54 | // have O registers live with 64 bit quantities. A window save will |
aoqi@0 | 55 | // cut the heads off of the registers. We have to do a very extensive |
aoqi@0 | 56 | // stack dance to save and restore these properly. |
aoqi@0 | 57 | |
aoqi@0 | 58 | // Note that the Oregs problem only exists if we block at either a polling |
aoqi@0 | 59 | // page exception a compiled code safepoint that was not originally a call |
aoqi@0 | 60 | // or deoptimize following one of these kinds of safepoints. |
aoqi@0 | 61 | |
aoqi@0 | 62 | // Lots of registers to save. For all builds, a window save will preserve |
aoqi@0 | 63 | // the %i and %l registers. For the 32-bit longs-in-two entries and 64-bit |
aoqi@0 | 64 | // builds a window-save will preserve the %o registers. In the LION build |
aoqi@0 | 65 | // we need to save the 64-bit %o registers which requires we save them |
aoqi@0 | 66 | // before the window-save (as then they become %i registers and get their |
aoqi@0 | 67 | // heads chopped off on interrupt). We have to save some %g registers here |
aoqi@0 | 68 | // as well. |
aoqi@0 | 69 | enum { |
aoqi@0 | 70 | // This frame's save area. Includes extra space for the native call: |
aoqi@0 | 71 | // vararg's layout space and the like. Briefly holds the caller's |
aoqi@0 | 72 | // register save area. |
aoqi@0 | 73 | call_args_area = frame::register_save_words_sp_offset + |
aoqi@0 | 74 | frame::memory_parameter_word_sp_offset*wordSize, |
aoqi@0 | 75 | // Make sure save locations are always 8 byte aligned. |
aoqi@0 | 76 | // can't use round_to because it doesn't produce compile time constant |
aoqi@0 | 77 | start_of_extra_save_area = ((call_args_area + 7) & ~7), |
aoqi@0 | 78 | g1_offset = start_of_extra_save_area, // g-regs needing saving |
aoqi@0 | 79 | g3_offset = g1_offset+8, |
aoqi@0 | 80 | g4_offset = g3_offset+8, |
aoqi@0 | 81 | g5_offset = g4_offset+8, |
aoqi@0 | 82 | o0_offset = g5_offset+8, |
aoqi@0 | 83 | o1_offset = o0_offset+8, |
aoqi@0 | 84 | o2_offset = o1_offset+8, |
aoqi@0 | 85 | o3_offset = o2_offset+8, |
aoqi@0 | 86 | o4_offset = o3_offset+8, |
aoqi@0 | 87 | o5_offset = o4_offset+8, |
aoqi@0 | 88 | start_of_flags_save_area = o5_offset+8, |
aoqi@0 | 89 | ccr_offset = start_of_flags_save_area, |
aoqi@0 | 90 | fsr_offset = ccr_offset + 8, |
aoqi@0 | 91 | d00_offset = fsr_offset+8, // Start of float save area |
aoqi@0 | 92 | register_save_size = d00_offset+8*32 |
aoqi@0 | 93 | }; |
aoqi@0 | 94 | |
aoqi@0 | 95 | |
aoqi@0 | 96 | public: |
aoqi@0 | 97 | |
aoqi@0 | 98 | static int Oexception_offset() { return o0_offset; }; |
aoqi@0 | 99 | static int G3_offset() { return g3_offset; }; |
aoqi@0 | 100 | static int G5_offset() { return g5_offset; }; |
aoqi@0 | 101 | static OopMap* save_live_registers(MacroAssembler* masm, int additional_frame_words, int* total_frame_words); |
aoqi@0 | 102 | static void restore_live_registers(MacroAssembler* masm); |
aoqi@0 | 103 | |
aoqi@0 | 104 | // During deoptimization only the result register need to be restored |
aoqi@0 | 105 | // all the other values have already been extracted. |
aoqi@0 | 106 | |
aoqi@0 | 107 | static void restore_result_registers(MacroAssembler* masm); |
aoqi@0 | 108 | }; |
aoqi@0 | 109 | |
aoqi@0 | 110 | OopMap* RegisterSaver::save_live_registers(MacroAssembler* masm, int additional_frame_words, int* total_frame_words) { |
aoqi@0 | 111 | // Record volatile registers as callee-save values in an OopMap so their save locations will be |
aoqi@0 | 112 | // propagated to the caller frame's RegisterMap during StackFrameStream construction (needed for |
aoqi@0 | 113 | // deoptimization; see compiledVFrame::create_stack_value). The caller's I, L and O registers |
aoqi@0 | 114 | // are saved in register windows - I's and L's in the caller's frame and O's in the stub frame |
aoqi@0 | 115 | // (as the stub's I's) when the runtime routine called by the stub creates its frame. |
aoqi@0 | 116 | int i; |
aoqi@0 | 117 | // Always make the frame size 16 byte aligned. |
aoqi@0 | 118 | int frame_size = round_to(additional_frame_words + register_save_size, 16); |
aoqi@0 | 119 | // OopMap frame size is in c2 stack slots (sizeof(jint)) not bytes or words |
aoqi@0 | 120 | int frame_size_in_slots = frame_size / sizeof(jint); |
aoqi@0 | 121 | // CodeBlob frame size is in words. |
aoqi@0 | 122 | *total_frame_words = frame_size / wordSize; |
aoqi@0 | 123 | // OopMap* map = new OopMap(*total_frame_words, 0); |
aoqi@0 | 124 | OopMap* map = new OopMap(frame_size_in_slots, 0); |
aoqi@0 | 125 | |
aoqi@0 | 126 | #if !defined(_LP64) |
aoqi@0 | 127 | |
aoqi@0 | 128 | // Save 64-bit O registers; they will get their heads chopped off on a 'save'. |
aoqi@0 | 129 | __ stx(O0, G2_thread, JavaThread::o_reg_temps_offset_in_bytes()+0*8); |
aoqi@0 | 130 | __ stx(O1, G2_thread, JavaThread::o_reg_temps_offset_in_bytes()+1*8); |
aoqi@0 | 131 | __ stx(O2, G2_thread, JavaThread::o_reg_temps_offset_in_bytes()+2*8); |
aoqi@0 | 132 | __ stx(O3, G2_thread, JavaThread::o_reg_temps_offset_in_bytes()+3*8); |
aoqi@0 | 133 | __ stx(O4, G2_thread, JavaThread::o_reg_temps_offset_in_bytes()+4*8); |
aoqi@0 | 134 | __ stx(O5, G2_thread, JavaThread::o_reg_temps_offset_in_bytes()+5*8); |
aoqi@0 | 135 | #endif /* _LP64 */ |
aoqi@0 | 136 | |
aoqi@0 | 137 | __ save(SP, -frame_size, SP); |
aoqi@0 | 138 | |
aoqi@0 | 139 | #ifndef _LP64 |
aoqi@0 | 140 | // Reload the 64 bit Oregs. Although they are now Iregs we load them |
aoqi@0 | 141 | // to Oregs here to avoid interrupts cutting off their heads |
aoqi@0 | 142 | |
aoqi@0 | 143 | __ ldx(G2_thread, JavaThread::o_reg_temps_offset_in_bytes()+0*8, O0); |
aoqi@0 | 144 | __ ldx(G2_thread, JavaThread::o_reg_temps_offset_in_bytes()+1*8, O1); |
aoqi@0 | 145 | __ ldx(G2_thread, JavaThread::o_reg_temps_offset_in_bytes()+2*8, O2); |
aoqi@0 | 146 | __ ldx(G2_thread, JavaThread::o_reg_temps_offset_in_bytes()+3*8, O3); |
aoqi@0 | 147 | __ ldx(G2_thread, JavaThread::o_reg_temps_offset_in_bytes()+4*8, O4); |
aoqi@0 | 148 | __ ldx(G2_thread, JavaThread::o_reg_temps_offset_in_bytes()+5*8, O5); |
aoqi@0 | 149 | |
aoqi@0 | 150 | __ stx(O0, SP, o0_offset+STACK_BIAS); |
aoqi@0 | 151 | map->set_callee_saved(VMRegImpl::stack2reg((o0_offset + 4)>>2), O0->as_VMReg()); |
aoqi@0 | 152 | |
aoqi@0 | 153 | __ stx(O1, SP, o1_offset+STACK_BIAS); |
aoqi@0 | 154 | |
aoqi@0 | 155 | map->set_callee_saved(VMRegImpl::stack2reg((o1_offset + 4)>>2), O1->as_VMReg()); |
aoqi@0 | 156 | |
aoqi@0 | 157 | __ stx(O2, SP, o2_offset+STACK_BIAS); |
aoqi@0 | 158 | map->set_callee_saved(VMRegImpl::stack2reg((o2_offset + 4)>>2), O2->as_VMReg()); |
aoqi@0 | 159 | |
aoqi@0 | 160 | __ stx(O3, SP, o3_offset+STACK_BIAS); |
aoqi@0 | 161 | map->set_callee_saved(VMRegImpl::stack2reg((o3_offset + 4)>>2), O3->as_VMReg()); |
aoqi@0 | 162 | |
aoqi@0 | 163 | __ stx(O4, SP, o4_offset+STACK_BIAS); |
aoqi@0 | 164 | map->set_callee_saved(VMRegImpl::stack2reg((o4_offset + 4)>>2), O4->as_VMReg()); |
aoqi@0 | 165 | |
aoqi@0 | 166 | __ stx(O5, SP, o5_offset+STACK_BIAS); |
aoqi@0 | 167 | map->set_callee_saved(VMRegImpl::stack2reg((o5_offset + 4)>>2), O5->as_VMReg()); |
aoqi@0 | 168 | #endif /* _LP64 */ |
aoqi@0 | 169 | |
aoqi@0 | 170 | |
aoqi@0 | 171 | #ifdef _LP64 |
aoqi@0 | 172 | int debug_offset = 0; |
aoqi@0 | 173 | #else |
aoqi@0 | 174 | int debug_offset = 4; |
aoqi@0 | 175 | #endif |
aoqi@0 | 176 | // Save the G's |
aoqi@0 | 177 | __ stx(G1, SP, g1_offset+STACK_BIAS); |
aoqi@0 | 178 | map->set_callee_saved(VMRegImpl::stack2reg((g1_offset + debug_offset)>>2), G1->as_VMReg()); |
aoqi@0 | 179 | |
aoqi@0 | 180 | __ stx(G3, SP, g3_offset+STACK_BIAS); |
aoqi@0 | 181 | map->set_callee_saved(VMRegImpl::stack2reg((g3_offset + debug_offset)>>2), G3->as_VMReg()); |
aoqi@0 | 182 | |
aoqi@0 | 183 | __ stx(G4, SP, g4_offset+STACK_BIAS); |
aoqi@0 | 184 | map->set_callee_saved(VMRegImpl::stack2reg((g4_offset + debug_offset)>>2), G4->as_VMReg()); |
aoqi@0 | 185 | |
aoqi@0 | 186 | __ stx(G5, SP, g5_offset+STACK_BIAS); |
aoqi@0 | 187 | map->set_callee_saved(VMRegImpl::stack2reg((g5_offset + debug_offset)>>2), G5->as_VMReg()); |
aoqi@0 | 188 | |
aoqi@0 | 189 | // This is really a waste but we'll keep things as they were for now |
aoqi@0 | 190 | if (true) { |
aoqi@0 | 191 | #ifndef _LP64 |
aoqi@0 | 192 | map->set_callee_saved(VMRegImpl::stack2reg((o0_offset)>>2), O0->as_VMReg()->next()); |
aoqi@0 | 193 | map->set_callee_saved(VMRegImpl::stack2reg((o1_offset)>>2), O1->as_VMReg()->next()); |
aoqi@0 | 194 | map->set_callee_saved(VMRegImpl::stack2reg((o2_offset)>>2), O2->as_VMReg()->next()); |
aoqi@0 | 195 | map->set_callee_saved(VMRegImpl::stack2reg((o3_offset)>>2), O3->as_VMReg()->next()); |
aoqi@0 | 196 | map->set_callee_saved(VMRegImpl::stack2reg((o4_offset)>>2), O4->as_VMReg()->next()); |
aoqi@0 | 197 | map->set_callee_saved(VMRegImpl::stack2reg((o5_offset)>>2), O5->as_VMReg()->next()); |
aoqi@0 | 198 | map->set_callee_saved(VMRegImpl::stack2reg((g1_offset)>>2), G1->as_VMReg()->next()); |
aoqi@0 | 199 | map->set_callee_saved(VMRegImpl::stack2reg((g3_offset)>>2), G3->as_VMReg()->next()); |
aoqi@0 | 200 | map->set_callee_saved(VMRegImpl::stack2reg((g4_offset)>>2), G4->as_VMReg()->next()); |
aoqi@0 | 201 | map->set_callee_saved(VMRegImpl::stack2reg((g5_offset)>>2), G5->as_VMReg()->next()); |
aoqi@0 | 202 | #endif /* _LP64 */ |
aoqi@0 | 203 | } |
aoqi@0 | 204 | |
aoqi@0 | 205 | |
aoqi@0 | 206 | // Save the flags |
aoqi@0 | 207 | __ rdccr( G5 ); |
aoqi@0 | 208 | __ stx(G5, SP, ccr_offset+STACK_BIAS); |
aoqi@0 | 209 | __ stxfsr(SP, fsr_offset+STACK_BIAS); |
aoqi@0 | 210 | |
aoqi@0 | 211 | // Save all the FP registers: 32 doubles (32 floats correspond to the 2 halves of the first 16 doubles) |
aoqi@0 | 212 | int offset = d00_offset; |
aoqi@0 | 213 | for( int i=0; i<FloatRegisterImpl::number_of_registers; i+=2 ) { |
aoqi@0 | 214 | FloatRegister f = as_FloatRegister(i); |
aoqi@0 | 215 | __ stf(FloatRegisterImpl::D, f, SP, offset+STACK_BIAS); |
aoqi@0 | 216 | // Record as callee saved both halves of double registers (2 float registers). |
aoqi@0 | 217 | map->set_callee_saved(VMRegImpl::stack2reg(offset>>2), f->as_VMReg()); |
aoqi@0 | 218 | map->set_callee_saved(VMRegImpl::stack2reg((offset + sizeof(float))>>2), f->as_VMReg()->next()); |
aoqi@0 | 219 | offset += sizeof(double); |
aoqi@0 | 220 | } |
aoqi@0 | 221 | |
aoqi@0 | 222 | // And we're done. |
aoqi@0 | 223 | |
aoqi@0 | 224 | return map; |
aoqi@0 | 225 | } |
aoqi@0 | 226 | |
aoqi@0 | 227 | |
aoqi@0 | 228 | // Pop the current frame and restore all the registers that we |
aoqi@0 | 229 | // saved. |
aoqi@0 | 230 | void RegisterSaver::restore_live_registers(MacroAssembler* masm) { |
aoqi@0 | 231 | |
aoqi@0 | 232 | // Restore all the FP registers |
aoqi@0 | 233 | for( int i=0; i<FloatRegisterImpl::number_of_registers; i+=2 ) { |
aoqi@0 | 234 | __ ldf(FloatRegisterImpl::D, SP, d00_offset+i*sizeof(float)+STACK_BIAS, as_FloatRegister(i)); |
aoqi@0 | 235 | } |
aoqi@0 | 236 | |
aoqi@0 | 237 | __ ldx(SP, ccr_offset+STACK_BIAS, G1); |
aoqi@0 | 238 | __ wrccr (G1) ; |
aoqi@0 | 239 | |
aoqi@0 | 240 | // Restore the G's |
aoqi@0 | 241 | // Note that G2 (AKA GThread) must be saved and restored separately. |
aoqi@0 | 242 | // TODO-FIXME: save and restore some of the other ASRs, viz., %asi and %gsr. |
aoqi@0 | 243 | |
aoqi@0 | 244 | __ ldx(SP, g1_offset+STACK_BIAS, G1); |
aoqi@0 | 245 | __ ldx(SP, g3_offset+STACK_BIAS, G3); |
aoqi@0 | 246 | __ ldx(SP, g4_offset+STACK_BIAS, G4); |
aoqi@0 | 247 | __ ldx(SP, g5_offset+STACK_BIAS, G5); |
aoqi@0 | 248 | |
aoqi@0 | 249 | |
aoqi@0 | 250 | #if !defined(_LP64) |
aoqi@0 | 251 | // Restore the 64-bit O's. |
aoqi@0 | 252 | __ ldx(SP, o0_offset+STACK_BIAS, O0); |
aoqi@0 | 253 | __ ldx(SP, o1_offset+STACK_BIAS, O1); |
aoqi@0 | 254 | __ ldx(SP, o2_offset+STACK_BIAS, O2); |
aoqi@0 | 255 | __ ldx(SP, o3_offset+STACK_BIAS, O3); |
aoqi@0 | 256 | __ ldx(SP, o4_offset+STACK_BIAS, O4); |
aoqi@0 | 257 | __ ldx(SP, o5_offset+STACK_BIAS, O5); |
aoqi@0 | 258 | |
aoqi@0 | 259 | // And temporarily place them in TLS |
aoqi@0 | 260 | |
aoqi@0 | 261 | __ stx(O0, G2_thread, JavaThread::o_reg_temps_offset_in_bytes()+0*8); |
aoqi@0 | 262 | __ stx(O1, G2_thread, JavaThread::o_reg_temps_offset_in_bytes()+1*8); |
aoqi@0 | 263 | __ stx(O2, G2_thread, JavaThread::o_reg_temps_offset_in_bytes()+2*8); |
aoqi@0 | 264 | __ stx(O3, G2_thread, JavaThread::o_reg_temps_offset_in_bytes()+3*8); |
aoqi@0 | 265 | __ stx(O4, G2_thread, JavaThread::o_reg_temps_offset_in_bytes()+4*8); |
aoqi@0 | 266 | __ stx(O5, G2_thread, JavaThread::o_reg_temps_offset_in_bytes()+5*8); |
aoqi@0 | 267 | #endif /* _LP64 */ |
aoqi@0 | 268 | |
aoqi@0 | 269 | // Restore flags |
aoqi@0 | 270 | |
aoqi@0 | 271 | __ ldxfsr(SP, fsr_offset+STACK_BIAS); |
aoqi@0 | 272 | |
aoqi@0 | 273 | __ restore(); |
aoqi@0 | 274 | |
aoqi@0 | 275 | #if !defined(_LP64) |
aoqi@0 | 276 | // Now reload the 64bit Oregs after we've restore the window. |
aoqi@0 | 277 | __ ldx(G2_thread, JavaThread::o_reg_temps_offset_in_bytes()+0*8, O0); |
aoqi@0 | 278 | __ ldx(G2_thread, JavaThread::o_reg_temps_offset_in_bytes()+1*8, O1); |
aoqi@0 | 279 | __ ldx(G2_thread, JavaThread::o_reg_temps_offset_in_bytes()+2*8, O2); |
aoqi@0 | 280 | __ ldx(G2_thread, JavaThread::o_reg_temps_offset_in_bytes()+3*8, O3); |
aoqi@0 | 281 | __ ldx(G2_thread, JavaThread::o_reg_temps_offset_in_bytes()+4*8, O4); |
aoqi@0 | 282 | __ ldx(G2_thread, JavaThread::o_reg_temps_offset_in_bytes()+5*8, O5); |
aoqi@0 | 283 | #endif /* _LP64 */ |
aoqi@0 | 284 | |
aoqi@0 | 285 | } |
aoqi@0 | 286 | |
aoqi@0 | 287 | // Pop the current frame and restore the registers that might be holding |
aoqi@0 | 288 | // a result. |
aoqi@0 | 289 | void RegisterSaver::restore_result_registers(MacroAssembler* masm) { |
aoqi@0 | 290 | |
aoqi@0 | 291 | #if !defined(_LP64) |
aoqi@0 | 292 | // 32bit build returns longs in G1 |
aoqi@0 | 293 | __ ldx(SP, g1_offset+STACK_BIAS, G1); |
aoqi@0 | 294 | |
aoqi@0 | 295 | // Retrieve the 64-bit O's. |
aoqi@0 | 296 | __ ldx(SP, o0_offset+STACK_BIAS, O0); |
aoqi@0 | 297 | __ ldx(SP, o1_offset+STACK_BIAS, O1); |
aoqi@0 | 298 | // and save to TLS |
aoqi@0 | 299 | __ stx(O0, G2_thread, JavaThread::o_reg_temps_offset_in_bytes()+0*8); |
aoqi@0 | 300 | __ stx(O1, G2_thread, JavaThread::o_reg_temps_offset_in_bytes()+1*8); |
aoqi@0 | 301 | #endif /* _LP64 */ |
aoqi@0 | 302 | |
aoqi@0 | 303 | __ ldf(FloatRegisterImpl::D, SP, d00_offset+STACK_BIAS, as_FloatRegister(0)); |
aoqi@0 | 304 | |
aoqi@0 | 305 | __ restore(); |
aoqi@0 | 306 | |
aoqi@0 | 307 | #if !defined(_LP64) |
aoqi@0 | 308 | // Now reload the 64bit Oregs after we've restore the window. |
aoqi@0 | 309 | __ ldx(G2_thread, JavaThread::o_reg_temps_offset_in_bytes()+0*8, O0); |
aoqi@0 | 310 | __ ldx(G2_thread, JavaThread::o_reg_temps_offset_in_bytes()+1*8, O1); |
aoqi@0 | 311 | #endif /* _LP64 */ |
aoqi@0 | 312 | |
aoqi@0 | 313 | } |
aoqi@0 | 314 | |
aoqi@0 | 315 | // Is vector's size (in bytes) bigger than a size saved by default? |
aoqi@0 | 316 | // 8 bytes FP registers are saved by default on SPARC. |
aoqi@0 | 317 | bool SharedRuntime::is_wide_vector(int size) { |
aoqi@0 | 318 | // Note, MaxVectorSize == 8 on SPARC. |
aoqi@0 | 319 | assert(size <= 8, err_msg_res("%d bytes vectors are not supported", size)); |
aoqi@0 | 320 | return size > 8; |
aoqi@0 | 321 | } |
aoqi@0 | 322 | |
aoqi@0 | 323 | // The java_calling_convention describes stack locations as ideal slots on |
aoqi@0 | 324 | // a frame with no abi restrictions. Since we must observe abi restrictions |
aoqi@0 | 325 | // (like the placement of the register window) the slots must be biased by |
aoqi@0 | 326 | // the following value. |
aoqi@0 | 327 | static int reg2offset(VMReg r) { |
aoqi@0 | 328 | return (r->reg2stack() + SharedRuntime::out_preserve_stack_slots()) * VMRegImpl::stack_slot_size; |
aoqi@0 | 329 | } |
aoqi@0 | 330 | |
aoqi@0 | 331 | static VMRegPair reg64_to_VMRegPair(Register r) { |
aoqi@0 | 332 | VMRegPair ret; |
aoqi@0 | 333 | if (wordSize == 8) { |
aoqi@0 | 334 | ret.set2(r->as_VMReg()); |
aoqi@0 | 335 | } else { |
aoqi@0 | 336 | ret.set_pair(r->successor()->as_VMReg(), r->as_VMReg()); |
aoqi@0 | 337 | } |
aoqi@0 | 338 | return ret; |
aoqi@0 | 339 | } |
aoqi@0 | 340 | |
aoqi@0 | 341 | // --------------------------------------------------------------------------- |
aoqi@0 | 342 | // Read the array of BasicTypes from a signature, and compute where the |
aoqi@0 | 343 | // arguments should go. Values in the VMRegPair regs array refer to 4-byte (VMRegImpl::stack_slot_size) |
aoqi@0 | 344 | // quantities. Values less than VMRegImpl::stack0 are registers, those above |
aoqi@0 | 345 | // refer to 4-byte stack slots. All stack slots are based off of the window |
aoqi@0 | 346 | // top. VMRegImpl::stack0 refers to the first slot past the 16-word window, |
aoqi@0 | 347 | // and VMRegImpl::stack0+1 refers to the memory word 4-byes higher. Register |
aoqi@0 | 348 | // values 0-63 (up to RegisterImpl::number_of_registers) are the 64-bit |
aoqi@0 | 349 | // integer registers. Values 64-95 are the (32-bit only) float registers. |
aoqi@0 | 350 | // Each 32-bit quantity is given its own number, so the integer registers |
aoqi@0 | 351 | // (in either 32- or 64-bit builds) use 2 numbers. For example, there is |
aoqi@0 | 352 | // an O0-low and an O0-high. Essentially, all int register numbers are doubled. |
aoqi@0 | 353 | |
aoqi@0 | 354 | // Register results are passed in O0-O5, for outgoing call arguments. To |
aoqi@0 | 355 | // convert to incoming arguments, convert all O's to I's. The regs array |
aoqi@0 | 356 | // refer to the low and hi 32-bit words of 64-bit registers or stack slots. |
aoqi@0 | 357 | // If the regs[].second() field is set to VMRegImpl::Bad(), it means it's unused (a |
aoqi@0 | 358 | // 32-bit value was passed). If both are VMRegImpl::Bad(), it means no value was |
aoqi@0 | 359 | // passed (used as a placeholder for the other half of longs and doubles in |
aoqi@0 | 360 | // the 64-bit build). regs[].second() is either VMRegImpl::Bad() or regs[].second() is |
aoqi@0 | 361 | // regs[].first()+1 (regs[].first() may be misaligned in the C calling convention). |
aoqi@0 | 362 | // Sparc never passes a value in regs[].second() but not regs[].first() (regs[].first() |
aoqi@0 | 363 | // == VMRegImpl::Bad() && regs[].second() != VMRegImpl::Bad()) nor unrelated values in the |
aoqi@0 | 364 | // same VMRegPair. |
aoqi@0 | 365 | |
aoqi@0 | 366 | // Note: the INPUTS in sig_bt are in units of Java argument words, which are |
aoqi@0 | 367 | // either 32-bit or 64-bit depending on the build. The OUTPUTS are in 32-bit |
aoqi@0 | 368 | // units regardless of build. |
aoqi@0 | 369 | |
aoqi@0 | 370 | |
aoqi@0 | 371 | // --------------------------------------------------------------------------- |
aoqi@0 | 372 | // The compiled Java calling convention. The Java convention always passes |
aoqi@0 | 373 | // 64-bit values in adjacent aligned locations (either registers or stack), |
aoqi@0 | 374 | // floats in float registers and doubles in aligned float pairs. There is |
aoqi@0 | 375 | // no backing varargs store for values in registers. |
aoqi@0 | 376 | // In the 32-bit build, longs are passed on the stack (cannot be |
aoqi@0 | 377 | // passed in I's, because longs in I's get their heads chopped off at |
aoqi@0 | 378 | // interrupt). |
aoqi@0 | 379 | int SharedRuntime::java_calling_convention(const BasicType *sig_bt, |
aoqi@0 | 380 | VMRegPair *regs, |
aoqi@0 | 381 | int total_args_passed, |
aoqi@0 | 382 | int is_outgoing) { |
aoqi@0 | 383 | assert(F31->as_VMReg()->is_reg(), "overlapping stack/register numbers"); |
aoqi@0 | 384 | |
aoqi@0 | 385 | const int int_reg_max = SPARC_ARGS_IN_REGS_NUM; |
aoqi@0 | 386 | const int flt_reg_max = 8; |
aoqi@0 | 387 | |
aoqi@0 | 388 | int int_reg = 0; |
aoqi@0 | 389 | int flt_reg = 0; |
aoqi@0 | 390 | int slot = 0; |
aoqi@0 | 391 | |
aoqi@0 | 392 | for (int i = 0; i < total_args_passed; i++) { |
aoqi@0 | 393 | switch (sig_bt[i]) { |
aoqi@0 | 394 | case T_INT: |
aoqi@0 | 395 | case T_SHORT: |
aoqi@0 | 396 | case T_CHAR: |
aoqi@0 | 397 | case T_BYTE: |
aoqi@0 | 398 | case T_BOOLEAN: |
aoqi@0 | 399 | #ifndef _LP64 |
aoqi@0 | 400 | case T_OBJECT: |
aoqi@0 | 401 | case T_ARRAY: |
aoqi@0 | 402 | case T_ADDRESS: // Used, e.g., in slow-path locking for the lock's stack address |
aoqi@0 | 403 | #endif // _LP64 |
aoqi@0 | 404 | if (int_reg < int_reg_max) { |
aoqi@0 | 405 | Register r = is_outgoing ? as_oRegister(int_reg++) : as_iRegister(int_reg++); |
aoqi@0 | 406 | regs[i].set1(r->as_VMReg()); |
aoqi@0 | 407 | } else { |
aoqi@0 | 408 | regs[i].set1(VMRegImpl::stack2reg(slot++)); |
aoqi@0 | 409 | } |
aoqi@0 | 410 | break; |
aoqi@0 | 411 | |
aoqi@0 | 412 | #ifdef _LP64 |
aoqi@0 | 413 | case T_LONG: |
aoqi@0 | 414 | assert(sig_bt[i+1] == T_VOID, "expecting VOID in other half"); |
aoqi@0 | 415 | // fall-through |
aoqi@0 | 416 | case T_OBJECT: |
aoqi@0 | 417 | case T_ARRAY: |
aoqi@0 | 418 | case T_ADDRESS: // Used, e.g., in slow-path locking for the lock's stack address |
aoqi@0 | 419 | if (int_reg < int_reg_max) { |
aoqi@0 | 420 | Register r = is_outgoing ? as_oRegister(int_reg++) : as_iRegister(int_reg++); |
aoqi@0 | 421 | regs[i].set2(r->as_VMReg()); |
aoqi@0 | 422 | } else { |
aoqi@0 | 423 | slot = round_to(slot, 2); // align |
aoqi@0 | 424 | regs[i].set2(VMRegImpl::stack2reg(slot)); |
aoqi@0 | 425 | slot += 2; |
aoqi@0 | 426 | } |
aoqi@0 | 427 | break; |
aoqi@0 | 428 | #else |
aoqi@0 | 429 | case T_LONG: |
aoqi@0 | 430 | assert(sig_bt[i+1] == T_VOID, "expecting VOID in other half"); |
aoqi@0 | 431 | // On 32-bit SPARC put longs always on the stack to keep the pressure off |
aoqi@0 | 432 | // integer argument registers. They should be used for oops. |
aoqi@0 | 433 | slot = round_to(slot, 2); // align |
aoqi@0 | 434 | regs[i].set2(VMRegImpl::stack2reg(slot)); |
aoqi@0 | 435 | slot += 2; |
aoqi@0 | 436 | #endif |
aoqi@0 | 437 | break; |
aoqi@0 | 438 | |
aoqi@0 | 439 | case T_FLOAT: |
aoqi@0 | 440 | if (flt_reg < flt_reg_max) { |
aoqi@0 | 441 | FloatRegister r = as_FloatRegister(flt_reg++); |
aoqi@0 | 442 | regs[i].set1(r->as_VMReg()); |
aoqi@0 | 443 | } else { |
aoqi@0 | 444 | regs[i].set1(VMRegImpl::stack2reg(slot++)); |
aoqi@0 | 445 | } |
aoqi@0 | 446 | break; |
aoqi@0 | 447 | |
aoqi@0 | 448 | case T_DOUBLE: |
aoqi@0 | 449 | assert(sig_bt[i+1] == T_VOID, "expecting half"); |
aoqi@0 | 450 | if (round_to(flt_reg, 2) + 1 < flt_reg_max) { |
aoqi@0 | 451 | flt_reg = round_to(flt_reg, 2); // align |
aoqi@0 | 452 | FloatRegister r = as_FloatRegister(flt_reg); |
aoqi@0 | 453 | regs[i].set2(r->as_VMReg()); |
aoqi@0 | 454 | flt_reg += 2; |
aoqi@0 | 455 | } else { |
aoqi@0 | 456 | slot = round_to(slot, 2); // align |
aoqi@0 | 457 | regs[i].set2(VMRegImpl::stack2reg(slot)); |
aoqi@0 | 458 | slot += 2; |
aoqi@0 | 459 | } |
aoqi@0 | 460 | break; |
aoqi@0 | 461 | |
aoqi@0 | 462 | case T_VOID: |
aoqi@0 | 463 | regs[i].set_bad(); // Halves of longs & doubles |
aoqi@0 | 464 | break; |
aoqi@0 | 465 | |
aoqi@0 | 466 | default: |
aoqi@0 | 467 | fatal(err_msg_res("unknown basic type %d", sig_bt[i])); |
aoqi@0 | 468 | break; |
aoqi@0 | 469 | } |
aoqi@0 | 470 | } |
aoqi@0 | 471 | |
aoqi@0 | 472 | // retun the amount of stack space these arguments will need. |
aoqi@0 | 473 | return slot; |
aoqi@0 | 474 | } |
aoqi@0 | 475 | |
aoqi@0 | 476 | // Helper class mostly to avoid passing masm everywhere, and handle |
aoqi@0 | 477 | // store displacement overflow logic. |
aoqi@0 | 478 | class AdapterGenerator { |
aoqi@0 | 479 | MacroAssembler *masm; |
aoqi@0 | 480 | Register Rdisp; |
aoqi@0 | 481 | void set_Rdisp(Register r) { Rdisp = r; } |
aoqi@0 | 482 | |
aoqi@0 | 483 | void patch_callers_callsite(); |
aoqi@0 | 484 | |
aoqi@0 | 485 | // base+st_off points to top of argument |
aoqi@0 | 486 | int arg_offset(const int st_off) { return st_off; } |
aoqi@0 | 487 | int next_arg_offset(const int st_off) { |
aoqi@0 | 488 | return st_off - Interpreter::stackElementSize; |
aoqi@0 | 489 | } |
aoqi@0 | 490 | |
aoqi@0 | 491 | // Argument slot values may be loaded first into a register because |
aoqi@0 | 492 | // they might not fit into displacement. |
aoqi@0 | 493 | RegisterOrConstant arg_slot(const int st_off); |
aoqi@0 | 494 | RegisterOrConstant next_arg_slot(const int st_off); |
aoqi@0 | 495 | |
aoqi@0 | 496 | // Stores long into offset pointed to by base |
aoqi@0 | 497 | void store_c2i_long(Register r, Register base, |
aoqi@0 | 498 | const int st_off, bool is_stack); |
aoqi@0 | 499 | void store_c2i_object(Register r, Register base, |
aoqi@0 | 500 | const int st_off); |
aoqi@0 | 501 | void store_c2i_int(Register r, Register base, |
aoqi@0 | 502 | const int st_off); |
aoqi@0 | 503 | void store_c2i_double(VMReg r_2, |
aoqi@0 | 504 | VMReg r_1, Register base, const int st_off); |
aoqi@0 | 505 | void store_c2i_float(FloatRegister f, Register base, |
aoqi@0 | 506 | const int st_off); |
aoqi@0 | 507 | |
aoqi@0 | 508 | public: |
aoqi@0 | 509 | void gen_c2i_adapter(int total_args_passed, |
aoqi@0 | 510 | // VMReg max_arg, |
aoqi@0 | 511 | int comp_args_on_stack, // VMRegStackSlots |
aoqi@0 | 512 | const BasicType *sig_bt, |
aoqi@0 | 513 | const VMRegPair *regs, |
aoqi@0 | 514 | Label& skip_fixup); |
aoqi@0 | 515 | void gen_i2c_adapter(int total_args_passed, |
aoqi@0 | 516 | // VMReg max_arg, |
aoqi@0 | 517 | int comp_args_on_stack, // VMRegStackSlots |
aoqi@0 | 518 | const BasicType *sig_bt, |
aoqi@0 | 519 | const VMRegPair *regs); |
aoqi@0 | 520 | |
aoqi@0 | 521 | AdapterGenerator(MacroAssembler *_masm) : masm(_masm) {} |
aoqi@0 | 522 | }; |
aoqi@0 | 523 | |
aoqi@0 | 524 | |
aoqi@0 | 525 | // Patch the callers callsite with entry to compiled code if it exists. |
aoqi@0 | 526 | void AdapterGenerator::patch_callers_callsite() { |
aoqi@0 | 527 | Label L; |
aoqi@0 | 528 | __ ld_ptr(G5_method, in_bytes(Method::code_offset()), G3_scratch); |
aoqi@0 | 529 | __ br_null(G3_scratch, false, Assembler::pt, L); |
aoqi@0 | 530 | __ delayed()->nop(); |
aoqi@0 | 531 | // Call into the VM to patch the caller, then jump to compiled callee |
aoqi@0 | 532 | __ save_frame(4); // Args in compiled layout; do not blow them |
aoqi@0 | 533 | |
aoqi@0 | 534 | // Must save all the live Gregs the list is: |
aoqi@0 | 535 | // G1: 1st Long arg (32bit build) |
aoqi@0 | 536 | // G2: global allocated to TLS |
aoqi@0 | 537 | // G3: used in inline cache check (scratch) |
aoqi@0 | 538 | // G4: 2nd Long arg (32bit build); |
aoqi@0 | 539 | // G5: used in inline cache check (Method*) |
aoqi@0 | 540 | |
aoqi@0 | 541 | // The longs must go to the stack by hand since in the 32 bit build they can be trashed by window ops. |
aoqi@0 | 542 | |
aoqi@0 | 543 | #ifdef _LP64 |
aoqi@0 | 544 | // mov(s,d) |
aoqi@0 | 545 | __ mov(G1, L1); |
aoqi@0 | 546 | __ mov(G4, L4); |
aoqi@0 | 547 | __ mov(G5_method, L5); |
aoqi@0 | 548 | __ mov(G5_method, O0); // VM needs target method |
aoqi@0 | 549 | __ mov(I7, O1); // VM needs caller's callsite |
aoqi@0 | 550 | // Must be a leaf call... |
aoqi@0 | 551 | // can be very far once the blob has been relocated |
aoqi@0 | 552 | AddressLiteral dest(CAST_FROM_FN_PTR(address, SharedRuntime::fixup_callers_callsite)); |
aoqi@0 | 553 | __ relocate(relocInfo::runtime_call_type); |
aoqi@0 | 554 | __ jumpl_to(dest, O7, O7); |
aoqi@0 | 555 | __ delayed()->mov(G2_thread, L7_thread_cache); |
aoqi@0 | 556 | __ mov(L7_thread_cache, G2_thread); |
aoqi@0 | 557 | __ mov(L1, G1); |
aoqi@0 | 558 | __ mov(L4, G4); |
aoqi@0 | 559 | __ mov(L5, G5_method); |
aoqi@0 | 560 | #else |
aoqi@0 | 561 | __ stx(G1, FP, -8 + STACK_BIAS); |
aoqi@0 | 562 | __ stx(G4, FP, -16 + STACK_BIAS); |
aoqi@0 | 563 | __ mov(G5_method, L5); |
aoqi@0 | 564 | __ mov(G5_method, O0); // VM needs target method |
aoqi@0 | 565 | __ mov(I7, O1); // VM needs caller's callsite |
aoqi@0 | 566 | // Must be a leaf call... |
aoqi@0 | 567 | __ call(CAST_FROM_FN_PTR(address, SharedRuntime::fixup_callers_callsite), relocInfo::runtime_call_type); |
aoqi@0 | 568 | __ delayed()->mov(G2_thread, L7_thread_cache); |
aoqi@0 | 569 | __ mov(L7_thread_cache, G2_thread); |
aoqi@0 | 570 | __ ldx(FP, -8 + STACK_BIAS, G1); |
aoqi@0 | 571 | __ ldx(FP, -16 + STACK_BIAS, G4); |
aoqi@0 | 572 | __ mov(L5, G5_method); |
aoqi@0 | 573 | #endif /* _LP64 */ |
aoqi@0 | 574 | |
aoqi@0 | 575 | __ restore(); // Restore args |
aoqi@0 | 576 | __ bind(L); |
aoqi@0 | 577 | } |
aoqi@0 | 578 | |
aoqi@0 | 579 | |
aoqi@0 | 580 | RegisterOrConstant AdapterGenerator::arg_slot(const int st_off) { |
aoqi@0 | 581 | RegisterOrConstant roc(arg_offset(st_off)); |
aoqi@0 | 582 | return __ ensure_simm13_or_reg(roc, Rdisp); |
aoqi@0 | 583 | } |
aoqi@0 | 584 | |
aoqi@0 | 585 | RegisterOrConstant AdapterGenerator::next_arg_slot(const int st_off) { |
aoqi@0 | 586 | RegisterOrConstant roc(next_arg_offset(st_off)); |
aoqi@0 | 587 | return __ ensure_simm13_or_reg(roc, Rdisp); |
aoqi@0 | 588 | } |
aoqi@0 | 589 | |
aoqi@0 | 590 | |
aoqi@0 | 591 | // Stores long into offset pointed to by base |
aoqi@0 | 592 | void AdapterGenerator::store_c2i_long(Register r, Register base, |
aoqi@0 | 593 | const int st_off, bool is_stack) { |
aoqi@0 | 594 | #ifdef _LP64 |
aoqi@0 | 595 | // In V9, longs are given 2 64-bit slots in the interpreter, but the |
aoqi@0 | 596 | // data is passed in only 1 slot. |
aoqi@0 | 597 | __ stx(r, base, next_arg_slot(st_off)); |
aoqi@0 | 598 | #else |
aoqi@0 | 599 | #ifdef COMPILER2 |
aoqi@0 | 600 | // Misaligned store of 64-bit data |
aoqi@0 | 601 | __ stw(r, base, arg_slot(st_off)); // lo bits |
aoqi@0 | 602 | __ srlx(r, 32, r); |
aoqi@0 | 603 | __ stw(r, base, next_arg_slot(st_off)); // hi bits |
aoqi@0 | 604 | #else |
aoqi@0 | 605 | if (is_stack) { |
aoqi@0 | 606 | // Misaligned store of 64-bit data |
aoqi@0 | 607 | __ stw(r, base, arg_slot(st_off)); // lo bits |
aoqi@0 | 608 | __ srlx(r, 32, r); |
aoqi@0 | 609 | __ stw(r, base, next_arg_slot(st_off)); // hi bits |
aoqi@0 | 610 | } else { |
aoqi@0 | 611 | __ stw(r->successor(), base, arg_slot(st_off) ); // lo bits |
aoqi@0 | 612 | __ stw(r , base, next_arg_slot(st_off)); // hi bits |
aoqi@0 | 613 | } |
aoqi@0 | 614 | #endif // COMPILER2 |
aoqi@0 | 615 | #endif // _LP64 |
aoqi@0 | 616 | } |
aoqi@0 | 617 | |
aoqi@0 | 618 | void AdapterGenerator::store_c2i_object(Register r, Register base, |
aoqi@0 | 619 | const int st_off) { |
aoqi@0 | 620 | __ st_ptr (r, base, arg_slot(st_off)); |
aoqi@0 | 621 | } |
aoqi@0 | 622 | |
aoqi@0 | 623 | void AdapterGenerator::store_c2i_int(Register r, Register base, |
aoqi@0 | 624 | const int st_off) { |
aoqi@0 | 625 | __ st (r, base, arg_slot(st_off)); |
aoqi@0 | 626 | } |
aoqi@0 | 627 | |
aoqi@0 | 628 | // Stores into offset pointed to by base |
aoqi@0 | 629 | void AdapterGenerator::store_c2i_double(VMReg r_2, |
aoqi@0 | 630 | VMReg r_1, Register base, const int st_off) { |
aoqi@0 | 631 | #ifdef _LP64 |
aoqi@0 | 632 | // In V9, doubles are given 2 64-bit slots in the interpreter, but the |
aoqi@0 | 633 | // data is passed in only 1 slot. |
aoqi@0 | 634 | __ stf(FloatRegisterImpl::D, r_1->as_FloatRegister(), base, next_arg_slot(st_off)); |
aoqi@0 | 635 | #else |
aoqi@0 | 636 | // Need to marshal 64-bit value from misaligned Lesp loads |
aoqi@0 | 637 | __ stf(FloatRegisterImpl::S, r_1->as_FloatRegister(), base, next_arg_slot(st_off)); |
aoqi@0 | 638 | __ stf(FloatRegisterImpl::S, r_2->as_FloatRegister(), base, arg_slot(st_off) ); |
aoqi@0 | 639 | #endif |
aoqi@0 | 640 | } |
aoqi@0 | 641 | |
aoqi@0 | 642 | void AdapterGenerator::store_c2i_float(FloatRegister f, Register base, |
aoqi@0 | 643 | const int st_off) { |
aoqi@0 | 644 | __ stf(FloatRegisterImpl::S, f, base, arg_slot(st_off)); |
aoqi@0 | 645 | } |
aoqi@0 | 646 | |
aoqi@0 | 647 | void AdapterGenerator::gen_c2i_adapter( |
aoqi@0 | 648 | int total_args_passed, |
aoqi@0 | 649 | // VMReg max_arg, |
aoqi@0 | 650 | int comp_args_on_stack, // VMRegStackSlots |
aoqi@0 | 651 | const BasicType *sig_bt, |
aoqi@0 | 652 | const VMRegPair *regs, |
aoqi@0 | 653 | Label& L_skip_fixup) { |
aoqi@0 | 654 | |
aoqi@0 | 655 | // Before we get into the guts of the C2I adapter, see if we should be here |
aoqi@0 | 656 | // at all. We've come from compiled code and are attempting to jump to the |
aoqi@0 | 657 | // interpreter, which means the caller made a static call to get here |
aoqi@0 | 658 | // (vcalls always get a compiled target if there is one). Check for a |
aoqi@0 | 659 | // compiled target. If there is one, we need to patch the caller's call. |
aoqi@0 | 660 | // However we will run interpreted if we come thru here. The next pass |
aoqi@0 | 661 | // thru the call site will run compiled. If we ran compiled here then |
aoqi@0 | 662 | // we can (theorectically) do endless i2c->c2i->i2c transitions during |
aoqi@0 | 663 | // deopt/uncommon trap cycles. If we always go interpreted here then |
aoqi@0 | 664 | // we can have at most one and don't need to play any tricks to keep |
aoqi@0 | 665 | // from endlessly growing the stack. |
aoqi@0 | 666 | // |
aoqi@0 | 667 | // Actually if we detected that we had an i2c->c2i transition here we |
aoqi@0 | 668 | // ought to be able to reset the world back to the state of the interpreted |
aoqi@0 | 669 | // call and not bother building another interpreter arg area. We don't |
aoqi@0 | 670 | // do that at this point. |
aoqi@0 | 671 | |
aoqi@0 | 672 | patch_callers_callsite(); |
aoqi@0 | 673 | |
aoqi@0 | 674 | __ bind(L_skip_fixup); |
aoqi@0 | 675 | |
aoqi@0 | 676 | // Since all args are passed on the stack, total_args_passed*wordSize is the |
aoqi@0 | 677 | // space we need. Add in varargs area needed by the interpreter. Round up |
aoqi@0 | 678 | // to stack alignment. |
aoqi@0 | 679 | const int arg_size = total_args_passed * Interpreter::stackElementSize; |
aoqi@0 | 680 | const int varargs_area = |
aoqi@0 | 681 | (frame::varargs_offset - frame::register_save_words)*wordSize; |
aoqi@0 | 682 | const int extraspace = round_to(arg_size + varargs_area, 2*wordSize); |
aoqi@0 | 683 | |
aoqi@0 | 684 | const int bias = STACK_BIAS; |
aoqi@0 | 685 | const int interp_arg_offset = frame::varargs_offset*wordSize + |
aoqi@0 | 686 | (total_args_passed-1)*Interpreter::stackElementSize; |
aoqi@0 | 687 | |
aoqi@0 | 688 | const Register base = SP; |
aoqi@0 | 689 | |
aoqi@0 | 690 | // Make some extra space on the stack. |
aoqi@0 | 691 | __ sub(SP, __ ensure_simm13_or_reg(extraspace, G3_scratch), SP); |
aoqi@0 | 692 | set_Rdisp(G3_scratch); |
aoqi@0 | 693 | |
aoqi@0 | 694 | // Write the args into the outgoing interpreter space. |
aoqi@0 | 695 | for (int i = 0; i < total_args_passed; i++) { |
aoqi@0 | 696 | const int st_off = interp_arg_offset - (i*Interpreter::stackElementSize) + bias; |
aoqi@0 | 697 | VMReg r_1 = regs[i].first(); |
aoqi@0 | 698 | VMReg r_2 = regs[i].second(); |
aoqi@0 | 699 | if (!r_1->is_valid()) { |
aoqi@0 | 700 | assert(!r_2->is_valid(), ""); |
aoqi@0 | 701 | continue; |
aoqi@0 | 702 | } |
aoqi@0 | 703 | if (r_1->is_stack()) { // Pretend stack targets are loaded into G1 |
aoqi@0 | 704 | RegisterOrConstant ld_off = reg2offset(r_1) + extraspace + bias; |
aoqi@0 | 705 | ld_off = __ ensure_simm13_or_reg(ld_off, Rdisp); |
aoqi@0 | 706 | r_1 = G1_scratch->as_VMReg();// as part of the load/store shuffle |
aoqi@0 | 707 | if (!r_2->is_valid()) __ ld (base, ld_off, G1_scratch); |
aoqi@0 | 708 | else __ ldx(base, ld_off, G1_scratch); |
aoqi@0 | 709 | } |
aoqi@0 | 710 | |
aoqi@0 | 711 | if (r_1->is_Register()) { |
aoqi@0 | 712 | Register r = r_1->as_Register()->after_restore(); |
aoqi@0 | 713 | if (sig_bt[i] == T_OBJECT || sig_bt[i] == T_ARRAY) { |
aoqi@0 | 714 | store_c2i_object(r, base, st_off); |
aoqi@0 | 715 | } else if (sig_bt[i] == T_LONG || sig_bt[i] == T_DOUBLE) { |
aoqi@0 | 716 | store_c2i_long(r, base, st_off, r_2->is_stack()); |
aoqi@0 | 717 | } else { |
aoqi@0 | 718 | store_c2i_int(r, base, st_off); |
aoqi@0 | 719 | } |
aoqi@0 | 720 | } else { |
aoqi@0 | 721 | assert(r_1->is_FloatRegister(), ""); |
aoqi@0 | 722 | if (sig_bt[i] == T_FLOAT) { |
aoqi@0 | 723 | store_c2i_float(r_1->as_FloatRegister(), base, st_off); |
aoqi@0 | 724 | } else { |
aoqi@0 | 725 | assert(sig_bt[i] == T_DOUBLE, "wrong type"); |
aoqi@0 | 726 | store_c2i_double(r_2, r_1, base, st_off); |
aoqi@0 | 727 | } |
aoqi@0 | 728 | } |
aoqi@0 | 729 | } |
aoqi@0 | 730 | |
aoqi@0 | 731 | // Load the interpreter entry point. |
aoqi@0 | 732 | __ ld_ptr(G5_method, in_bytes(Method::interpreter_entry_offset()), G3_scratch); |
aoqi@0 | 733 | |
aoqi@0 | 734 | // Pass O5_savedSP as an argument to the interpreter. |
aoqi@0 | 735 | // The interpreter will restore SP to this value before returning. |
aoqi@0 | 736 | __ add(SP, __ ensure_simm13_or_reg(extraspace, G1), O5_savedSP); |
aoqi@0 | 737 | |
aoqi@0 | 738 | __ mov((frame::varargs_offset)*wordSize - |
aoqi@0 | 739 | 1*Interpreter::stackElementSize+bias+BytesPerWord, G1); |
aoqi@0 | 740 | // Jump to the interpreter just as if interpreter was doing it. |
aoqi@0 | 741 | __ jmpl(G3_scratch, 0, G0); |
aoqi@0 | 742 | // Setup Lesp for the call. Cannot actually set Lesp as the current Lesp |
aoqi@0 | 743 | // (really L0) is in use by the compiled frame as a generic temp. However, |
aoqi@0 | 744 | // the interpreter does not know where its args are without some kind of |
aoqi@0 | 745 | // arg pointer being passed in. Pass it in Gargs. |
aoqi@0 | 746 | __ delayed()->add(SP, G1, Gargs); |
aoqi@0 | 747 | } |
aoqi@0 | 748 | |
aoqi@0 | 749 | static void range_check(MacroAssembler* masm, Register pc_reg, Register temp_reg, Register temp2_reg, |
aoqi@0 | 750 | address code_start, address code_end, |
aoqi@0 | 751 | Label& L_ok) { |
aoqi@0 | 752 | Label L_fail; |
aoqi@0 | 753 | __ set(ExternalAddress(code_start), temp_reg); |
aoqi@0 | 754 | __ set(pointer_delta(code_end, code_start, 1), temp2_reg); |
aoqi@0 | 755 | __ cmp(pc_reg, temp_reg); |
aoqi@0 | 756 | __ brx(Assembler::lessEqualUnsigned, false, Assembler::pn, L_fail); |
aoqi@0 | 757 | __ delayed()->add(temp_reg, temp2_reg, temp_reg); |
aoqi@0 | 758 | __ cmp(pc_reg, temp_reg); |
aoqi@0 | 759 | __ cmp_and_brx_short(pc_reg, temp_reg, Assembler::lessUnsigned, Assembler::pt, L_ok); |
aoqi@0 | 760 | __ bind(L_fail); |
aoqi@0 | 761 | } |
aoqi@0 | 762 | |
aoqi@0 | 763 | void AdapterGenerator::gen_i2c_adapter( |
aoqi@0 | 764 | int total_args_passed, |
aoqi@0 | 765 | // VMReg max_arg, |
aoqi@0 | 766 | int comp_args_on_stack, // VMRegStackSlots |
aoqi@0 | 767 | const BasicType *sig_bt, |
aoqi@0 | 768 | const VMRegPair *regs) { |
aoqi@0 | 769 | |
aoqi@0 | 770 | // Generate an I2C adapter: adjust the I-frame to make space for the C-frame |
aoqi@0 | 771 | // layout. Lesp was saved by the calling I-frame and will be restored on |
aoqi@0 | 772 | // return. Meanwhile, outgoing arg space is all owned by the callee |
aoqi@0 | 773 | // C-frame, so we can mangle it at will. After adjusting the frame size, |
aoqi@0 | 774 | // hoist register arguments and repack other args according to the compiled |
aoqi@0 | 775 | // code convention. Finally, end in a jump to the compiled code. The entry |
aoqi@0 | 776 | // point address is the start of the buffer. |
aoqi@0 | 777 | |
aoqi@0 | 778 | // We will only enter here from an interpreted frame and never from after |
aoqi@0 | 779 | // passing thru a c2i. Azul allowed this but we do not. If we lose the |
aoqi@0 | 780 | // race and use a c2i we will remain interpreted for the race loser(s). |
aoqi@0 | 781 | // This removes all sorts of headaches on the x86 side and also eliminates |
aoqi@0 | 782 | // the possibility of having c2i -> i2c -> c2i -> ... endless transitions. |
aoqi@0 | 783 | |
aoqi@0 | 784 | // More detail: |
aoqi@0 | 785 | // Adapters can be frameless because they do not require the caller |
aoqi@0 | 786 | // to perform additional cleanup work, such as correcting the stack pointer. |
aoqi@0 | 787 | // An i2c adapter is frameless because the *caller* frame, which is interpreted, |
aoqi@0 | 788 | // routinely repairs its own stack pointer (from interpreter_frame_last_sp), |
aoqi@0 | 789 | // even if a callee has modified the stack pointer. |
aoqi@0 | 790 | // A c2i adapter is frameless because the *callee* frame, which is interpreted, |
aoqi@0 | 791 | // routinely repairs its caller's stack pointer (from sender_sp, which is set |
aoqi@0 | 792 | // up via the senderSP register). |
aoqi@0 | 793 | // In other words, if *either* the caller or callee is interpreted, we can |
aoqi@0 | 794 | // get the stack pointer repaired after a call. |
aoqi@0 | 795 | // This is why c2i and i2c adapters cannot be indefinitely composed. |
aoqi@0 | 796 | // In particular, if a c2i adapter were to somehow call an i2c adapter, |
aoqi@0 | 797 | // both caller and callee would be compiled methods, and neither would |
aoqi@0 | 798 | // clean up the stack pointer changes performed by the two adapters. |
aoqi@0 | 799 | // If this happens, control eventually transfers back to the compiled |
aoqi@0 | 800 | // caller, but with an uncorrected stack, causing delayed havoc. |
aoqi@0 | 801 | |
aoqi@0 | 802 | if (VerifyAdapterCalls && |
aoqi@0 | 803 | (Interpreter::code() != NULL || StubRoutines::code1() != NULL)) { |
aoqi@0 | 804 | // So, let's test for cascading c2i/i2c adapters right now. |
aoqi@0 | 805 | // assert(Interpreter::contains($return_addr) || |
aoqi@0 | 806 | // StubRoutines::contains($return_addr), |
aoqi@0 | 807 | // "i2c adapter must return to an interpreter frame"); |
aoqi@0 | 808 | __ block_comment("verify_i2c { "); |
aoqi@0 | 809 | Label L_ok; |
aoqi@0 | 810 | if (Interpreter::code() != NULL) |
aoqi@0 | 811 | range_check(masm, O7, O0, O1, |
aoqi@0 | 812 | Interpreter::code()->code_start(), Interpreter::code()->code_end(), |
aoqi@0 | 813 | L_ok); |
aoqi@0 | 814 | if (StubRoutines::code1() != NULL) |
aoqi@0 | 815 | range_check(masm, O7, O0, O1, |
aoqi@0 | 816 | StubRoutines::code1()->code_begin(), StubRoutines::code1()->code_end(), |
aoqi@0 | 817 | L_ok); |
aoqi@0 | 818 | if (StubRoutines::code2() != NULL) |
aoqi@0 | 819 | range_check(masm, O7, O0, O1, |
aoqi@0 | 820 | StubRoutines::code2()->code_begin(), StubRoutines::code2()->code_end(), |
aoqi@0 | 821 | L_ok); |
aoqi@0 | 822 | const char* msg = "i2c adapter must return to an interpreter frame"; |
aoqi@0 | 823 | __ block_comment(msg); |
aoqi@0 | 824 | __ stop(msg); |
aoqi@0 | 825 | __ bind(L_ok); |
aoqi@0 | 826 | __ block_comment("} verify_i2ce "); |
aoqi@0 | 827 | } |
aoqi@0 | 828 | |
aoqi@0 | 829 | // As you can see from the list of inputs & outputs there are not a lot |
aoqi@0 | 830 | // of temp registers to work with: mostly G1, G3 & G4. |
aoqi@0 | 831 | |
aoqi@0 | 832 | // Inputs: |
aoqi@0 | 833 | // G2_thread - TLS |
aoqi@0 | 834 | // G5_method - Method oop |
aoqi@0 | 835 | // G4 (Gargs) - Pointer to interpreter's args |
aoqi@0 | 836 | // O0..O4 - free for scratch |
aoqi@0 | 837 | // O5_savedSP - Caller's saved SP, to be restored if needed |
aoqi@0 | 838 | // O6 - Current SP! |
aoqi@0 | 839 | // O7 - Valid return address |
aoqi@0 | 840 | // L0-L7, I0-I7 - Caller's temps (no frame pushed yet) |
aoqi@0 | 841 | |
aoqi@0 | 842 | // Outputs: |
aoqi@0 | 843 | // G2_thread - TLS |
aoqi@0 | 844 | // O0-O5 - Outgoing args in compiled layout |
aoqi@0 | 845 | // O6 - Adjusted or restored SP |
aoqi@0 | 846 | // O7 - Valid return address |
aoqi@0 | 847 | // L0-L7, I0-I7 - Caller's temps (no frame pushed yet) |
aoqi@0 | 848 | // F0-F7 - more outgoing args |
aoqi@0 | 849 | |
aoqi@0 | 850 | |
aoqi@0 | 851 | // Gargs is the incoming argument base, and also an outgoing argument. |
aoqi@0 | 852 | __ sub(Gargs, BytesPerWord, Gargs); |
aoqi@0 | 853 | |
aoqi@0 | 854 | // ON ENTRY TO THE CODE WE ARE MAKING, WE HAVE AN INTERPRETED FRAME |
aoqi@0 | 855 | // WITH O7 HOLDING A VALID RETURN PC |
aoqi@0 | 856 | // |
aoqi@0 | 857 | // | | |
aoqi@0 | 858 | // : java stack : |
aoqi@0 | 859 | // | | |
aoqi@0 | 860 | // +--------------+ <--- start of outgoing args |
aoqi@0 | 861 | // | receiver | | |
aoqi@0 | 862 | // : rest of args : |---size is java-arg-words |
aoqi@0 | 863 | // | | | |
aoqi@0 | 864 | // +--------------+ <--- O4_args (misaligned) and Lesp if prior is not C2I |
aoqi@0 | 865 | // | | | |
aoqi@0 | 866 | // : unused : |---Space for max Java stack, plus stack alignment |
aoqi@0 | 867 | // | | | |
aoqi@0 | 868 | // +--------------+ <--- SP + 16*wordsize |
aoqi@0 | 869 | // | | |
aoqi@0 | 870 | // : window : |
aoqi@0 | 871 | // | | |
aoqi@0 | 872 | // +--------------+ <--- SP |
aoqi@0 | 873 | |
aoqi@0 | 874 | // WE REPACK THE STACK. We use the common calling convention layout as |
aoqi@0 | 875 | // discovered by calling SharedRuntime::calling_convention. We assume it |
aoqi@0 | 876 | // causes an arbitrary shuffle of memory, which may require some register |
aoqi@0 | 877 | // temps to do the shuffle. We hope for (and optimize for) the case where |
aoqi@0 | 878 | // temps are not needed. We may have to resize the stack slightly, in case |
aoqi@0 | 879 | // we need alignment padding (32-bit interpreter can pass longs & doubles |
aoqi@0 | 880 | // misaligned, but the compilers expect them aligned). |
aoqi@0 | 881 | // |
aoqi@0 | 882 | // | | |
aoqi@0 | 883 | // : java stack : |
aoqi@0 | 884 | // | | |
aoqi@0 | 885 | // +--------------+ <--- start of outgoing args |
aoqi@0 | 886 | // | pad, align | | |
aoqi@0 | 887 | // +--------------+ | |
aoqi@0 | 888 | // | ints, longs, | | |
aoqi@0 | 889 | // | floats, | |---Outgoing stack args. |
aoqi@0 | 890 | // : doubles : | First few args in registers. |
aoqi@0 | 891 | // | | | |
aoqi@0 | 892 | // +--------------+ <--- SP' + 16*wordsize |
aoqi@0 | 893 | // | | |
aoqi@0 | 894 | // : window : |
aoqi@0 | 895 | // | | |
aoqi@0 | 896 | // +--------------+ <--- SP' |
aoqi@0 | 897 | |
aoqi@0 | 898 | // ON EXIT FROM THE CODE WE ARE MAKING, WE STILL HAVE AN INTERPRETED FRAME |
aoqi@0 | 899 | // WITH O7 HOLDING A VALID RETURN PC - ITS JUST THAT THE ARGS ARE NOW SETUP |
aoqi@0 | 900 | // FOR COMPILED CODE AND THE FRAME SLIGHTLY GROWN. |
aoqi@0 | 901 | |
aoqi@0 | 902 | // Cut-out for having no stack args. Since up to 6 args are passed |
aoqi@0 | 903 | // in registers, we will commonly have no stack args. |
aoqi@0 | 904 | if (comp_args_on_stack > 0) { |
aoqi@0 | 905 | // Convert VMReg stack slots to words. |
aoqi@0 | 906 | int comp_words_on_stack = round_to(comp_args_on_stack*VMRegImpl::stack_slot_size, wordSize)>>LogBytesPerWord; |
aoqi@0 | 907 | // Round up to miminum stack alignment, in wordSize |
aoqi@0 | 908 | comp_words_on_stack = round_to(comp_words_on_stack, 2); |
aoqi@0 | 909 | // Now compute the distance from Lesp to SP. This calculation does not |
aoqi@0 | 910 | // include the space for total_args_passed because Lesp has not yet popped |
aoqi@0 | 911 | // the arguments. |
aoqi@0 | 912 | __ sub(SP, (comp_words_on_stack)*wordSize, SP); |
aoqi@0 | 913 | } |
aoqi@0 | 914 | |
aoqi@0 | 915 | // Now generate the shuffle code. Pick up all register args and move the |
aoqi@0 | 916 | // rest through G1_scratch. |
aoqi@0 | 917 | for (int i = 0; i < total_args_passed; i++) { |
aoqi@0 | 918 | if (sig_bt[i] == T_VOID) { |
aoqi@0 | 919 | // Longs and doubles are passed in native word order, but misaligned |
aoqi@0 | 920 | // in the 32-bit build. |
aoqi@0 | 921 | assert(i > 0 && (sig_bt[i-1] == T_LONG || sig_bt[i-1] == T_DOUBLE), "missing half"); |
aoqi@0 | 922 | continue; |
aoqi@0 | 923 | } |
aoqi@0 | 924 | |
aoqi@0 | 925 | // Pick up 0, 1 or 2 words from Lesp+offset. Assume mis-aligned in the |
aoqi@0 | 926 | // 32-bit build and aligned in the 64-bit build. Look for the obvious |
aoqi@0 | 927 | // ldx/lddf optimizations. |
aoqi@0 | 928 | |
aoqi@0 | 929 | // Load in argument order going down. |
aoqi@0 | 930 | const int ld_off = (total_args_passed-i)*Interpreter::stackElementSize; |
aoqi@0 | 931 | set_Rdisp(G1_scratch); |
aoqi@0 | 932 | |
aoqi@0 | 933 | VMReg r_1 = regs[i].first(); |
aoqi@0 | 934 | VMReg r_2 = regs[i].second(); |
aoqi@0 | 935 | if (!r_1->is_valid()) { |
aoqi@0 | 936 | assert(!r_2->is_valid(), ""); |
aoqi@0 | 937 | continue; |
aoqi@0 | 938 | } |
aoqi@0 | 939 | if (r_1->is_stack()) { // Pretend stack targets are loaded into F8/F9 |
aoqi@0 | 940 | r_1 = F8->as_VMReg(); // as part of the load/store shuffle |
aoqi@0 | 941 | if (r_2->is_valid()) r_2 = r_1->next(); |
aoqi@0 | 942 | } |
aoqi@0 | 943 | if (r_1->is_Register()) { // Register argument |
aoqi@0 | 944 | Register r = r_1->as_Register()->after_restore(); |
aoqi@0 | 945 | if (!r_2->is_valid()) { |
aoqi@0 | 946 | __ ld(Gargs, arg_slot(ld_off), r); |
aoqi@0 | 947 | } else { |
aoqi@0 | 948 | #ifdef _LP64 |
aoqi@0 | 949 | // In V9, longs are given 2 64-bit slots in the interpreter, but the |
aoqi@0 | 950 | // data is passed in only 1 slot. |
aoqi@0 | 951 | RegisterOrConstant slot = (sig_bt[i] == T_LONG) ? |
aoqi@0 | 952 | next_arg_slot(ld_off) : arg_slot(ld_off); |
aoqi@0 | 953 | __ ldx(Gargs, slot, r); |
aoqi@0 | 954 | #else |
aoqi@0 | 955 | fatal("longs should be on stack"); |
aoqi@0 | 956 | #endif |
aoqi@0 | 957 | } |
aoqi@0 | 958 | } else { |
aoqi@0 | 959 | assert(r_1->is_FloatRegister(), ""); |
aoqi@0 | 960 | if (!r_2->is_valid()) { |
aoqi@0 | 961 | __ ldf(FloatRegisterImpl::S, Gargs, arg_slot(ld_off), r_1->as_FloatRegister()); |
aoqi@0 | 962 | } else { |
aoqi@0 | 963 | #ifdef _LP64 |
aoqi@0 | 964 | // In V9, doubles are given 2 64-bit slots in the interpreter, but the |
aoqi@0 | 965 | // data is passed in only 1 slot. This code also handles longs that |
aoqi@0 | 966 | // are passed on the stack, but need a stack-to-stack move through a |
aoqi@0 | 967 | // spare float register. |
aoqi@0 | 968 | RegisterOrConstant slot = (sig_bt[i] == T_LONG || sig_bt[i] == T_DOUBLE) ? |
aoqi@0 | 969 | next_arg_slot(ld_off) : arg_slot(ld_off); |
aoqi@0 | 970 | __ ldf(FloatRegisterImpl::D, Gargs, slot, r_1->as_FloatRegister()); |
aoqi@0 | 971 | #else |
aoqi@0 | 972 | // Need to marshal 64-bit value from misaligned Lesp loads |
aoqi@0 | 973 | __ ldf(FloatRegisterImpl::S, Gargs, next_arg_slot(ld_off), r_1->as_FloatRegister()); |
aoqi@0 | 974 | __ ldf(FloatRegisterImpl::S, Gargs, arg_slot(ld_off), r_2->as_FloatRegister()); |
aoqi@0 | 975 | #endif |
aoqi@0 | 976 | } |
aoqi@0 | 977 | } |
aoqi@0 | 978 | // Was the argument really intended to be on the stack, but was loaded |
aoqi@0 | 979 | // into F8/F9? |
aoqi@0 | 980 | if (regs[i].first()->is_stack()) { |
aoqi@0 | 981 | assert(r_1->as_FloatRegister() == F8, "fix this code"); |
aoqi@0 | 982 | // Convert stack slot to an SP offset |
aoqi@0 | 983 | int st_off = reg2offset(regs[i].first()) + STACK_BIAS; |
aoqi@0 | 984 | // Store down the shuffled stack word. Target address _is_ aligned. |
aoqi@0 | 985 | RegisterOrConstant slot = __ ensure_simm13_or_reg(st_off, Rdisp); |
aoqi@0 | 986 | if (!r_2->is_valid()) __ stf(FloatRegisterImpl::S, r_1->as_FloatRegister(), SP, slot); |
aoqi@0 | 987 | else __ stf(FloatRegisterImpl::D, r_1->as_FloatRegister(), SP, slot); |
aoqi@0 | 988 | } |
aoqi@0 | 989 | } |
aoqi@0 | 990 | |
aoqi@0 | 991 | // Jump to the compiled code just as if compiled code was doing it. |
aoqi@0 | 992 | __ ld_ptr(G5_method, in_bytes(Method::from_compiled_offset()), G3); |
aoqi@0 | 993 | |
aoqi@0 | 994 | // 6243940 We might end up in handle_wrong_method if |
aoqi@0 | 995 | // the callee is deoptimized as we race thru here. If that |
aoqi@0 | 996 | // happens we don't want to take a safepoint because the |
aoqi@0 | 997 | // caller frame will look interpreted and arguments are now |
aoqi@0 | 998 | // "compiled" so it is much better to make this transition |
aoqi@0 | 999 | // invisible to the stack walking code. Unfortunately if |
aoqi@0 | 1000 | // we try and find the callee by normal means a safepoint |
aoqi@0 | 1001 | // is possible. So we stash the desired callee in the thread |
aoqi@0 | 1002 | // and the vm will find there should this case occur. |
aoqi@0 | 1003 | Address callee_target_addr(G2_thread, JavaThread::callee_target_offset()); |
aoqi@0 | 1004 | __ st_ptr(G5_method, callee_target_addr); |
aoqi@0 | 1005 | __ jmpl(G3, 0, G0); |
aoqi@0 | 1006 | __ delayed()->nop(); |
aoqi@0 | 1007 | } |
aoqi@0 | 1008 | |
aoqi@0 | 1009 | // --------------------------------------------------------------- |
aoqi@0 | 1010 | AdapterHandlerEntry* SharedRuntime::generate_i2c2i_adapters(MacroAssembler *masm, |
aoqi@0 | 1011 | int total_args_passed, |
aoqi@0 | 1012 | // VMReg max_arg, |
aoqi@0 | 1013 | int comp_args_on_stack, // VMRegStackSlots |
aoqi@0 | 1014 | const BasicType *sig_bt, |
aoqi@0 | 1015 | const VMRegPair *regs, |
aoqi@0 | 1016 | AdapterFingerPrint* fingerprint) { |
aoqi@0 | 1017 | address i2c_entry = __ pc(); |
aoqi@0 | 1018 | |
aoqi@0 | 1019 | AdapterGenerator agen(masm); |
aoqi@0 | 1020 | |
aoqi@0 | 1021 | agen.gen_i2c_adapter(total_args_passed, comp_args_on_stack, sig_bt, regs); |
aoqi@0 | 1022 | |
aoqi@0 | 1023 | |
aoqi@0 | 1024 | // ------------------------------------------------------------------------- |
aoqi@0 | 1025 | // Generate a C2I adapter. On entry we know G5 holds the Method*. The |
aoqi@0 | 1026 | // args start out packed in the compiled layout. They need to be unpacked |
aoqi@0 | 1027 | // into the interpreter layout. This will almost always require some stack |
aoqi@0 | 1028 | // space. We grow the current (compiled) stack, then repack the args. We |
aoqi@0 | 1029 | // finally end in a jump to the generic interpreter entry point. On exit |
aoqi@0 | 1030 | // from the interpreter, the interpreter will restore our SP (lest the |
aoqi@0 | 1031 | // compiled code, which relys solely on SP and not FP, get sick). |
aoqi@0 | 1032 | |
aoqi@0 | 1033 | address c2i_unverified_entry = __ pc(); |
aoqi@0 | 1034 | Label L_skip_fixup; |
aoqi@0 | 1035 | { |
aoqi@0 | 1036 | Register R_temp = G1; // another scratch register |
aoqi@0 | 1037 | |
aoqi@0 | 1038 | AddressLiteral ic_miss(SharedRuntime::get_ic_miss_stub()); |
aoqi@0 | 1039 | |
aoqi@0 | 1040 | __ verify_oop(O0); |
aoqi@0 | 1041 | __ load_klass(O0, G3_scratch); |
aoqi@0 | 1042 | |
aoqi@0 | 1043 | __ ld_ptr(G5_method, CompiledICHolder::holder_klass_offset(), R_temp); |
aoqi@0 | 1044 | __ cmp(G3_scratch, R_temp); |
aoqi@0 | 1045 | |
aoqi@0 | 1046 | Label ok, ok2; |
aoqi@0 | 1047 | __ brx(Assembler::equal, false, Assembler::pt, ok); |
aoqi@0 | 1048 | __ delayed()->ld_ptr(G5_method, CompiledICHolder::holder_method_offset(), G5_method); |
aoqi@0 | 1049 | __ jump_to(ic_miss, G3_scratch); |
aoqi@0 | 1050 | __ delayed()->nop(); |
aoqi@0 | 1051 | |
aoqi@0 | 1052 | __ bind(ok); |
aoqi@0 | 1053 | // Method might have been compiled since the call site was patched to |
aoqi@0 | 1054 | // interpreted if that is the case treat it as a miss so we can get |
aoqi@0 | 1055 | // the call site corrected. |
aoqi@0 | 1056 | __ ld_ptr(G5_method, in_bytes(Method::code_offset()), G3_scratch); |
aoqi@0 | 1057 | __ bind(ok2); |
aoqi@0 | 1058 | __ br_null(G3_scratch, false, Assembler::pt, L_skip_fixup); |
aoqi@0 | 1059 | __ delayed()->nop(); |
aoqi@0 | 1060 | __ jump_to(ic_miss, G3_scratch); |
aoqi@0 | 1061 | __ delayed()->nop(); |
aoqi@0 | 1062 | |
aoqi@0 | 1063 | } |
aoqi@0 | 1064 | |
aoqi@0 | 1065 | address c2i_entry = __ pc(); |
aoqi@0 | 1066 | |
aoqi@0 | 1067 | agen.gen_c2i_adapter(total_args_passed, comp_args_on_stack, sig_bt, regs, L_skip_fixup); |
aoqi@0 | 1068 | |
aoqi@0 | 1069 | __ flush(); |
aoqi@0 | 1070 | return AdapterHandlerLibrary::new_entry(fingerprint, i2c_entry, c2i_entry, c2i_unverified_entry); |
aoqi@0 | 1071 | |
aoqi@0 | 1072 | } |
aoqi@0 | 1073 | |
aoqi@0 | 1074 | // Helper function for native calling conventions |
aoqi@0 | 1075 | static VMReg int_stk_helper( int i ) { |
aoqi@0 | 1076 | // Bias any stack based VMReg we get by ignoring the window area |
aoqi@0 | 1077 | // but not the register parameter save area. |
aoqi@0 | 1078 | // |
aoqi@0 | 1079 | // This is strange for the following reasons. We'd normally expect |
aoqi@0 | 1080 | // the calling convention to return an VMReg for a stack slot |
aoqi@0 | 1081 | // completely ignoring any abi reserved area. C2 thinks of that |
aoqi@0 | 1082 | // abi area as only out_preserve_stack_slots. This does not include |
aoqi@0 | 1083 | // the area allocated by the C abi to store down integer arguments |
aoqi@0 | 1084 | // because the java calling convention does not use it. So |
aoqi@0 | 1085 | // since c2 assumes that there are only out_preserve_stack_slots |
aoqi@0 | 1086 | // to bias the optoregs (which impacts VMRegs) when actually referencing any actual stack |
aoqi@0 | 1087 | // location the c calling convention must add in this bias amount |
aoqi@0 | 1088 | // to make up for the fact that the out_preserve_stack_slots is |
aoqi@0 | 1089 | // insufficient for C calls. What a mess. I sure hope those 6 |
aoqi@0 | 1090 | // stack words were worth it on every java call! |
aoqi@0 | 1091 | |
aoqi@0 | 1092 | // Another way of cleaning this up would be for out_preserve_stack_slots |
aoqi@0 | 1093 | // to take a parameter to say whether it was C or java calling conventions. |
aoqi@0 | 1094 | // Then things might look a little better (but not much). |
aoqi@0 | 1095 | |
aoqi@0 | 1096 | int mem_parm_offset = i - SPARC_ARGS_IN_REGS_NUM; |
aoqi@0 | 1097 | if( mem_parm_offset < 0 ) { |
aoqi@0 | 1098 | return as_oRegister(i)->as_VMReg(); |
aoqi@0 | 1099 | } else { |
aoqi@0 | 1100 | int actual_offset = (mem_parm_offset + frame::memory_parameter_word_sp_offset) * VMRegImpl::slots_per_word; |
aoqi@0 | 1101 | // Now return a biased offset that will be correct when out_preserve_slots is added back in |
aoqi@0 | 1102 | return VMRegImpl::stack2reg(actual_offset - SharedRuntime::out_preserve_stack_slots()); |
aoqi@0 | 1103 | } |
aoqi@0 | 1104 | } |
aoqi@0 | 1105 | |
aoqi@0 | 1106 | |
aoqi@0 | 1107 | int SharedRuntime::c_calling_convention(const BasicType *sig_bt, |
aoqi@0 | 1108 | VMRegPair *regs, |
aoqi@0 | 1109 | VMRegPair *regs2, |
aoqi@0 | 1110 | int total_args_passed) { |
aoqi@0 | 1111 | assert(regs2 == NULL, "not needed on sparc"); |
aoqi@0 | 1112 | |
aoqi@0 | 1113 | // Return the number of VMReg stack_slots needed for the args. |
aoqi@0 | 1114 | // This value does not include an abi space (like register window |
aoqi@0 | 1115 | // save area). |
aoqi@0 | 1116 | |
aoqi@0 | 1117 | // The native convention is V8 if !LP64 |
aoqi@0 | 1118 | // The LP64 convention is the V9 convention which is slightly more sane. |
aoqi@0 | 1119 | |
aoqi@0 | 1120 | // We return the amount of VMReg stack slots we need to reserve for all |
aoqi@0 | 1121 | // the arguments NOT counting out_preserve_stack_slots. Since we always |
aoqi@0 | 1122 | // have space for storing at least 6 registers to memory we start with that. |
aoqi@0 | 1123 | // See int_stk_helper for a further discussion. |
aoqi@0 | 1124 | int max_stack_slots = (frame::varargs_offset * VMRegImpl::slots_per_word) - SharedRuntime::out_preserve_stack_slots(); |
aoqi@0 | 1125 | |
aoqi@0 | 1126 | #ifdef _LP64 |
aoqi@0 | 1127 | // V9 convention: All things "as-if" on double-wide stack slots. |
aoqi@0 | 1128 | // Hoist any int/ptr/long's in the first 6 to int regs. |
aoqi@0 | 1129 | // Hoist any flt/dbl's in the first 16 dbl regs. |
aoqi@0 | 1130 | int j = 0; // Count of actual args, not HALVES |
morris@7210 | 1131 | VMRegPair param_array_reg; // location of the argument in the parameter array |
morris@7210 | 1132 | for (int i = 0; i < total_args_passed; i++, j++) { |
morris@7210 | 1133 | param_array_reg.set_bad(); |
morris@7210 | 1134 | switch (sig_bt[i]) { |
aoqi@0 | 1135 | case T_BOOLEAN: |
aoqi@0 | 1136 | case T_BYTE: |
aoqi@0 | 1137 | case T_CHAR: |
aoqi@0 | 1138 | case T_INT: |
aoqi@0 | 1139 | case T_SHORT: |
morris@7210 | 1140 | regs[i].set1(int_stk_helper(j)); |
morris@7210 | 1141 | break; |
aoqi@0 | 1142 | case T_LONG: |
morris@7210 | 1143 | assert(sig_bt[i+1] == T_VOID, "expecting half"); |
aoqi@0 | 1144 | case T_ADDRESS: // raw pointers, like current thread, for VM calls |
aoqi@0 | 1145 | case T_ARRAY: |
aoqi@0 | 1146 | case T_OBJECT: |
aoqi@0 | 1147 | case T_METADATA: |
morris@7210 | 1148 | regs[i].set2(int_stk_helper(j)); |
aoqi@0 | 1149 | break; |
aoqi@0 | 1150 | case T_FLOAT: |
morris@7210 | 1151 | // Per SPARC Compliance Definition 2.4.1, page 3P-12 available here |
morris@7210 | 1152 | // http://www.sparc.org/wp-content/uploads/2014/01/SCD.2.4.1.pdf.gz |
morris@7210 | 1153 | // |
morris@7210 | 1154 | // "When a callee prototype exists, and does not indicate variable arguments, |
morris@7210 | 1155 | // floating-point values assigned to locations %sp+BIAS+128 through %sp+BIAS+248 |
morris@7210 | 1156 | // will be promoted to floating-point registers" |
morris@7210 | 1157 | // |
morris@7210 | 1158 | // By "promoted" it means that the argument is located in two places, an unused |
morris@7210 | 1159 | // spill slot in the "parameter array" (starts at %sp+BIAS+128), and a live |
morris@7210 | 1160 | // float register. In most cases, there are 6 or fewer arguments of any type, |
morris@7210 | 1161 | // and the standard parameter array slots (%sp+BIAS+128 to %sp+BIAS+176 exclusive) |
morris@7210 | 1162 | // serve as shadow slots. Per the spec floating point registers %d6 to %d16 |
morris@7210 | 1163 | // require slots beyond that (up to %sp+BIAS+248). |
morris@7210 | 1164 | // |
morris@7210 | 1165 | { |
morris@7210 | 1166 | // V9ism: floats go in ODD registers and stack slots |
morris@7210 | 1167 | int float_index = 1 + (j << 1); |
morris@7210 | 1168 | param_array_reg.set1(VMRegImpl::stack2reg(float_index)); |
morris@7210 | 1169 | if (j < 16) { |
morris@7210 | 1170 | regs[i].set1(as_FloatRegister(float_index)->as_VMReg()); |
morris@7210 | 1171 | } else { |
morris@7210 | 1172 | regs[i] = param_array_reg; |
morris@7210 | 1173 | } |
aoqi@0 | 1174 | } |
aoqi@0 | 1175 | break; |
aoqi@0 | 1176 | case T_DOUBLE: |
morris@7210 | 1177 | { |
morris@7210 | 1178 | assert(sig_bt[i + 1] == T_VOID, "expecting half"); |
morris@7210 | 1179 | // V9ism: doubles go in EVEN/ODD regs and stack slots |
morris@7210 | 1180 | int double_index = (j << 1); |
morris@7210 | 1181 | param_array_reg.set2(VMRegImpl::stack2reg(double_index)); |
morris@7210 | 1182 | if (j < 16) { |
morris@7210 | 1183 | regs[i].set2(as_FloatRegister(double_index)->as_VMReg()); |
morris@7210 | 1184 | } else { |
morris@7210 | 1185 | // V9ism: doubles go in EVEN/ODD stack slots |
morris@7210 | 1186 | regs[i] = param_array_reg; |
morris@7210 | 1187 | } |
aoqi@0 | 1188 | } |
aoqi@0 | 1189 | break; |
morris@7210 | 1190 | case T_VOID: |
morris@7210 | 1191 | regs[i].set_bad(); |
morris@7210 | 1192 | j--; |
morris@7210 | 1193 | break; // Do not count HALVES |
aoqi@0 | 1194 | default: |
aoqi@0 | 1195 | ShouldNotReachHere(); |
aoqi@0 | 1196 | } |
morris@7210 | 1197 | // Keep track of the deepest parameter array slot. |
morris@7210 | 1198 | if (!param_array_reg.first()->is_valid()) { |
morris@7210 | 1199 | param_array_reg = regs[i]; |
morris@7210 | 1200 | } |
morris@7210 | 1201 | if (param_array_reg.first()->is_stack()) { |
morris@7210 | 1202 | int off = param_array_reg.first()->reg2stack(); |
aoqi@0 | 1203 | if (off > max_stack_slots) max_stack_slots = off; |
aoqi@0 | 1204 | } |
morris@7210 | 1205 | if (param_array_reg.second()->is_stack()) { |
morris@7210 | 1206 | int off = param_array_reg.second()->reg2stack(); |
aoqi@0 | 1207 | if (off > max_stack_slots) max_stack_slots = off; |
aoqi@0 | 1208 | } |
aoqi@0 | 1209 | } |
aoqi@0 | 1210 | |
aoqi@0 | 1211 | #else // _LP64 |
aoqi@0 | 1212 | // V8 convention: first 6 things in O-regs, rest on stack. |
aoqi@0 | 1213 | // Alignment is willy-nilly. |
morris@7210 | 1214 | for (int i = 0; i < total_args_passed; i++) { |
morris@7210 | 1215 | switch (sig_bt[i]) { |
aoqi@0 | 1216 | case T_ADDRESS: // raw pointers, like current thread, for VM calls |
aoqi@0 | 1217 | case T_ARRAY: |
aoqi@0 | 1218 | case T_BOOLEAN: |
aoqi@0 | 1219 | case T_BYTE: |
aoqi@0 | 1220 | case T_CHAR: |
aoqi@0 | 1221 | case T_FLOAT: |
aoqi@0 | 1222 | case T_INT: |
aoqi@0 | 1223 | case T_OBJECT: |
aoqi@0 | 1224 | case T_METADATA: |
aoqi@0 | 1225 | case T_SHORT: |
morris@7210 | 1226 | regs[i].set1(int_stk_helper(i)); |
aoqi@0 | 1227 | break; |
aoqi@0 | 1228 | case T_DOUBLE: |
aoqi@0 | 1229 | case T_LONG: |
morris@7210 | 1230 | assert(sig_bt[i + 1] == T_VOID, "expecting half"); |
morris@7210 | 1231 | regs[i].set_pair(int_stk_helper(i + 1), int_stk_helper(i)); |
aoqi@0 | 1232 | break; |
aoqi@0 | 1233 | case T_VOID: regs[i].set_bad(); break; |
aoqi@0 | 1234 | default: |
aoqi@0 | 1235 | ShouldNotReachHere(); |
aoqi@0 | 1236 | } |
aoqi@0 | 1237 | if (regs[i].first()->is_stack()) { |
morris@7210 | 1238 | int off = regs[i].first()->reg2stack(); |
aoqi@0 | 1239 | if (off > max_stack_slots) max_stack_slots = off; |
aoqi@0 | 1240 | } |
aoqi@0 | 1241 | if (regs[i].second()->is_stack()) { |
morris@7210 | 1242 | int off = regs[i].second()->reg2stack(); |
aoqi@0 | 1243 | if (off > max_stack_slots) max_stack_slots = off; |
aoqi@0 | 1244 | } |
aoqi@0 | 1245 | } |
aoqi@0 | 1246 | #endif // _LP64 |
aoqi@0 | 1247 | |
aoqi@0 | 1248 | return round_to(max_stack_slots + 1, 2); |
aoqi@0 | 1249 | |
aoqi@0 | 1250 | } |
aoqi@0 | 1251 | |
aoqi@0 | 1252 | |
aoqi@0 | 1253 | // --------------------------------------------------------------------------- |
aoqi@0 | 1254 | void SharedRuntime::save_native_result(MacroAssembler *masm, BasicType ret_type, int frame_slots) { |
aoqi@0 | 1255 | switch (ret_type) { |
aoqi@0 | 1256 | case T_FLOAT: |
aoqi@0 | 1257 | __ stf(FloatRegisterImpl::S, F0, SP, frame_slots*VMRegImpl::stack_slot_size - 4+STACK_BIAS); |
aoqi@0 | 1258 | break; |
aoqi@0 | 1259 | case T_DOUBLE: |
aoqi@0 | 1260 | __ stf(FloatRegisterImpl::D, F0, SP, frame_slots*VMRegImpl::stack_slot_size - 8+STACK_BIAS); |
aoqi@0 | 1261 | break; |
aoqi@0 | 1262 | } |
aoqi@0 | 1263 | } |
aoqi@0 | 1264 | |
aoqi@0 | 1265 | void SharedRuntime::restore_native_result(MacroAssembler *masm, BasicType ret_type, int frame_slots) { |
aoqi@0 | 1266 | switch (ret_type) { |
aoqi@0 | 1267 | case T_FLOAT: |
aoqi@0 | 1268 | __ ldf(FloatRegisterImpl::S, SP, frame_slots*VMRegImpl::stack_slot_size - 4+STACK_BIAS, F0); |
aoqi@0 | 1269 | break; |
aoqi@0 | 1270 | case T_DOUBLE: |
aoqi@0 | 1271 | __ ldf(FloatRegisterImpl::D, SP, frame_slots*VMRegImpl::stack_slot_size - 8+STACK_BIAS, F0); |
aoqi@0 | 1272 | break; |
aoqi@0 | 1273 | } |
aoqi@0 | 1274 | } |
aoqi@0 | 1275 | |
aoqi@0 | 1276 | // Check and forward and pending exception. Thread is stored in |
aoqi@0 | 1277 | // L7_thread_cache and possibly NOT in G2_thread. Since this is a native call, there |
aoqi@0 | 1278 | // is no exception handler. We merely pop this frame off and throw the |
aoqi@0 | 1279 | // exception in the caller's frame. |
aoqi@0 | 1280 | static void check_forward_pending_exception(MacroAssembler *masm, Register Rex_oop) { |
aoqi@0 | 1281 | Label L; |
aoqi@0 | 1282 | __ br_null(Rex_oop, false, Assembler::pt, L); |
aoqi@0 | 1283 | __ delayed()->mov(L7_thread_cache, G2_thread); // restore in case we have exception |
aoqi@0 | 1284 | // Since this is a native call, we *know* the proper exception handler |
aoqi@0 | 1285 | // without calling into the VM: it's the empty function. Just pop this |
aoqi@0 | 1286 | // frame and then jump to forward_exception_entry; O7 will contain the |
aoqi@0 | 1287 | // native caller's return PC. |
aoqi@0 | 1288 | AddressLiteral exception_entry(StubRoutines::forward_exception_entry()); |
aoqi@0 | 1289 | __ jump_to(exception_entry, G3_scratch); |
aoqi@0 | 1290 | __ delayed()->restore(); // Pop this frame off. |
aoqi@0 | 1291 | __ bind(L); |
aoqi@0 | 1292 | } |
aoqi@0 | 1293 | |
aoqi@0 | 1294 | // A simple move of integer like type |
aoqi@0 | 1295 | static void simple_move32(MacroAssembler* masm, VMRegPair src, VMRegPair dst) { |
aoqi@0 | 1296 | if (src.first()->is_stack()) { |
aoqi@0 | 1297 | if (dst.first()->is_stack()) { |
aoqi@0 | 1298 | // stack to stack |
aoqi@0 | 1299 | __ ld(FP, reg2offset(src.first()) + STACK_BIAS, L5); |
aoqi@0 | 1300 | __ st(L5, SP, reg2offset(dst.first()) + STACK_BIAS); |
aoqi@0 | 1301 | } else { |
aoqi@0 | 1302 | // stack to reg |
aoqi@0 | 1303 | __ ld(FP, reg2offset(src.first()) + STACK_BIAS, dst.first()->as_Register()); |
aoqi@0 | 1304 | } |
aoqi@0 | 1305 | } else if (dst.first()->is_stack()) { |
aoqi@0 | 1306 | // reg to stack |
aoqi@0 | 1307 | __ st(src.first()->as_Register(), SP, reg2offset(dst.first()) + STACK_BIAS); |
aoqi@0 | 1308 | } else { |
aoqi@0 | 1309 | __ mov(src.first()->as_Register(), dst.first()->as_Register()); |
aoqi@0 | 1310 | } |
aoqi@0 | 1311 | } |
aoqi@0 | 1312 | |
aoqi@0 | 1313 | // On 64 bit we will store integer like items to the stack as |
aoqi@0 | 1314 | // 64 bits items (sparc abi) even though java would only store |
aoqi@0 | 1315 | // 32bits for a parameter. On 32bit it will simply be 32 bits |
aoqi@0 | 1316 | // So this routine will do 32->32 on 32bit and 32->64 on 64bit |
aoqi@0 | 1317 | static void move32_64(MacroAssembler* masm, VMRegPair src, VMRegPair dst) { |
aoqi@0 | 1318 | if (src.first()->is_stack()) { |
aoqi@0 | 1319 | if (dst.first()->is_stack()) { |
aoqi@0 | 1320 | // stack to stack |
aoqi@0 | 1321 | __ ld(FP, reg2offset(src.first()) + STACK_BIAS, L5); |
aoqi@0 | 1322 | __ st_ptr(L5, SP, reg2offset(dst.first()) + STACK_BIAS); |
aoqi@0 | 1323 | } else { |
aoqi@0 | 1324 | // stack to reg |
aoqi@0 | 1325 | __ ld(FP, reg2offset(src.first()) + STACK_BIAS, dst.first()->as_Register()); |
aoqi@0 | 1326 | } |
aoqi@0 | 1327 | } else if (dst.first()->is_stack()) { |
aoqi@0 | 1328 | // reg to stack |
aoqi@0 | 1329 | __ st_ptr(src.first()->as_Register(), SP, reg2offset(dst.first()) + STACK_BIAS); |
aoqi@0 | 1330 | } else { |
aoqi@0 | 1331 | __ mov(src.first()->as_Register(), dst.first()->as_Register()); |
aoqi@0 | 1332 | } |
aoqi@0 | 1333 | } |
aoqi@0 | 1334 | |
aoqi@0 | 1335 | |
aoqi@0 | 1336 | static void move_ptr(MacroAssembler* masm, VMRegPair src, VMRegPair dst) { |
aoqi@0 | 1337 | if (src.first()->is_stack()) { |
aoqi@0 | 1338 | if (dst.first()->is_stack()) { |
aoqi@0 | 1339 | // stack to stack |
aoqi@0 | 1340 | __ ld_ptr(FP, reg2offset(src.first()) + STACK_BIAS, L5); |
aoqi@0 | 1341 | __ st_ptr(L5, SP, reg2offset(dst.first()) + STACK_BIAS); |
aoqi@0 | 1342 | } else { |
aoqi@0 | 1343 | // stack to reg |
aoqi@0 | 1344 | __ ld_ptr(FP, reg2offset(src.first()) + STACK_BIAS, dst.first()->as_Register()); |
aoqi@0 | 1345 | } |
aoqi@0 | 1346 | } else if (dst.first()->is_stack()) { |
aoqi@0 | 1347 | // reg to stack |
aoqi@0 | 1348 | __ st_ptr(src.first()->as_Register(), SP, reg2offset(dst.first()) + STACK_BIAS); |
aoqi@0 | 1349 | } else { |
aoqi@0 | 1350 | __ mov(src.first()->as_Register(), dst.first()->as_Register()); |
aoqi@0 | 1351 | } |
aoqi@0 | 1352 | } |
aoqi@0 | 1353 | |
aoqi@0 | 1354 | |
aoqi@0 | 1355 | // An oop arg. Must pass a handle not the oop itself |
aoqi@0 | 1356 | static void object_move(MacroAssembler* masm, |
aoqi@0 | 1357 | OopMap* map, |
aoqi@0 | 1358 | int oop_handle_offset, |
aoqi@0 | 1359 | int framesize_in_slots, |
aoqi@0 | 1360 | VMRegPair src, |
aoqi@0 | 1361 | VMRegPair dst, |
aoqi@0 | 1362 | bool is_receiver, |
aoqi@0 | 1363 | int* receiver_offset) { |
aoqi@0 | 1364 | |
aoqi@0 | 1365 | // must pass a handle. First figure out the location we use as a handle |
aoqi@0 | 1366 | |
aoqi@0 | 1367 | if (src.first()->is_stack()) { |
aoqi@0 | 1368 | // Oop is already on the stack |
aoqi@0 | 1369 | Register rHandle = dst.first()->is_stack() ? L5 : dst.first()->as_Register(); |
aoqi@0 | 1370 | __ add(FP, reg2offset(src.first()) + STACK_BIAS, rHandle); |
aoqi@0 | 1371 | __ ld_ptr(rHandle, 0, L4); |
aoqi@0 | 1372 | #ifdef _LP64 |
aoqi@0 | 1373 | __ movr( Assembler::rc_z, L4, G0, rHandle ); |
aoqi@0 | 1374 | #else |
aoqi@0 | 1375 | __ tst( L4 ); |
aoqi@0 | 1376 | __ movcc( Assembler::zero, false, Assembler::icc, G0, rHandle ); |
aoqi@0 | 1377 | #endif |
aoqi@0 | 1378 | if (dst.first()->is_stack()) { |
aoqi@0 | 1379 | __ st_ptr(rHandle, SP, reg2offset(dst.first()) + STACK_BIAS); |
aoqi@0 | 1380 | } |
aoqi@0 | 1381 | int offset_in_older_frame = src.first()->reg2stack() + SharedRuntime::out_preserve_stack_slots(); |
aoqi@0 | 1382 | if (is_receiver) { |
aoqi@0 | 1383 | *receiver_offset = (offset_in_older_frame + framesize_in_slots) * VMRegImpl::stack_slot_size; |
aoqi@0 | 1384 | } |
aoqi@0 | 1385 | map->set_oop(VMRegImpl::stack2reg(offset_in_older_frame + framesize_in_slots)); |
aoqi@0 | 1386 | } else { |
aoqi@0 | 1387 | // Oop is in an input register pass we must flush it to the stack |
aoqi@0 | 1388 | const Register rOop = src.first()->as_Register(); |
aoqi@0 | 1389 | const Register rHandle = L5; |
aoqi@0 | 1390 | int oop_slot = rOop->input_number() * VMRegImpl::slots_per_word + oop_handle_offset; |
morris@7210 | 1391 | int offset = oop_slot * VMRegImpl::stack_slot_size; |
aoqi@0 | 1392 | __ st_ptr(rOop, SP, offset + STACK_BIAS); |
aoqi@0 | 1393 | if (is_receiver) { |
morris@7210 | 1394 | *receiver_offset = offset; |
aoqi@0 | 1395 | } |
aoqi@0 | 1396 | map->set_oop(VMRegImpl::stack2reg(oop_slot)); |
aoqi@0 | 1397 | __ add(SP, offset + STACK_BIAS, rHandle); |
aoqi@0 | 1398 | #ifdef _LP64 |
aoqi@0 | 1399 | __ movr( Assembler::rc_z, rOop, G0, rHandle ); |
aoqi@0 | 1400 | #else |
aoqi@0 | 1401 | __ tst( rOop ); |
aoqi@0 | 1402 | __ movcc( Assembler::zero, false, Assembler::icc, G0, rHandle ); |
aoqi@0 | 1403 | #endif |
aoqi@0 | 1404 | |
aoqi@0 | 1405 | if (dst.first()->is_stack()) { |
aoqi@0 | 1406 | __ st_ptr(rHandle, SP, reg2offset(dst.first()) + STACK_BIAS); |
aoqi@0 | 1407 | } else { |
aoqi@0 | 1408 | __ mov(rHandle, dst.first()->as_Register()); |
aoqi@0 | 1409 | } |
aoqi@0 | 1410 | } |
aoqi@0 | 1411 | } |
aoqi@0 | 1412 | |
aoqi@0 | 1413 | // A float arg may have to do float reg int reg conversion |
aoqi@0 | 1414 | static void float_move(MacroAssembler* masm, VMRegPair src, VMRegPair dst) { |
aoqi@0 | 1415 | assert(!src.second()->is_valid() && !dst.second()->is_valid(), "bad float_move"); |
aoqi@0 | 1416 | |
aoqi@0 | 1417 | if (src.first()->is_stack()) { |
aoqi@0 | 1418 | if (dst.first()->is_stack()) { |
aoqi@0 | 1419 | // stack to stack the easiest of the bunch |
aoqi@0 | 1420 | __ ld(FP, reg2offset(src.first()) + STACK_BIAS, L5); |
aoqi@0 | 1421 | __ st(L5, SP, reg2offset(dst.first()) + STACK_BIAS); |
aoqi@0 | 1422 | } else { |
aoqi@0 | 1423 | // stack to reg |
aoqi@0 | 1424 | if (dst.first()->is_Register()) { |
aoqi@0 | 1425 | __ ld(FP, reg2offset(src.first()) + STACK_BIAS, dst.first()->as_Register()); |
aoqi@0 | 1426 | } else { |
aoqi@0 | 1427 | __ ldf(FloatRegisterImpl::S, FP, reg2offset(src.first()) + STACK_BIAS, dst.first()->as_FloatRegister()); |
aoqi@0 | 1428 | } |
aoqi@0 | 1429 | } |
aoqi@0 | 1430 | } else if (dst.first()->is_stack()) { |
aoqi@0 | 1431 | // reg to stack |
aoqi@0 | 1432 | if (src.first()->is_Register()) { |
aoqi@0 | 1433 | __ st(src.first()->as_Register(), SP, reg2offset(dst.first()) + STACK_BIAS); |
aoqi@0 | 1434 | } else { |
aoqi@0 | 1435 | __ stf(FloatRegisterImpl::S, src.first()->as_FloatRegister(), SP, reg2offset(dst.first()) + STACK_BIAS); |
aoqi@0 | 1436 | } |
aoqi@0 | 1437 | } else { |
aoqi@0 | 1438 | // reg to reg |
aoqi@0 | 1439 | if (src.first()->is_Register()) { |
aoqi@0 | 1440 | if (dst.first()->is_Register()) { |
aoqi@0 | 1441 | // gpr -> gpr |
aoqi@0 | 1442 | __ mov(src.first()->as_Register(), dst.first()->as_Register()); |
aoqi@0 | 1443 | } else { |
aoqi@0 | 1444 | // gpr -> fpr |
aoqi@0 | 1445 | __ st(src.first()->as_Register(), FP, -4 + STACK_BIAS); |
aoqi@0 | 1446 | __ ldf(FloatRegisterImpl::S, FP, -4 + STACK_BIAS, dst.first()->as_FloatRegister()); |
aoqi@0 | 1447 | } |
aoqi@0 | 1448 | } else if (dst.first()->is_Register()) { |
aoqi@0 | 1449 | // fpr -> gpr |
aoqi@0 | 1450 | __ stf(FloatRegisterImpl::S, src.first()->as_FloatRegister(), FP, -4 + STACK_BIAS); |
aoqi@0 | 1451 | __ ld(FP, -4 + STACK_BIAS, dst.first()->as_Register()); |
aoqi@0 | 1452 | } else { |
aoqi@0 | 1453 | // fpr -> fpr |
aoqi@0 | 1454 | // In theory these overlap but the ordering is such that this is likely a nop |
aoqi@0 | 1455 | if ( src.first() != dst.first()) { |
aoqi@0 | 1456 | __ fmov(FloatRegisterImpl::S, src.first()->as_FloatRegister(), dst.first()->as_FloatRegister()); |
aoqi@0 | 1457 | } |
aoqi@0 | 1458 | } |
aoqi@0 | 1459 | } |
aoqi@0 | 1460 | } |
aoqi@0 | 1461 | |
aoqi@0 | 1462 | static void split_long_move(MacroAssembler* masm, VMRegPair src, VMRegPair dst) { |
aoqi@0 | 1463 | VMRegPair src_lo(src.first()); |
aoqi@0 | 1464 | VMRegPair src_hi(src.second()); |
aoqi@0 | 1465 | VMRegPair dst_lo(dst.first()); |
aoqi@0 | 1466 | VMRegPair dst_hi(dst.second()); |
aoqi@0 | 1467 | simple_move32(masm, src_lo, dst_lo); |
aoqi@0 | 1468 | simple_move32(masm, src_hi, dst_hi); |
aoqi@0 | 1469 | } |
aoqi@0 | 1470 | |
aoqi@0 | 1471 | // A long move |
aoqi@0 | 1472 | static void long_move(MacroAssembler* masm, VMRegPair src, VMRegPair dst) { |
aoqi@0 | 1473 | |
aoqi@0 | 1474 | // Do the simple ones here else do two int moves |
aoqi@0 | 1475 | if (src.is_single_phys_reg() ) { |
aoqi@0 | 1476 | if (dst.is_single_phys_reg()) { |
aoqi@0 | 1477 | __ mov(src.first()->as_Register(), dst.first()->as_Register()); |
aoqi@0 | 1478 | } else { |
aoqi@0 | 1479 | // split src into two separate registers |
aoqi@0 | 1480 | // Remember hi means hi address or lsw on sparc |
aoqi@0 | 1481 | // Move msw to lsw |
aoqi@0 | 1482 | if (dst.second()->is_reg()) { |
aoqi@0 | 1483 | // MSW -> MSW |
aoqi@0 | 1484 | __ srax(src.first()->as_Register(), 32, dst.first()->as_Register()); |
aoqi@0 | 1485 | // Now LSW -> LSW |
aoqi@0 | 1486 | // this will only move lo -> lo and ignore hi |
aoqi@0 | 1487 | VMRegPair split(dst.second()); |
aoqi@0 | 1488 | simple_move32(masm, src, split); |
aoqi@0 | 1489 | } else { |
aoqi@0 | 1490 | VMRegPair split(src.first(), L4->as_VMReg()); |
aoqi@0 | 1491 | // MSW -> MSW (lo ie. first word) |
aoqi@0 | 1492 | __ srax(src.first()->as_Register(), 32, L4); |
aoqi@0 | 1493 | split_long_move(masm, split, dst); |
aoqi@0 | 1494 | } |
aoqi@0 | 1495 | } |
aoqi@0 | 1496 | } else if (dst.is_single_phys_reg()) { |
aoqi@0 | 1497 | if (src.is_adjacent_aligned_on_stack(2)) { |
aoqi@0 | 1498 | __ ldx(FP, reg2offset(src.first()) + STACK_BIAS, dst.first()->as_Register()); |
aoqi@0 | 1499 | } else { |
aoqi@0 | 1500 | // dst is a single reg. |
aoqi@0 | 1501 | // Remember lo is low address not msb for stack slots |
aoqi@0 | 1502 | // and lo is the "real" register for registers |
aoqi@0 | 1503 | // src is |
aoqi@0 | 1504 | |
aoqi@0 | 1505 | VMRegPair split; |
aoqi@0 | 1506 | |
aoqi@0 | 1507 | if (src.first()->is_reg()) { |
aoqi@0 | 1508 | // src.lo (msw) is a reg, src.hi is stk/reg |
aoqi@0 | 1509 | // we will move: src.hi (LSW) -> dst.lo, src.lo (MSW) -> src.lo [the MSW is in the LSW of the reg] |
aoqi@0 | 1510 | split.set_pair(dst.first(), src.first()); |
aoqi@0 | 1511 | } else { |
aoqi@0 | 1512 | // msw is stack move to L5 |
aoqi@0 | 1513 | // lsw is stack move to dst.lo (real reg) |
aoqi@0 | 1514 | // we will move: src.hi (LSW) -> dst.lo, src.lo (MSW) -> L5 |
aoqi@0 | 1515 | split.set_pair(dst.first(), L5->as_VMReg()); |
aoqi@0 | 1516 | } |
aoqi@0 | 1517 | |
aoqi@0 | 1518 | // src.lo -> src.lo/L5, src.hi -> dst.lo (the real reg) |
aoqi@0 | 1519 | // msw -> src.lo/L5, lsw -> dst.lo |
aoqi@0 | 1520 | split_long_move(masm, src, split); |
aoqi@0 | 1521 | |
aoqi@0 | 1522 | // So dst now has the low order correct position the |
aoqi@0 | 1523 | // msw half |
aoqi@0 | 1524 | __ sllx(split.first()->as_Register(), 32, L5); |
aoqi@0 | 1525 | |
aoqi@0 | 1526 | const Register d = dst.first()->as_Register(); |
aoqi@0 | 1527 | __ or3(L5, d, d); |
aoqi@0 | 1528 | } |
aoqi@0 | 1529 | } else { |
aoqi@0 | 1530 | // For LP64 we can probably do better. |
aoqi@0 | 1531 | split_long_move(masm, src, dst); |
aoqi@0 | 1532 | } |
aoqi@0 | 1533 | } |
aoqi@0 | 1534 | |
aoqi@0 | 1535 | // A double move |
aoqi@0 | 1536 | static void double_move(MacroAssembler* masm, VMRegPair src, VMRegPair dst) { |
aoqi@0 | 1537 | |
aoqi@0 | 1538 | // The painful thing here is that like long_move a VMRegPair might be |
aoqi@0 | 1539 | // 1: a single physical register |
aoqi@0 | 1540 | // 2: two physical registers (v8) |
aoqi@0 | 1541 | // 3: a physical reg [lo] and a stack slot [hi] (v8) |
aoqi@0 | 1542 | // 4: two stack slots |
aoqi@0 | 1543 | |
aoqi@0 | 1544 | // Since src is always a java calling convention we know that the src pair |
aoqi@0 | 1545 | // is always either all registers or all stack (and aligned?) |
aoqi@0 | 1546 | |
aoqi@0 | 1547 | // in a register [lo] and a stack slot [hi] |
aoqi@0 | 1548 | if (src.first()->is_stack()) { |
aoqi@0 | 1549 | if (dst.first()->is_stack()) { |
aoqi@0 | 1550 | // stack to stack the easiest of the bunch |
aoqi@0 | 1551 | // ought to be a way to do this where if alignment is ok we use ldd/std when possible |
aoqi@0 | 1552 | __ ld(FP, reg2offset(src.first()) + STACK_BIAS, L5); |
aoqi@0 | 1553 | __ ld(FP, reg2offset(src.second()) + STACK_BIAS, L4); |
aoqi@0 | 1554 | __ st(L5, SP, reg2offset(dst.first()) + STACK_BIAS); |
aoqi@0 | 1555 | __ st(L4, SP, reg2offset(dst.second()) + STACK_BIAS); |
aoqi@0 | 1556 | } else { |
aoqi@0 | 1557 | // stack to reg |
aoqi@0 | 1558 | if (dst.second()->is_stack()) { |
aoqi@0 | 1559 | // stack -> reg, stack -> stack |
aoqi@0 | 1560 | __ ld(FP, reg2offset(src.second()) + STACK_BIAS, L4); |
aoqi@0 | 1561 | if (dst.first()->is_Register()) { |
aoqi@0 | 1562 | __ ld(FP, reg2offset(src.first()) + STACK_BIAS, dst.first()->as_Register()); |
aoqi@0 | 1563 | } else { |
aoqi@0 | 1564 | __ ldf(FloatRegisterImpl::S, FP, reg2offset(src.first()) + STACK_BIAS, dst.first()->as_FloatRegister()); |
aoqi@0 | 1565 | } |
aoqi@0 | 1566 | // This was missing. (very rare case) |
aoqi@0 | 1567 | __ st(L4, SP, reg2offset(dst.second()) + STACK_BIAS); |
aoqi@0 | 1568 | } else { |
aoqi@0 | 1569 | // stack -> reg |
aoqi@0 | 1570 | // Eventually optimize for alignment QQQ |
aoqi@0 | 1571 | if (dst.first()->is_Register()) { |
aoqi@0 | 1572 | __ ld(FP, reg2offset(src.first()) + STACK_BIAS, dst.first()->as_Register()); |
aoqi@0 | 1573 | __ ld(FP, reg2offset(src.second()) + STACK_BIAS, dst.second()->as_Register()); |
aoqi@0 | 1574 | } else { |
aoqi@0 | 1575 | __ ldf(FloatRegisterImpl::S, FP, reg2offset(src.first()) + STACK_BIAS, dst.first()->as_FloatRegister()); |
aoqi@0 | 1576 | __ ldf(FloatRegisterImpl::S, FP, reg2offset(src.second()) + STACK_BIAS, dst.second()->as_FloatRegister()); |
aoqi@0 | 1577 | } |
aoqi@0 | 1578 | } |
aoqi@0 | 1579 | } |
aoqi@0 | 1580 | } else if (dst.first()->is_stack()) { |
aoqi@0 | 1581 | // reg to stack |
aoqi@0 | 1582 | if (src.first()->is_Register()) { |
aoqi@0 | 1583 | // Eventually optimize for alignment QQQ |
aoqi@0 | 1584 | __ st(src.first()->as_Register(), SP, reg2offset(dst.first()) + STACK_BIAS); |
aoqi@0 | 1585 | if (src.second()->is_stack()) { |
aoqi@0 | 1586 | __ ld(FP, reg2offset(src.second()) + STACK_BIAS, L4); |
aoqi@0 | 1587 | __ st(L4, SP, reg2offset(dst.second()) + STACK_BIAS); |
aoqi@0 | 1588 | } else { |
aoqi@0 | 1589 | __ st(src.second()->as_Register(), SP, reg2offset(dst.second()) + STACK_BIAS); |
aoqi@0 | 1590 | } |
aoqi@0 | 1591 | } else { |
aoqi@0 | 1592 | // fpr to stack |
aoqi@0 | 1593 | if (src.second()->is_stack()) { |
aoqi@0 | 1594 | ShouldNotReachHere(); |
aoqi@0 | 1595 | } else { |
aoqi@0 | 1596 | // Is the stack aligned? |
aoqi@0 | 1597 | if (reg2offset(dst.first()) & 0x7) { |
aoqi@0 | 1598 | // No do as pairs |
aoqi@0 | 1599 | __ stf(FloatRegisterImpl::S, src.first()->as_FloatRegister(), SP, reg2offset(dst.first()) + STACK_BIAS); |
aoqi@0 | 1600 | __ stf(FloatRegisterImpl::S, src.second()->as_FloatRegister(), SP, reg2offset(dst.second()) + STACK_BIAS); |
aoqi@0 | 1601 | } else { |
aoqi@0 | 1602 | __ stf(FloatRegisterImpl::D, src.first()->as_FloatRegister(), SP, reg2offset(dst.first()) + STACK_BIAS); |
aoqi@0 | 1603 | } |
aoqi@0 | 1604 | } |
aoqi@0 | 1605 | } |
aoqi@0 | 1606 | } else { |
aoqi@0 | 1607 | // reg to reg |
aoqi@0 | 1608 | if (src.first()->is_Register()) { |
aoqi@0 | 1609 | if (dst.first()->is_Register()) { |
aoqi@0 | 1610 | // gpr -> gpr |
aoqi@0 | 1611 | __ mov(src.first()->as_Register(), dst.first()->as_Register()); |
aoqi@0 | 1612 | __ mov(src.second()->as_Register(), dst.second()->as_Register()); |
aoqi@0 | 1613 | } else { |
aoqi@0 | 1614 | // gpr -> fpr |
aoqi@0 | 1615 | // ought to be able to do a single store |
aoqi@0 | 1616 | __ stx(src.first()->as_Register(), FP, -8 + STACK_BIAS); |
aoqi@0 | 1617 | __ stx(src.second()->as_Register(), FP, -4 + STACK_BIAS); |
aoqi@0 | 1618 | // ought to be able to do a single load |
aoqi@0 | 1619 | __ ldf(FloatRegisterImpl::S, FP, -8 + STACK_BIAS, dst.first()->as_FloatRegister()); |
aoqi@0 | 1620 | __ ldf(FloatRegisterImpl::S, FP, -4 + STACK_BIAS, dst.second()->as_FloatRegister()); |
aoqi@0 | 1621 | } |
aoqi@0 | 1622 | } else if (dst.first()->is_Register()) { |
aoqi@0 | 1623 | // fpr -> gpr |
aoqi@0 | 1624 | // ought to be able to do a single store |
aoqi@0 | 1625 | __ stf(FloatRegisterImpl::D, src.first()->as_FloatRegister(), FP, -8 + STACK_BIAS); |
aoqi@0 | 1626 | // ought to be able to do a single load |
aoqi@0 | 1627 | // REMEMBER first() is low address not LSB |
aoqi@0 | 1628 | __ ld(FP, -8 + STACK_BIAS, dst.first()->as_Register()); |
aoqi@0 | 1629 | if (dst.second()->is_Register()) { |
aoqi@0 | 1630 | __ ld(FP, -4 + STACK_BIAS, dst.second()->as_Register()); |
aoqi@0 | 1631 | } else { |
aoqi@0 | 1632 | __ ld(FP, -4 + STACK_BIAS, L4); |
aoqi@0 | 1633 | __ st(L4, SP, reg2offset(dst.second()) + STACK_BIAS); |
aoqi@0 | 1634 | } |
aoqi@0 | 1635 | } else { |
aoqi@0 | 1636 | // fpr -> fpr |
aoqi@0 | 1637 | // In theory these overlap but the ordering is such that this is likely a nop |
aoqi@0 | 1638 | if ( src.first() != dst.first()) { |
aoqi@0 | 1639 | __ fmov(FloatRegisterImpl::D, src.first()->as_FloatRegister(), dst.first()->as_FloatRegister()); |
aoqi@0 | 1640 | } |
aoqi@0 | 1641 | } |
aoqi@0 | 1642 | } |
aoqi@0 | 1643 | } |
aoqi@0 | 1644 | |
aoqi@0 | 1645 | // Creates an inner frame if one hasn't already been created, and |
aoqi@0 | 1646 | // saves a copy of the thread in L7_thread_cache |
aoqi@0 | 1647 | static void create_inner_frame(MacroAssembler* masm, bool* already_created) { |
aoqi@0 | 1648 | if (!*already_created) { |
aoqi@0 | 1649 | __ save_frame(0); |
aoqi@0 | 1650 | // Save thread in L7 (INNER FRAME); it crosses a bunch of VM calls below |
aoqi@0 | 1651 | // Don't use save_thread because it smashes G2 and we merely want to save a |
aoqi@0 | 1652 | // copy |
aoqi@0 | 1653 | __ mov(G2_thread, L7_thread_cache); |
aoqi@0 | 1654 | *already_created = true; |
aoqi@0 | 1655 | } |
aoqi@0 | 1656 | } |
aoqi@0 | 1657 | |
aoqi@0 | 1658 | |
aoqi@0 | 1659 | static void save_or_restore_arguments(MacroAssembler* masm, |
aoqi@0 | 1660 | const int stack_slots, |
aoqi@0 | 1661 | const int total_in_args, |
aoqi@0 | 1662 | const int arg_save_area, |
aoqi@0 | 1663 | OopMap* map, |
aoqi@0 | 1664 | VMRegPair* in_regs, |
aoqi@0 | 1665 | BasicType* in_sig_bt) { |
aoqi@0 | 1666 | // if map is non-NULL then the code should store the values, |
aoqi@0 | 1667 | // otherwise it should load them. |
aoqi@0 | 1668 | if (map != NULL) { |
aoqi@0 | 1669 | // Fill in the map |
aoqi@0 | 1670 | for (int i = 0; i < total_in_args; i++) { |
aoqi@0 | 1671 | if (in_sig_bt[i] == T_ARRAY) { |
aoqi@0 | 1672 | if (in_regs[i].first()->is_stack()) { |
aoqi@0 | 1673 | int offset_in_older_frame = in_regs[i].first()->reg2stack() + SharedRuntime::out_preserve_stack_slots(); |
aoqi@0 | 1674 | map->set_oop(VMRegImpl::stack2reg(offset_in_older_frame + stack_slots)); |
aoqi@0 | 1675 | } else if (in_regs[i].first()->is_Register()) { |
aoqi@0 | 1676 | map->set_oop(in_regs[i].first()); |
aoqi@0 | 1677 | } else { |
aoqi@0 | 1678 | ShouldNotReachHere(); |
aoqi@0 | 1679 | } |
aoqi@0 | 1680 | } |
aoqi@0 | 1681 | } |
aoqi@0 | 1682 | } |
aoqi@0 | 1683 | |
aoqi@0 | 1684 | // Save or restore double word values |
aoqi@0 | 1685 | int handle_index = 0; |
aoqi@0 | 1686 | for (int i = 0; i < total_in_args; i++) { |
aoqi@0 | 1687 | int slot = handle_index + arg_save_area; |
aoqi@0 | 1688 | int offset = slot * VMRegImpl::stack_slot_size; |
aoqi@0 | 1689 | if (in_sig_bt[i] == T_LONG && in_regs[i].first()->is_Register()) { |
aoqi@0 | 1690 | const Register reg = in_regs[i].first()->as_Register(); |
aoqi@0 | 1691 | if (reg->is_global()) { |
aoqi@0 | 1692 | handle_index += 2; |
aoqi@0 | 1693 | assert(handle_index <= stack_slots, "overflow"); |
aoqi@0 | 1694 | if (map != NULL) { |
aoqi@0 | 1695 | __ stx(reg, SP, offset + STACK_BIAS); |
aoqi@0 | 1696 | } else { |
aoqi@0 | 1697 | __ ldx(SP, offset + STACK_BIAS, reg); |
aoqi@0 | 1698 | } |
aoqi@0 | 1699 | } |
aoqi@0 | 1700 | } else if (in_sig_bt[i] == T_DOUBLE && in_regs[i].first()->is_FloatRegister()) { |
aoqi@0 | 1701 | handle_index += 2; |
aoqi@0 | 1702 | assert(handle_index <= stack_slots, "overflow"); |
aoqi@0 | 1703 | if (map != NULL) { |
aoqi@0 | 1704 | __ stf(FloatRegisterImpl::D, in_regs[i].first()->as_FloatRegister(), SP, offset + STACK_BIAS); |
aoqi@0 | 1705 | } else { |
aoqi@0 | 1706 | __ ldf(FloatRegisterImpl::D, SP, offset + STACK_BIAS, in_regs[i].first()->as_FloatRegister()); |
aoqi@0 | 1707 | } |
aoqi@0 | 1708 | } |
aoqi@0 | 1709 | } |
aoqi@0 | 1710 | // Save floats |
aoqi@0 | 1711 | for (int i = 0; i < total_in_args; i++) { |
aoqi@0 | 1712 | int slot = handle_index + arg_save_area; |
aoqi@0 | 1713 | int offset = slot * VMRegImpl::stack_slot_size; |
aoqi@0 | 1714 | if (in_sig_bt[i] == T_FLOAT && in_regs[i].first()->is_FloatRegister()) { |
aoqi@0 | 1715 | handle_index++; |
aoqi@0 | 1716 | assert(handle_index <= stack_slots, "overflow"); |
aoqi@0 | 1717 | if (map != NULL) { |
aoqi@0 | 1718 | __ stf(FloatRegisterImpl::S, in_regs[i].first()->as_FloatRegister(), SP, offset + STACK_BIAS); |
aoqi@0 | 1719 | } else { |
aoqi@0 | 1720 | __ ldf(FloatRegisterImpl::S, SP, offset + STACK_BIAS, in_regs[i].first()->as_FloatRegister()); |
aoqi@0 | 1721 | } |
aoqi@0 | 1722 | } |
aoqi@0 | 1723 | } |
aoqi@0 | 1724 | |
aoqi@0 | 1725 | } |
aoqi@0 | 1726 | |
aoqi@0 | 1727 | |
aoqi@0 | 1728 | // Check GC_locker::needs_gc and enter the runtime if it's true. This |
aoqi@0 | 1729 | // keeps a new JNI critical region from starting until a GC has been |
aoqi@0 | 1730 | // forced. Save down any oops in registers and describe them in an |
aoqi@0 | 1731 | // OopMap. |
aoqi@0 | 1732 | static void check_needs_gc_for_critical_native(MacroAssembler* masm, |
aoqi@0 | 1733 | const int stack_slots, |
aoqi@0 | 1734 | const int total_in_args, |
aoqi@0 | 1735 | const int arg_save_area, |
aoqi@0 | 1736 | OopMapSet* oop_maps, |
aoqi@0 | 1737 | VMRegPair* in_regs, |
aoqi@0 | 1738 | BasicType* in_sig_bt) { |
aoqi@0 | 1739 | __ block_comment("check GC_locker::needs_gc"); |
aoqi@0 | 1740 | Label cont; |
aoqi@0 | 1741 | AddressLiteral sync_state(GC_locker::needs_gc_address()); |
aoqi@0 | 1742 | __ load_bool_contents(sync_state, G3_scratch); |
aoqi@0 | 1743 | __ cmp_zero_and_br(Assembler::equal, G3_scratch, cont); |
aoqi@0 | 1744 | __ delayed()->nop(); |
aoqi@0 | 1745 | |
aoqi@0 | 1746 | // Save down any values that are live in registers and call into the |
aoqi@0 | 1747 | // runtime to halt for a GC |
aoqi@0 | 1748 | OopMap* map = new OopMap(stack_slots * 2, 0 /* arg_slots*/); |
aoqi@0 | 1749 | save_or_restore_arguments(masm, stack_slots, total_in_args, |
aoqi@0 | 1750 | arg_save_area, map, in_regs, in_sig_bt); |
aoqi@0 | 1751 | |
aoqi@0 | 1752 | __ mov(G2_thread, L7_thread_cache); |
aoqi@0 | 1753 | |
aoqi@0 | 1754 | __ set_last_Java_frame(SP, noreg); |
aoqi@0 | 1755 | |
aoqi@0 | 1756 | __ block_comment("block_for_jni_critical"); |
aoqi@0 | 1757 | __ call(CAST_FROM_FN_PTR(address, SharedRuntime::block_for_jni_critical), relocInfo::runtime_call_type); |
aoqi@0 | 1758 | __ delayed()->mov(L7_thread_cache, O0); |
aoqi@0 | 1759 | oop_maps->add_gc_map( __ offset(), map); |
aoqi@0 | 1760 | |
aoqi@0 | 1761 | __ restore_thread(L7_thread_cache); // restore G2_thread |
aoqi@0 | 1762 | __ reset_last_Java_frame(); |
aoqi@0 | 1763 | |
aoqi@0 | 1764 | // Reload all the register arguments |
aoqi@0 | 1765 | save_or_restore_arguments(masm, stack_slots, total_in_args, |
aoqi@0 | 1766 | arg_save_area, NULL, in_regs, in_sig_bt); |
aoqi@0 | 1767 | |
aoqi@0 | 1768 | __ bind(cont); |
aoqi@0 | 1769 | #ifdef ASSERT |
aoqi@0 | 1770 | if (StressCriticalJNINatives) { |
aoqi@0 | 1771 | // Stress register saving |
aoqi@0 | 1772 | OopMap* map = new OopMap(stack_slots * 2, 0 /* arg_slots*/); |
aoqi@0 | 1773 | save_or_restore_arguments(masm, stack_slots, total_in_args, |
aoqi@0 | 1774 | arg_save_area, map, in_regs, in_sig_bt); |
aoqi@0 | 1775 | // Destroy argument registers |
aoqi@0 | 1776 | for (int i = 0; i < total_in_args; i++) { |
aoqi@0 | 1777 | if (in_regs[i].first()->is_Register()) { |
aoqi@0 | 1778 | const Register reg = in_regs[i].first()->as_Register(); |
aoqi@0 | 1779 | if (reg->is_global()) { |
aoqi@0 | 1780 | __ mov(G0, reg); |
aoqi@0 | 1781 | } |
aoqi@0 | 1782 | } else if (in_regs[i].first()->is_FloatRegister()) { |
aoqi@0 | 1783 | __ fneg(FloatRegisterImpl::D, in_regs[i].first()->as_FloatRegister(), in_regs[i].first()->as_FloatRegister()); |
aoqi@0 | 1784 | } |
aoqi@0 | 1785 | } |
aoqi@0 | 1786 | |
aoqi@0 | 1787 | save_or_restore_arguments(masm, stack_slots, total_in_args, |
aoqi@0 | 1788 | arg_save_area, NULL, in_regs, in_sig_bt); |
aoqi@0 | 1789 | } |
aoqi@0 | 1790 | #endif |
aoqi@0 | 1791 | } |
aoqi@0 | 1792 | |
aoqi@0 | 1793 | // Unpack an array argument into a pointer to the body and the length |
aoqi@0 | 1794 | // if the array is non-null, otherwise pass 0 for both. |
aoqi@0 | 1795 | static void unpack_array_argument(MacroAssembler* masm, VMRegPair reg, BasicType in_elem_type, VMRegPair body_arg, VMRegPair length_arg) { |
aoqi@0 | 1796 | // Pass the length, ptr pair |
aoqi@0 | 1797 | Label is_null, done; |
aoqi@0 | 1798 | if (reg.first()->is_stack()) { |
aoqi@0 | 1799 | VMRegPair tmp = reg64_to_VMRegPair(L2); |
aoqi@0 | 1800 | // Load the arg up from the stack |
aoqi@0 | 1801 | move_ptr(masm, reg, tmp); |
aoqi@0 | 1802 | reg = tmp; |
aoqi@0 | 1803 | } |
aoqi@0 | 1804 | __ cmp(reg.first()->as_Register(), G0); |
aoqi@0 | 1805 | __ brx(Assembler::equal, false, Assembler::pt, is_null); |
aoqi@0 | 1806 | __ delayed()->add(reg.first()->as_Register(), arrayOopDesc::base_offset_in_bytes(in_elem_type), L4); |
aoqi@0 | 1807 | move_ptr(masm, reg64_to_VMRegPair(L4), body_arg); |
aoqi@0 | 1808 | __ ld(reg.first()->as_Register(), arrayOopDesc::length_offset_in_bytes(), L4); |
aoqi@0 | 1809 | move32_64(masm, reg64_to_VMRegPair(L4), length_arg); |
aoqi@0 | 1810 | __ ba_short(done); |
aoqi@0 | 1811 | __ bind(is_null); |
aoqi@0 | 1812 | // Pass zeros |
aoqi@0 | 1813 | move_ptr(masm, reg64_to_VMRegPair(G0), body_arg); |
aoqi@0 | 1814 | move32_64(masm, reg64_to_VMRegPair(G0), length_arg); |
aoqi@0 | 1815 | __ bind(done); |
aoqi@0 | 1816 | } |
aoqi@0 | 1817 | |
aoqi@0 | 1818 | static void verify_oop_args(MacroAssembler* masm, |
aoqi@0 | 1819 | methodHandle method, |
aoqi@0 | 1820 | const BasicType* sig_bt, |
aoqi@0 | 1821 | const VMRegPair* regs) { |
aoqi@0 | 1822 | Register temp_reg = G5_method; // not part of any compiled calling seq |
aoqi@0 | 1823 | if (VerifyOops) { |
aoqi@0 | 1824 | for (int i = 0; i < method->size_of_parameters(); i++) { |
aoqi@0 | 1825 | if (sig_bt[i] == T_OBJECT || |
aoqi@0 | 1826 | sig_bt[i] == T_ARRAY) { |
aoqi@0 | 1827 | VMReg r = regs[i].first(); |
aoqi@0 | 1828 | assert(r->is_valid(), "bad oop arg"); |
aoqi@0 | 1829 | if (r->is_stack()) { |
aoqi@0 | 1830 | RegisterOrConstant ld_off = reg2offset(r) + STACK_BIAS; |
aoqi@0 | 1831 | ld_off = __ ensure_simm13_or_reg(ld_off, temp_reg); |
aoqi@0 | 1832 | __ ld_ptr(SP, ld_off, temp_reg); |
aoqi@0 | 1833 | __ verify_oop(temp_reg); |
aoqi@0 | 1834 | } else { |
aoqi@0 | 1835 | __ verify_oop(r->as_Register()); |
aoqi@0 | 1836 | } |
aoqi@0 | 1837 | } |
aoqi@0 | 1838 | } |
aoqi@0 | 1839 | } |
aoqi@0 | 1840 | } |
aoqi@0 | 1841 | |
aoqi@0 | 1842 | static void gen_special_dispatch(MacroAssembler* masm, |
aoqi@0 | 1843 | methodHandle method, |
aoqi@0 | 1844 | const BasicType* sig_bt, |
aoqi@0 | 1845 | const VMRegPair* regs) { |
aoqi@0 | 1846 | verify_oop_args(masm, method, sig_bt, regs); |
aoqi@0 | 1847 | vmIntrinsics::ID iid = method->intrinsic_id(); |
aoqi@0 | 1848 | |
aoqi@0 | 1849 | // Now write the args into the outgoing interpreter space |
aoqi@0 | 1850 | bool has_receiver = false; |
aoqi@0 | 1851 | Register receiver_reg = noreg; |
aoqi@0 | 1852 | int member_arg_pos = -1; |
aoqi@0 | 1853 | Register member_reg = noreg; |
aoqi@0 | 1854 | int ref_kind = MethodHandles::signature_polymorphic_intrinsic_ref_kind(iid); |
aoqi@0 | 1855 | if (ref_kind != 0) { |
aoqi@0 | 1856 | member_arg_pos = method->size_of_parameters() - 1; // trailing MemberName argument |
aoqi@0 | 1857 | member_reg = G5_method; // known to be free at this point |
aoqi@0 | 1858 | has_receiver = MethodHandles::ref_kind_has_receiver(ref_kind); |
aoqi@0 | 1859 | } else if (iid == vmIntrinsics::_invokeBasic) { |
aoqi@0 | 1860 | has_receiver = true; |
aoqi@0 | 1861 | } else { |
aoqi@0 | 1862 | fatal(err_msg_res("unexpected intrinsic id %d", iid)); |
aoqi@0 | 1863 | } |
aoqi@0 | 1864 | |
aoqi@0 | 1865 | if (member_reg != noreg) { |
aoqi@0 | 1866 | // Load the member_arg into register, if necessary. |
aoqi@0 | 1867 | SharedRuntime::check_member_name_argument_is_last_argument(method, sig_bt, regs); |
aoqi@0 | 1868 | VMReg r = regs[member_arg_pos].first(); |
aoqi@0 | 1869 | if (r->is_stack()) { |
aoqi@0 | 1870 | RegisterOrConstant ld_off = reg2offset(r) + STACK_BIAS; |
aoqi@0 | 1871 | ld_off = __ ensure_simm13_or_reg(ld_off, member_reg); |
aoqi@0 | 1872 | __ ld_ptr(SP, ld_off, member_reg); |
aoqi@0 | 1873 | } else { |
aoqi@0 | 1874 | // no data motion is needed |
aoqi@0 | 1875 | member_reg = r->as_Register(); |
aoqi@0 | 1876 | } |
aoqi@0 | 1877 | } |
aoqi@0 | 1878 | |
aoqi@0 | 1879 | if (has_receiver) { |
aoqi@0 | 1880 | // Make sure the receiver is loaded into a register. |
aoqi@0 | 1881 | assert(method->size_of_parameters() > 0, "oob"); |
aoqi@0 | 1882 | assert(sig_bt[0] == T_OBJECT, "receiver argument must be an object"); |
aoqi@0 | 1883 | VMReg r = regs[0].first(); |
aoqi@0 | 1884 | assert(r->is_valid(), "bad receiver arg"); |
aoqi@0 | 1885 | if (r->is_stack()) { |
aoqi@0 | 1886 | // Porting note: This assumes that compiled calling conventions always |
aoqi@0 | 1887 | // pass the receiver oop in a register. If this is not true on some |
aoqi@0 | 1888 | // platform, pick a temp and load the receiver from stack. |
aoqi@0 | 1889 | fatal("receiver always in a register"); |
aoqi@0 | 1890 | receiver_reg = G3_scratch; // known to be free at this point |
aoqi@0 | 1891 | RegisterOrConstant ld_off = reg2offset(r) + STACK_BIAS; |
aoqi@0 | 1892 | ld_off = __ ensure_simm13_or_reg(ld_off, member_reg); |
aoqi@0 | 1893 | __ ld_ptr(SP, ld_off, receiver_reg); |
aoqi@0 | 1894 | } else { |
aoqi@0 | 1895 | // no data motion is needed |
aoqi@0 | 1896 | receiver_reg = r->as_Register(); |
aoqi@0 | 1897 | } |
aoqi@0 | 1898 | } |
aoqi@0 | 1899 | |
aoqi@0 | 1900 | // Figure out which address we are really jumping to: |
aoqi@0 | 1901 | MethodHandles::generate_method_handle_dispatch(masm, iid, |
aoqi@0 | 1902 | receiver_reg, member_reg, /*for_compiler_entry:*/ true); |
aoqi@0 | 1903 | } |
aoqi@0 | 1904 | |
aoqi@0 | 1905 | // --------------------------------------------------------------------------- |
aoqi@0 | 1906 | // Generate a native wrapper for a given method. The method takes arguments |
aoqi@0 | 1907 | // in the Java compiled code convention, marshals them to the native |
aoqi@0 | 1908 | // convention (handlizes oops, etc), transitions to native, makes the call, |
aoqi@0 | 1909 | // returns to java state (possibly blocking), unhandlizes any result and |
aoqi@0 | 1910 | // returns. |
aoqi@0 | 1911 | // |
aoqi@0 | 1912 | // Critical native functions are a shorthand for the use of |
aoqi@0 | 1913 | // GetPrimtiveArrayCritical and disallow the use of any other JNI |
aoqi@0 | 1914 | // functions. The wrapper is expected to unpack the arguments before |
aoqi@0 | 1915 | // passing them to the callee and perform checks before and after the |
aoqi@0 | 1916 | // native call to ensure that they GC_locker |
aoqi@0 | 1917 | // lock_critical/unlock_critical semantics are followed. Some other |
aoqi@0 | 1918 | // parts of JNI setup are skipped like the tear down of the JNI handle |
aoqi@0 | 1919 | // block and the check for pending exceptions it's impossible for them |
aoqi@0 | 1920 | // to be thrown. |
aoqi@0 | 1921 | // |
aoqi@0 | 1922 | // They are roughly structured like this: |
aoqi@0 | 1923 | // if (GC_locker::needs_gc()) |
aoqi@0 | 1924 | // SharedRuntime::block_for_jni_critical(); |
aoqi@0 | 1925 | // tranistion to thread_in_native |
aoqi@0 | 1926 | // unpack arrray arguments and call native entry point |
aoqi@0 | 1927 | // check for safepoint in progress |
aoqi@0 | 1928 | // check if any thread suspend flags are set |
aoqi@0 | 1929 | // call into JVM and possible unlock the JNI critical |
aoqi@0 | 1930 | // if a GC was suppressed while in the critical native. |
aoqi@0 | 1931 | // transition back to thread_in_Java |
aoqi@0 | 1932 | // return to caller |
aoqi@0 | 1933 | // |
aoqi@0 | 1934 | nmethod* SharedRuntime::generate_native_wrapper(MacroAssembler* masm, |
aoqi@0 | 1935 | methodHandle method, |
aoqi@0 | 1936 | int compile_id, |
aoqi@0 | 1937 | BasicType* in_sig_bt, |
aoqi@0 | 1938 | VMRegPair* in_regs, |
aoqi@0 | 1939 | BasicType ret_type) { |
aoqi@0 | 1940 | if (method->is_method_handle_intrinsic()) { |
aoqi@0 | 1941 | vmIntrinsics::ID iid = method->intrinsic_id(); |
aoqi@0 | 1942 | intptr_t start = (intptr_t)__ pc(); |
aoqi@0 | 1943 | int vep_offset = ((intptr_t)__ pc()) - start; |
aoqi@0 | 1944 | gen_special_dispatch(masm, |
aoqi@0 | 1945 | method, |
aoqi@0 | 1946 | in_sig_bt, |
aoqi@0 | 1947 | in_regs); |
aoqi@0 | 1948 | int frame_complete = ((intptr_t)__ pc()) - start; // not complete, period |
aoqi@0 | 1949 | __ flush(); |
aoqi@0 | 1950 | int stack_slots = SharedRuntime::out_preserve_stack_slots(); // no out slots at all, actually |
aoqi@0 | 1951 | return nmethod::new_native_nmethod(method, |
aoqi@0 | 1952 | compile_id, |
aoqi@0 | 1953 | masm->code(), |
aoqi@0 | 1954 | vep_offset, |
aoqi@0 | 1955 | frame_complete, |
aoqi@0 | 1956 | stack_slots / VMRegImpl::slots_per_word, |
aoqi@0 | 1957 | in_ByteSize(-1), |
aoqi@0 | 1958 | in_ByteSize(-1), |
aoqi@0 | 1959 | (OopMapSet*)NULL); |
aoqi@0 | 1960 | } |
aoqi@0 | 1961 | bool is_critical_native = true; |
aoqi@0 | 1962 | address native_func = method->critical_native_function(); |
aoqi@0 | 1963 | if (native_func == NULL) { |
aoqi@0 | 1964 | native_func = method->native_function(); |
aoqi@0 | 1965 | is_critical_native = false; |
aoqi@0 | 1966 | } |
aoqi@0 | 1967 | assert(native_func != NULL, "must have function"); |
aoqi@0 | 1968 | |
aoqi@0 | 1969 | // Native nmethod wrappers never take possesion of the oop arguments. |
aoqi@0 | 1970 | // So the caller will gc the arguments. The only thing we need an |
aoqi@0 | 1971 | // oopMap for is if the call is static |
aoqi@0 | 1972 | // |
aoqi@0 | 1973 | // An OopMap for lock (and class if static), and one for the VM call itself |
aoqi@0 | 1974 | OopMapSet *oop_maps = new OopMapSet(); |
aoqi@0 | 1975 | intptr_t start = (intptr_t)__ pc(); |
aoqi@0 | 1976 | |
aoqi@0 | 1977 | // First thing make an ic check to see if we should even be here |
aoqi@0 | 1978 | { |
aoqi@0 | 1979 | Label L; |
aoqi@0 | 1980 | const Register temp_reg = G3_scratch; |
aoqi@0 | 1981 | AddressLiteral ic_miss(SharedRuntime::get_ic_miss_stub()); |
aoqi@0 | 1982 | __ verify_oop(O0); |
aoqi@0 | 1983 | __ load_klass(O0, temp_reg); |
aoqi@0 | 1984 | __ cmp_and_brx_short(temp_reg, G5_inline_cache_reg, Assembler::equal, Assembler::pt, L); |
aoqi@0 | 1985 | |
aoqi@0 | 1986 | __ jump_to(ic_miss, temp_reg); |
aoqi@0 | 1987 | __ delayed()->nop(); |
aoqi@0 | 1988 | __ align(CodeEntryAlignment); |
aoqi@0 | 1989 | __ bind(L); |
aoqi@0 | 1990 | } |
aoqi@0 | 1991 | |
aoqi@0 | 1992 | int vep_offset = ((intptr_t)__ pc()) - start; |
aoqi@0 | 1993 | |
aoqi@0 | 1994 | #ifdef COMPILER1 |
aoqi@0 | 1995 | if (InlineObjectHash && method->intrinsic_id() == vmIntrinsics::_hashCode) { |
aoqi@0 | 1996 | // Object.hashCode can pull the hashCode from the header word |
aoqi@0 | 1997 | // instead of doing a full VM transition once it's been computed. |
aoqi@0 | 1998 | // Since hashCode is usually polymorphic at call sites we can't do |
aoqi@0 | 1999 | // this optimization at the call site without a lot of work. |
aoqi@0 | 2000 | Label slowCase; |
aoqi@0 | 2001 | Register receiver = O0; |
aoqi@0 | 2002 | Register result = O0; |
aoqi@0 | 2003 | Register header = G3_scratch; |
aoqi@0 | 2004 | Register hash = G3_scratch; // overwrite header value with hash value |
aoqi@0 | 2005 | Register mask = G1; // to get hash field from header |
aoqi@0 | 2006 | |
aoqi@0 | 2007 | // Read the header and build a mask to get its hash field. Give up if the object is not unlocked. |
aoqi@0 | 2008 | // We depend on hash_mask being at most 32 bits and avoid the use of |
aoqi@0 | 2009 | // hash_mask_in_place because it could be larger than 32 bits in a 64-bit |
aoqi@0 | 2010 | // vm: see markOop.hpp. |
aoqi@0 | 2011 | __ ld_ptr(receiver, oopDesc::mark_offset_in_bytes(), header); |
aoqi@0 | 2012 | __ sethi(markOopDesc::hash_mask, mask); |
aoqi@0 | 2013 | __ btst(markOopDesc::unlocked_value, header); |
aoqi@0 | 2014 | __ br(Assembler::zero, false, Assembler::pn, slowCase); |
aoqi@0 | 2015 | if (UseBiasedLocking) { |
aoqi@0 | 2016 | // Check if biased and fall through to runtime if so |
aoqi@0 | 2017 | __ delayed()->nop(); |
aoqi@0 | 2018 | __ btst(markOopDesc::biased_lock_bit_in_place, header); |
aoqi@0 | 2019 | __ br(Assembler::notZero, false, Assembler::pn, slowCase); |
aoqi@0 | 2020 | } |
aoqi@0 | 2021 | __ delayed()->or3(mask, markOopDesc::hash_mask & 0x3ff, mask); |
aoqi@0 | 2022 | |
aoqi@0 | 2023 | // Check for a valid (non-zero) hash code and get its value. |
aoqi@0 | 2024 | #ifdef _LP64 |
aoqi@0 | 2025 | __ srlx(header, markOopDesc::hash_shift, hash); |
aoqi@0 | 2026 | #else |
aoqi@0 | 2027 | __ srl(header, markOopDesc::hash_shift, hash); |
aoqi@0 | 2028 | #endif |
aoqi@0 | 2029 | __ andcc(hash, mask, hash); |
aoqi@0 | 2030 | __ br(Assembler::equal, false, Assembler::pn, slowCase); |
aoqi@0 | 2031 | __ delayed()->nop(); |
aoqi@0 | 2032 | |
aoqi@0 | 2033 | // leaf return. |
aoqi@0 | 2034 | __ retl(); |
aoqi@0 | 2035 | __ delayed()->mov(hash, result); |
aoqi@0 | 2036 | __ bind(slowCase); |
aoqi@0 | 2037 | } |
aoqi@0 | 2038 | #endif // COMPILER1 |
aoqi@0 | 2039 | |
aoqi@0 | 2040 | |
aoqi@0 | 2041 | // We have received a description of where all the java arg are located |
aoqi@0 | 2042 | // on entry to the wrapper. We need to convert these args to where |
aoqi@0 | 2043 | // the jni function will expect them. To figure out where they go |
aoqi@0 | 2044 | // we convert the java signature to a C signature by inserting |
aoqi@0 | 2045 | // the hidden arguments as arg[0] and possibly arg[1] (static method) |
aoqi@0 | 2046 | |
aoqi@0 | 2047 | const int total_in_args = method->size_of_parameters(); |
aoqi@0 | 2048 | int total_c_args = total_in_args; |
aoqi@0 | 2049 | int total_save_slots = 6 * VMRegImpl::slots_per_word; |
aoqi@0 | 2050 | if (!is_critical_native) { |
aoqi@0 | 2051 | total_c_args += 1; |
aoqi@0 | 2052 | if (method->is_static()) { |
aoqi@0 | 2053 | total_c_args++; |
aoqi@0 | 2054 | } |
aoqi@0 | 2055 | } else { |
aoqi@0 | 2056 | for (int i = 0; i < total_in_args; i++) { |
aoqi@0 | 2057 | if (in_sig_bt[i] == T_ARRAY) { |
aoqi@0 | 2058 | // These have to be saved and restored across the safepoint |
aoqi@0 | 2059 | total_c_args++; |
aoqi@0 | 2060 | } |
aoqi@0 | 2061 | } |
aoqi@0 | 2062 | } |
aoqi@0 | 2063 | |
aoqi@0 | 2064 | BasicType* out_sig_bt = NEW_RESOURCE_ARRAY(BasicType, total_c_args); |
aoqi@0 | 2065 | VMRegPair* out_regs = NEW_RESOURCE_ARRAY(VMRegPair, total_c_args); |
aoqi@0 | 2066 | BasicType* in_elem_bt = NULL; |
aoqi@0 | 2067 | |
aoqi@0 | 2068 | int argc = 0; |
aoqi@0 | 2069 | if (!is_critical_native) { |
aoqi@0 | 2070 | out_sig_bt[argc++] = T_ADDRESS; |
aoqi@0 | 2071 | if (method->is_static()) { |
aoqi@0 | 2072 | out_sig_bt[argc++] = T_OBJECT; |
aoqi@0 | 2073 | } |
aoqi@0 | 2074 | |
aoqi@0 | 2075 | for (int i = 0; i < total_in_args ; i++ ) { |
aoqi@0 | 2076 | out_sig_bt[argc++] = in_sig_bt[i]; |
aoqi@0 | 2077 | } |
aoqi@0 | 2078 | } else { |
aoqi@0 | 2079 | Thread* THREAD = Thread::current(); |
aoqi@0 | 2080 | in_elem_bt = NEW_RESOURCE_ARRAY(BasicType, total_in_args); |
aoqi@0 | 2081 | SignatureStream ss(method->signature()); |
aoqi@0 | 2082 | for (int i = 0; i < total_in_args ; i++ ) { |
aoqi@0 | 2083 | if (in_sig_bt[i] == T_ARRAY) { |
aoqi@0 | 2084 | // Arrays are passed as int, elem* pair |
aoqi@0 | 2085 | out_sig_bt[argc++] = T_INT; |
aoqi@0 | 2086 | out_sig_bt[argc++] = T_ADDRESS; |
aoqi@0 | 2087 | Symbol* atype = ss.as_symbol(CHECK_NULL); |
aoqi@0 | 2088 | const char* at = atype->as_C_string(); |
aoqi@0 | 2089 | if (strlen(at) == 2) { |
aoqi@0 | 2090 | assert(at[0] == '[', "must be"); |
aoqi@0 | 2091 | switch (at[1]) { |
aoqi@0 | 2092 | case 'B': in_elem_bt[i] = T_BYTE; break; |
aoqi@0 | 2093 | case 'C': in_elem_bt[i] = T_CHAR; break; |
aoqi@0 | 2094 | case 'D': in_elem_bt[i] = T_DOUBLE; break; |
aoqi@0 | 2095 | case 'F': in_elem_bt[i] = T_FLOAT; break; |
aoqi@0 | 2096 | case 'I': in_elem_bt[i] = T_INT; break; |
aoqi@0 | 2097 | case 'J': in_elem_bt[i] = T_LONG; break; |
aoqi@0 | 2098 | case 'S': in_elem_bt[i] = T_SHORT; break; |
aoqi@0 | 2099 | case 'Z': in_elem_bt[i] = T_BOOLEAN; break; |
aoqi@0 | 2100 | default: ShouldNotReachHere(); |
aoqi@0 | 2101 | } |
aoqi@0 | 2102 | } |
aoqi@0 | 2103 | } else { |
aoqi@0 | 2104 | out_sig_bt[argc++] = in_sig_bt[i]; |
aoqi@0 | 2105 | in_elem_bt[i] = T_VOID; |
aoqi@0 | 2106 | } |
aoqi@0 | 2107 | if (in_sig_bt[i] != T_VOID) { |
aoqi@0 | 2108 | assert(in_sig_bt[i] == ss.type(), "must match"); |
aoqi@0 | 2109 | ss.next(); |
aoqi@0 | 2110 | } |
aoqi@0 | 2111 | } |
aoqi@0 | 2112 | } |
aoqi@0 | 2113 | |
aoqi@0 | 2114 | // Now figure out where the args must be stored and how much stack space |
aoqi@0 | 2115 | // they require (neglecting out_preserve_stack_slots but space for storing |
aoqi@0 | 2116 | // the 1st six register arguments). It's weird see int_stk_helper. |
aoqi@0 | 2117 | // |
aoqi@0 | 2118 | int out_arg_slots; |
aoqi@0 | 2119 | out_arg_slots = c_calling_convention(out_sig_bt, out_regs, NULL, total_c_args); |
aoqi@0 | 2120 | |
aoqi@0 | 2121 | if (is_critical_native) { |
aoqi@0 | 2122 | // Critical natives may have to call out so they need a save area |
aoqi@0 | 2123 | // for register arguments. |
aoqi@0 | 2124 | int double_slots = 0; |
aoqi@0 | 2125 | int single_slots = 0; |
aoqi@0 | 2126 | for ( int i = 0; i < total_in_args; i++) { |
aoqi@0 | 2127 | if (in_regs[i].first()->is_Register()) { |
aoqi@0 | 2128 | const Register reg = in_regs[i].first()->as_Register(); |
aoqi@0 | 2129 | switch (in_sig_bt[i]) { |
aoqi@0 | 2130 | case T_ARRAY: |
aoqi@0 | 2131 | case T_BOOLEAN: |
aoqi@0 | 2132 | case T_BYTE: |
aoqi@0 | 2133 | case T_SHORT: |
aoqi@0 | 2134 | case T_CHAR: |
aoqi@0 | 2135 | case T_INT: assert(reg->is_in(), "don't need to save these"); break; |
aoqi@0 | 2136 | case T_LONG: if (reg->is_global()) double_slots++; break; |
aoqi@0 | 2137 | default: ShouldNotReachHere(); |
aoqi@0 | 2138 | } |
aoqi@0 | 2139 | } else if (in_regs[i].first()->is_FloatRegister()) { |
aoqi@0 | 2140 | switch (in_sig_bt[i]) { |
aoqi@0 | 2141 | case T_FLOAT: single_slots++; break; |
aoqi@0 | 2142 | case T_DOUBLE: double_slots++; break; |
aoqi@0 | 2143 | default: ShouldNotReachHere(); |
aoqi@0 | 2144 | } |
aoqi@0 | 2145 | } |
aoqi@0 | 2146 | } |
aoqi@0 | 2147 | total_save_slots = double_slots * 2 + single_slots; |
aoqi@0 | 2148 | } |
aoqi@0 | 2149 | |
aoqi@0 | 2150 | // Compute framesize for the wrapper. We need to handlize all oops in |
aoqi@0 | 2151 | // registers. We must create space for them here that is disjoint from |
aoqi@0 | 2152 | // the windowed save area because we have no control over when we might |
aoqi@0 | 2153 | // flush the window again and overwrite values that gc has since modified. |
aoqi@0 | 2154 | // (The live window race) |
aoqi@0 | 2155 | // |
aoqi@0 | 2156 | // We always just allocate 6 word for storing down these object. This allow |
aoqi@0 | 2157 | // us to simply record the base and use the Ireg number to decide which |
aoqi@0 | 2158 | // slot to use. (Note that the reg number is the inbound number not the |
aoqi@0 | 2159 | // outbound number). |
aoqi@0 | 2160 | // We must shuffle args to match the native convention, and include var-args space. |
aoqi@0 | 2161 | |
aoqi@0 | 2162 | // Calculate the total number of stack slots we will need. |
aoqi@0 | 2163 | |
aoqi@0 | 2164 | // First count the abi requirement plus all of the outgoing args |
aoqi@0 | 2165 | int stack_slots = SharedRuntime::out_preserve_stack_slots() + out_arg_slots; |
aoqi@0 | 2166 | |
aoqi@0 | 2167 | // Now the space for the inbound oop handle area |
aoqi@0 | 2168 | |
aoqi@0 | 2169 | int oop_handle_offset = round_to(stack_slots, 2); |
aoqi@0 | 2170 | stack_slots += total_save_slots; |
aoqi@0 | 2171 | |
aoqi@0 | 2172 | // Now any space we need for handlizing a klass if static method |
aoqi@0 | 2173 | |
aoqi@0 | 2174 | int klass_slot_offset = 0; |
aoqi@0 | 2175 | int klass_offset = -1; |
aoqi@0 | 2176 | int lock_slot_offset = 0; |
aoqi@0 | 2177 | bool is_static = false; |
aoqi@0 | 2178 | |
aoqi@0 | 2179 | if (method->is_static()) { |
aoqi@0 | 2180 | klass_slot_offset = stack_slots; |
aoqi@0 | 2181 | stack_slots += VMRegImpl::slots_per_word; |
aoqi@0 | 2182 | klass_offset = klass_slot_offset * VMRegImpl::stack_slot_size; |
aoqi@0 | 2183 | is_static = true; |
aoqi@0 | 2184 | } |
aoqi@0 | 2185 | |
aoqi@0 | 2186 | // Plus a lock if needed |
aoqi@0 | 2187 | |
aoqi@0 | 2188 | if (method->is_synchronized()) { |
aoqi@0 | 2189 | lock_slot_offset = stack_slots; |
aoqi@0 | 2190 | stack_slots += VMRegImpl::slots_per_word; |
aoqi@0 | 2191 | } |
aoqi@0 | 2192 | |
aoqi@0 | 2193 | // Now a place to save return value or as a temporary for any gpr -> fpr moves |
aoqi@0 | 2194 | stack_slots += 2; |
aoqi@0 | 2195 | |
aoqi@0 | 2196 | // Ok The space we have allocated will look like: |
aoqi@0 | 2197 | // |
aoqi@0 | 2198 | // |
aoqi@0 | 2199 | // FP-> | | |
aoqi@0 | 2200 | // |---------------------| |
aoqi@0 | 2201 | // | 2 slots for moves | |
aoqi@0 | 2202 | // |---------------------| |
aoqi@0 | 2203 | // | lock box (if sync) | |
aoqi@0 | 2204 | // |---------------------| <- lock_slot_offset |
aoqi@0 | 2205 | // | klass (if static) | |
aoqi@0 | 2206 | // |---------------------| <- klass_slot_offset |
aoqi@0 | 2207 | // | oopHandle area | |
aoqi@0 | 2208 | // |---------------------| <- oop_handle_offset |
aoqi@0 | 2209 | // | outbound memory | |
aoqi@0 | 2210 | // | based arguments | |
aoqi@0 | 2211 | // | | |
aoqi@0 | 2212 | // |---------------------| |
aoqi@0 | 2213 | // | vararg area | |
aoqi@0 | 2214 | // |---------------------| |
aoqi@0 | 2215 | // | | |
aoqi@0 | 2216 | // SP-> | out_preserved_slots | |
aoqi@0 | 2217 | // |
aoqi@0 | 2218 | // |
aoqi@0 | 2219 | |
aoqi@0 | 2220 | |
aoqi@0 | 2221 | // Now compute actual number of stack words we need rounding to make |
aoqi@0 | 2222 | // stack properly aligned. |
aoqi@0 | 2223 | stack_slots = round_to(stack_slots, 2 * VMRegImpl::slots_per_word); |
aoqi@0 | 2224 | |
aoqi@0 | 2225 | int stack_size = stack_slots * VMRegImpl::stack_slot_size; |
aoqi@0 | 2226 | |
aoqi@0 | 2227 | // Generate stack overflow check before creating frame |
aoqi@0 | 2228 | __ generate_stack_overflow_check(stack_size); |
aoqi@0 | 2229 | |
aoqi@0 | 2230 | // Generate a new frame for the wrapper. |
aoqi@0 | 2231 | __ save(SP, -stack_size, SP); |
aoqi@0 | 2232 | |
aoqi@0 | 2233 | int frame_complete = ((intptr_t)__ pc()) - start; |
aoqi@0 | 2234 | |
aoqi@0 | 2235 | __ verify_thread(); |
aoqi@0 | 2236 | |
aoqi@0 | 2237 | if (is_critical_native) { |
aoqi@0 | 2238 | check_needs_gc_for_critical_native(masm, stack_slots, total_in_args, |
aoqi@0 | 2239 | oop_handle_offset, oop_maps, in_regs, in_sig_bt); |
aoqi@0 | 2240 | } |
aoqi@0 | 2241 | |
aoqi@0 | 2242 | // |
aoqi@0 | 2243 | // We immediately shuffle the arguments so that any vm call we have to |
aoqi@0 | 2244 | // make from here on out (sync slow path, jvmti, etc.) we will have |
aoqi@0 | 2245 | // captured the oops from our caller and have a valid oopMap for |
aoqi@0 | 2246 | // them. |
aoqi@0 | 2247 | |
aoqi@0 | 2248 | // ----------------- |
aoqi@0 | 2249 | // The Grand Shuffle |
aoqi@0 | 2250 | // |
aoqi@0 | 2251 | // Natives require 1 or 2 extra arguments over the normal ones: the JNIEnv* |
aoqi@0 | 2252 | // (derived from JavaThread* which is in L7_thread_cache) and, if static, |
aoqi@0 | 2253 | // the class mirror instead of a receiver. This pretty much guarantees that |
aoqi@0 | 2254 | // register layout will not match. We ignore these extra arguments during |
aoqi@0 | 2255 | // the shuffle. The shuffle is described by the two calling convention |
aoqi@0 | 2256 | // vectors we have in our possession. We simply walk the java vector to |
aoqi@0 | 2257 | // get the source locations and the c vector to get the destinations. |
aoqi@0 | 2258 | // Because we have a new window and the argument registers are completely |
aoqi@0 | 2259 | // disjoint ( I0 -> O1, I1 -> O2, ...) we have nothing to worry about |
aoqi@0 | 2260 | // here. |
aoqi@0 | 2261 | |
aoqi@0 | 2262 | // This is a trick. We double the stack slots so we can claim |
aoqi@0 | 2263 | // the oops in the caller's frame. Since we are sure to have |
aoqi@0 | 2264 | // more args than the caller doubling is enough to make |
aoqi@0 | 2265 | // sure we can capture all the incoming oop args from the |
aoqi@0 | 2266 | // caller. |
aoqi@0 | 2267 | // |
aoqi@0 | 2268 | OopMap* map = new OopMap(stack_slots * 2, 0 /* arg_slots*/); |
aoqi@0 | 2269 | // Record sp-based slot for receiver on stack for non-static methods |
aoqi@0 | 2270 | int receiver_offset = -1; |
aoqi@0 | 2271 | |
aoqi@0 | 2272 | // We move the arguments backward because the floating point registers |
aoqi@0 | 2273 | // destination will always be to a register with a greater or equal register |
aoqi@0 | 2274 | // number or the stack. |
aoqi@0 | 2275 | |
aoqi@0 | 2276 | #ifdef ASSERT |
aoqi@0 | 2277 | bool reg_destroyed[RegisterImpl::number_of_registers]; |
aoqi@0 | 2278 | bool freg_destroyed[FloatRegisterImpl::number_of_registers]; |
aoqi@0 | 2279 | for ( int r = 0 ; r < RegisterImpl::number_of_registers ; r++ ) { |
aoqi@0 | 2280 | reg_destroyed[r] = false; |
aoqi@0 | 2281 | } |
aoqi@0 | 2282 | for ( int f = 0 ; f < FloatRegisterImpl::number_of_registers ; f++ ) { |
aoqi@0 | 2283 | freg_destroyed[f] = false; |
aoqi@0 | 2284 | } |
aoqi@0 | 2285 | |
aoqi@0 | 2286 | #endif /* ASSERT */ |
aoqi@0 | 2287 | |
aoqi@0 | 2288 | for ( int i = total_in_args - 1, c_arg = total_c_args - 1; i >= 0 ; i--, c_arg-- ) { |
aoqi@0 | 2289 | |
aoqi@0 | 2290 | #ifdef ASSERT |
aoqi@0 | 2291 | if (in_regs[i].first()->is_Register()) { |
aoqi@0 | 2292 | assert(!reg_destroyed[in_regs[i].first()->as_Register()->encoding()], "ack!"); |
aoqi@0 | 2293 | } else if (in_regs[i].first()->is_FloatRegister()) { |
aoqi@0 | 2294 | assert(!freg_destroyed[in_regs[i].first()->as_FloatRegister()->encoding(FloatRegisterImpl::S)], "ack!"); |
aoqi@0 | 2295 | } |
aoqi@0 | 2296 | if (out_regs[c_arg].first()->is_Register()) { |
aoqi@0 | 2297 | reg_destroyed[out_regs[c_arg].first()->as_Register()->encoding()] = true; |
aoqi@0 | 2298 | } else if (out_regs[c_arg].first()->is_FloatRegister()) { |
aoqi@0 | 2299 | freg_destroyed[out_regs[c_arg].first()->as_FloatRegister()->encoding(FloatRegisterImpl::S)] = true; |
aoqi@0 | 2300 | } |
aoqi@0 | 2301 | #endif /* ASSERT */ |
aoqi@0 | 2302 | |
aoqi@0 | 2303 | switch (in_sig_bt[i]) { |
aoqi@0 | 2304 | case T_ARRAY: |
aoqi@0 | 2305 | if (is_critical_native) { |
aoqi@0 | 2306 | unpack_array_argument(masm, in_regs[i], in_elem_bt[i], out_regs[c_arg], out_regs[c_arg - 1]); |
aoqi@0 | 2307 | c_arg--; |
aoqi@0 | 2308 | break; |
aoqi@0 | 2309 | } |
aoqi@0 | 2310 | case T_OBJECT: |
aoqi@0 | 2311 | assert(!is_critical_native, "no oop arguments"); |
aoqi@0 | 2312 | object_move(masm, map, oop_handle_offset, stack_slots, in_regs[i], out_regs[c_arg], |
aoqi@0 | 2313 | ((i == 0) && (!is_static)), |
aoqi@0 | 2314 | &receiver_offset); |
aoqi@0 | 2315 | break; |
aoqi@0 | 2316 | case T_VOID: |
aoqi@0 | 2317 | break; |
aoqi@0 | 2318 | |
aoqi@0 | 2319 | case T_FLOAT: |
aoqi@0 | 2320 | float_move(masm, in_regs[i], out_regs[c_arg]); |
aoqi@0 | 2321 | break; |
aoqi@0 | 2322 | |
aoqi@0 | 2323 | case T_DOUBLE: |
aoqi@0 | 2324 | assert( i + 1 < total_in_args && |
aoqi@0 | 2325 | in_sig_bt[i + 1] == T_VOID && |
aoqi@0 | 2326 | out_sig_bt[c_arg+1] == T_VOID, "bad arg list"); |
aoqi@0 | 2327 | double_move(masm, in_regs[i], out_regs[c_arg]); |
aoqi@0 | 2328 | break; |
aoqi@0 | 2329 | |
aoqi@0 | 2330 | case T_LONG : |
aoqi@0 | 2331 | long_move(masm, in_regs[i], out_regs[c_arg]); |
aoqi@0 | 2332 | break; |
aoqi@0 | 2333 | |
aoqi@0 | 2334 | case T_ADDRESS: assert(false, "found T_ADDRESS in java args"); |
aoqi@0 | 2335 | |
aoqi@0 | 2336 | default: |
aoqi@0 | 2337 | move32_64(masm, in_regs[i], out_regs[c_arg]); |
aoqi@0 | 2338 | } |
aoqi@0 | 2339 | } |
aoqi@0 | 2340 | |
aoqi@0 | 2341 | // Pre-load a static method's oop into O1. Used both by locking code and |
aoqi@0 | 2342 | // the normal JNI call code. |
aoqi@0 | 2343 | if (method->is_static() && !is_critical_native) { |
aoqi@0 | 2344 | __ set_oop_constant(JNIHandles::make_local(method->method_holder()->java_mirror()), O1); |
aoqi@0 | 2345 | |
aoqi@0 | 2346 | // Now handlize the static class mirror in O1. It's known not-null. |
aoqi@0 | 2347 | __ st_ptr(O1, SP, klass_offset + STACK_BIAS); |
aoqi@0 | 2348 | map->set_oop(VMRegImpl::stack2reg(klass_slot_offset)); |
aoqi@0 | 2349 | __ add(SP, klass_offset + STACK_BIAS, O1); |
aoqi@0 | 2350 | } |
aoqi@0 | 2351 | |
aoqi@0 | 2352 | |
aoqi@0 | 2353 | const Register L6_handle = L6; |
aoqi@0 | 2354 | |
aoqi@0 | 2355 | if (method->is_synchronized()) { |
aoqi@0 | 2356 | assert(!is_critical_native, "unhandled"); |
aoqi@0 | 2357 | __ mov(O1, L6_handle); |
aoqi@0 | 2358 | } |
aoqi@0 | 2359 | |
aoqi@0 | 2360 | // We have all of the arguments setup at this point. We MUST NOT touch any Oregs |
aoqi@0 | 2361 | // except O6/O7. So if we must call out we must push a new frame. We immediately |
aoqi@0 | 2362 | // push a new frame and flush the windows. |
aoqi@0 | 2363 | #ifdef _LP64 |
aoqi@0 | 2364 | intptr_t thepc = (intptr_t) __ pc(); |
aoqi@0 | 2365 | { |
aoqi@0 | 2366 | address here = __ pc(); |
aoqi@0 | 2367 | // Call the next instruction |
aoqi@0 | 2368 | __ call(here + 8, relocInfo::none); |
aoqi@0 | 2369 | __ delayed()->nop(); |
aoqi@0 | 2370 | } |
aoqi@0 | 2371 | #else |
aoqi@0 | 2372 | intptr_t thepc = __ load_pc_address(O7, 0); |
aoqi@0 | 2373 | #endif /* _LP64 */ |
aoqi@0 | 2374 | |
aoqi@0 | 2375 | // We use the same pc/oopMap repeatedly when we call out |
aoqi@0 | 2376 | oop_maps->add_gc_map(thepc - start, map); |
aoqi@0 | 2377 | |
aoqi@0 | 2378 | // O7 now has the pc loaded that we will use when we finally call to native. |
aoqi@0 | 2379 | |
aoqi@0 | 2380 | // Save thread in L7; it crosses a bunch of VM calls below |
aoqi@0 | 2381 | // Don't use save_thread because it smashes G2 and we merely |
aoqi@0 | 2382 | // want to save a copy |
aoqi@0 | 2383 | __ mov(G2_thread, L7_thread_cache); |
aoqi@0 | 2384 | |
aoqi@0 | 2385 | |
aoqi@0 | 2386 | // If we create an inner frame once is plenty |
aoqi@0 | 2387 | // when we create it we must also save G2_thread |
aoqi@0 | 2388 | bool inner_frame_created = false; |
aoqi@0 | 2389 | |
aoqi@0 | 2390 | // dtrace method entry support |
aoqi@0 | 2391 | { |
aoqi@0 | 2392 | SkipIfEqual skip_if( |
aoqi@0 | 2393 | masm, G3_scratch, &DTraceMethodProbes, Assembler::zero); |
aoqi@0 | 2394 | // create inner frame |
aoqi@0 | 2395 | __ save_frame(0); |
aoqi@0 | 2396 | __ mov(G2_thread, L7_thread_cache); |
aoqi@0 | 2397 | __ set_metadata_constant(method(), O1); |
aoqi@0 | 2398 | __ call_VM_leaf(L7_thread_cache, |
aoqi@0 | 2399 | CAST_FROM_FN_PTR(address, SharedRuntime::dtrace_method_entry), |
aoqi@0 | 2400 | G2_thread, O1); |
aoqi@0 | 2401 | __ restore(); |
aoqi@0 | 2402 | } |
aoqi@0 | 2403 | |
aoqi@0 | 2404 | // RedefineClasses() tracing support for obsolete method entry |
aoqi@0 | 2405 | if (RC_TRACE_IN_RANGE(0x00001000, 0x00002000)) { |
aoqi@0 | 2406 | // create inner frame |
aoqi@0 | 2407 | __ save_frame(0); |
aoqi@0 | 2408 | __ mov(G2_thread, L7_thread_cache); |
aoqi@0 | 2409 | __ set_metadata_constant(method(), O1); |
aoqi@0 | 2410 | __ call_VM_leaf(L7_thread_cache, |
aoqi@0 | 2411 | CAST_FROM_FN_PTR(address, SharedRuntime::rc_trace_method_entry), |
aoqi@0 | 2412 | G2_thread, O1); |
aoqi@0 | 2413 | __ restore(); |
aoqi@0 | 2414 | } |
aoqi@0 | 2415 | |
aoqi@0 | 2416 | // We are in the jni frame unless saved_frame is true in which case |
aoqi@0 | 2417 | // we are in one frame deeper (the "inner" frame). If we are in the |
aoqi@0 | 2418 | // "inner" frames the args are in the Iregs and if the jni frame then |
aoqi@0 | 2419 | // they are in the Oregs. |
aoqi@0 | 2420 | // If we ever need to go to the VM (for locking, jvmti) then |
aoqi@0 | 2421 | // we will always be in the "inner" frame. |
aoqi@0 | 2422 | |
aoqi@0 | 2423 | // Lock a synchronized method |
aoqi@0 | 2424 | int lock_offset = -1; // Set if locked |
aoqi@0 | 2425 | if (method->is_synchronized()) { |
aoqi@0 | 2426 | Register Roop = O1; |
aoqi@0 | 2427 | const Register L3_box = L3; |
aoqi@0 | 2428 | |
aoqi@0 | 2429 | create_inner_frame(masm, &inner_frame_created); |
aoqi@0 | 2430 | |
aoqi@0 | 2431 | __ ld_ptr(I1, 0, O1); |
aoqi@0 | 2432 | Label done; |
aoqi@0 | 2433 | |
aoqi@0 | 2434 | lock_offset = (lock_slot_offset * VMRegImpl::stack_slot_size); |
aoqi@0 | 2435 | __ add(FP, lock_offset+STACK_BIAS, L3_box); |
aoqi@0 | 2436 | #ifdef ASSERT |
aoqi@0 | 2437 | if (UseBiasedLocking) { |
aoqi@0 | 2438 | // making the box point to itself will make it clear it went unused |
aoqi@0 | 2439 | // but also be obviously invalid |
aoqi@0 | 2440 | __ st_ptr(L3_box, L3_box, 0); |
aoqi@0 | 2441 | } |
aoqi@0 | 2442 | #endif // ASSERT |
aoqi@0 | 2443 | // |
aoqi@0 | 2444 | // Compiler_lock_object (Roop, Rmark, Rbox, Rscratch) -- kills Rmark, Rbox, Rscratch |
aoqi@0 | 2445 | // |
aoqi@0 | 2446 | __ compiler_lock_object(Roop, L1, L3_box, L2); |
aoqi@0 | 2447 | __ br(Assembler::equal, false, Assembler::pt, done); |
aoqi@0 | 2448 | __ delayed() -> add(FP, lock_offset+STACK_BIAS, L3_box); |
aoqi@0 | 2449 | |
aoqi@0 | 2450 | |
aoqi@0 | 2451 | // None of the above fast optimizations worked so we have to get into the |
aoqi@0 | 2452 | // slow case of monitor enter. Inline a special case of call_VM that |
aoqi@0 | 2453 | // disallows any pending_exception. |
aoqi@0 | 2454 | __ mov(Roop, O0); // Need oop in O0 |
aoqi@0 | 2455 | __ mov(L3_box, O1); |
aoqi@0 | 2456 | |
aoqi@0 | 2457 | // Record last_Java_sp, in case the VM code releases the JVM lock. |
aoqi@0 | 2458 | |
aoqi@0 | 2459 | __ set_last_Java_frame(FP, I7); |
aoqi@0 | 2460 | |
aoqi@0 | 2461 | // do the call |
aoqi@0 | 2462 | __ call(CAST_FROM_FN_PTR(address, SharedRuntime::complete_monitor_locking_C), relocInfo::runtime_call_type); |
aoqi@0 | 2463 | __ delayed()->mov(L7_thread_cache, O2); |
aoqi@0 | 2464 | |
aoqi@0 | 2465 | __ restore_thread(L7_thread_cache); // restore G2_thread |
aoqi@0 | 2466 | __ reset_last_Java_frame(); |
aoqi@0 | 2467 | |
aoqi@0 | 2468 | #ifdef ASSERT |
aoqi@0 | 2469 | { Label L; |
aoqi@0 | 2470 | __ ld_ptr(G2_thread, in_bytes(Thread::pending_exception_offset()), O0); |
aoqi@0 | 2471 | __ br_null_short(O0, Assembler::pt, L); |
aoqi@0 | 2472 | __ stop("no pending exception allowed on exit from IR::monitorenter"); |
aoqi@0 | 2473 | __ bind(L); |
aoqi@0 | 2474 | } |
aoqi@0 | 2475 | #endif |
aoqi@0 | 2476 | __ bind(done); |
aoqi@0 | 2477 | } |
aoqi@0 | 2478 | |
aoqi@0 | 2479 | |
aoqi@0 | 2480 | // Finally just about ready to make the JNI call |
aoqi@0 | 2481 | |
aoqi@0 | 2482 | __ flushw(); |
aoqi@0 | 2483 | if (inner_frame_created) { |
aoqi@0 | 2484 | __ restore(); |
aoqi@0 | 2485 | } else { |
aoqi@0 | 2486 | // Store only what we need from this frame |
aoqi@0 | 2487 | // QQQ I think that non-v9 (like we care) we don't need these saves |
aoqi@0 | 2488 | // either as the flush traps and the current window goes too. |
aoqi@0 | 2489 | __ st_ptr(FP, SP, FP->sp_offset_in_saved_window()*wordSize + STACK_BIAS); |
aoqi@0 | 2490 | __ st_ptr(I7, SP, I7->sp_offset_in_saved_window()*wordSize + STACK_BIAS); |
aoqi@0 | 2491 | } |
aoqi@0 | 2492 | |
aoqi@0 | 2493 | // get JNIEnv* which is first argument to native |
aoqi@0 | 2494 | if (!is_critical_native) { |
aoqi@0 | 2495 | __ add(G2_thread, in_bytes(JavaThread::jni_environment_offset()), O0); |
aoqi@0 | 2496 | } |
aoqi@0 | 2497 | |
aoqi@0 | 2498 | // Use that pc we placed in O7 a while back as the current frame anchor |
aoqi@0 | 2499 | __ set_last_Java_frame(SP, O7); |
aoqi@0 | 2500 | |
aoqi@0 | 2501 | // We flushed the windows ages ago now mark them as flushed before transitioning. |
aoqi@0 | 2502 | __ set(JavaFrameAnchor::flushed, G3_scratch); |
aoqi@0 | 2503 | __ st(G3_scratch, G2_thread, JavaThread::frame_anchor_offset() + JavaFrameAnchor::flags_offset()); |
aoqi@0 | 2504 | |
aoqi@0 | 2505 | // Transition from _thread_in_Java to _thread_in_native. |
aoqi@0 | 2506 | __ set(_thread_in_native, G3_scratch); |
aoqi@0 | 2507 | |
aoqi@0 | 2508 | #ifdef _LP64 |
aoqi@0 | 2509 | AddressLiteral dest(native_func); |
aoqi@0 | 2510 | __ relocate(relocInfo::runtime_call_type); |
aoqi@0 | 2511 | __ jumpl_to(dest, O7, O7); |
aoqi@0 | 2512 | #else |
aoqi@0 | 2513 | __ call(native_func, relocInfo::runtime_call_type); |
aoqi@0 | 2514 | #endif |
aoqi@0 | 2515 | __ delayed()->st(G3_scratch, G2_thread, JavaThread::thread_state_offset()); |
aoqi@0 | 2516 | |
aoqi@0 | 2517 | __ restore_thread(L7_thread_cache); // restore G2_thread |
aoqi@0 | 2518 | |
aoqi@0 | 2519 | // Unpack native results. For int-types, we do any needed sign-extension |
aoqi@0 | 2520 | // and move things into I0. The return value there will survive any VM |
aoqi@0 | 2521 | // calls for blocking or unlocking. An FP or OOP result (handle) is done |
aoqi@0 | 2522 | // specially in the slow-path code. |
aoqi@0 | 2523 | switch (ret_type) { |
aoqi@0 | 2524 | case T_VOID: break; // Nothing to do! |
aoqi@0 | 2525 | case T_FLOAT: break; // Got it where we want it (unless slow-path) |
aoqi@0 | 2526 | case T_DOUBLE: break; // Got it where we want it (unless slow-path) |
aoqi@0 | 2527 | // In 64 bits build result is in O0, in O0, O1 in 32bit build |
aoqi@0 | 2528 | case T_LONG: |
aoqi@0 | 2529 | #ifndef _LP64 |
aoqi@0 | 2530 | __ mov(O1, I1); |
aoqi@0 | 2531 | #endif |
aoqi@0 | 2532 | // Fall thru |
aoqi@0 | 2533 | case T_OBJECT: // Really a handle |
aoqi@0 | 2534 | case T_ARRAY: |
aoqi@0 | 2535 | case T_INT: |
aoqi@0 | 2536 | __ mov(O0, I0); |
aoqi@0 | 2537 | break; |
aoqi@0 | 2538 | case T_BOOLEAN: __ subcc(G0, O0, G0); __ addc(G0, 0, I0); break; // !0 => true; 0 => false |
aoqi@0 | 2539 | case T_BYTE : __ sll(O0, 24, O0); __ sra(O0, 24, I0); break; |
aoqi@0 | 2540 | case T_CHAR : __ sll(O0, 16, O0); __ srl(O0, 16, I0); break; // cannot use and3, 0xFFFF too big as immediate value! |
aoqi@0 | 2541 | case T_SHORT : __ sll(O0, 16, O0); __ sra(O0, 16, I0); break; |
aoqi@0 | 2542 | break; // Cannot de-handlize until after reclaiming jvm_lock |
aoqi@0 | 2543 | default: |
aoqi@0 | 2544 | ShouldNotReachHere(); |
aoqi@0 | 2545 | } |
aoqi@0 | 2546 | |
aoqi@0 | 2547 | Label after_transition; |
aoqi@0 | 2548 | // must we block? |
aoqi@0 | 2549 | |
aoqi@0 | 2550 | // Block, if necessary, before resuming in _thread_in_Java state. |
aoqi@0 | 2551 | // In order for GC to work, don't clear the last_Java_sp until after blocking. |
aoqi@0 | 2552 | { Label no_block; |
aoqi@0 | 2553 | AddressLiteral sync_state(SafepointSynchronize::address_of_state()); |
aoqi@0 | 2554 | |
aoqi@0 | 2555 | // Switch thread to "native transition" state before reading the synchronization state. |
aoqi@0 | 2556 | // This additional state is necessary because reading and testing the synchronization |
aoqi@0 | 2557 | // state is not atomic w.r.t. GC, as this scenario demonstrates: |
aoqi@0 | 2558 | // Java thread A, in _thread_in_native state, loads _not_synchronized and is preempted. |
aoqi@0 | 2559 | // VM thread changes sync state to synchronizing and suspends threads for GC. |
aoqi@0 | 2560 | // Thread A is resumed to finish this native method, but doesn't block here since it |
aoqi@0 | 2561 | // didn't see any synchronization is progress, and escapes. |
aoqi@0 | 2562 | __ set(_thread_in_native_trans, G3_scratch); |
aoqi@0 | 2563 | __ st(G3_scratch, G2_thread, JavaThread::thread_state_offset()); |
aoqi@0 | 2564 | if(os::is_MP()) { |
aoqi@0 | 2565 | if (UseMembar) { |
aoqi@0 | 2566 | // Force this write out before the read below |
aoqi@0 | 2567 | __ membar(Assembler::StoreLoad); |
aoqi@0 | 2568 | } else { |
aoqi@0 | 2569 | // Write serialization page so VM thread can do a pseudo remote membar. |
aoqi@0 | 2570 | // We use the current thread pointer to calculate a thread specific |
aoqi@0 | 2571 | // offset to write to within the page. This minimizes bus traffic |
aoqi@0 | 2572 | // due to cache line collision. |
aoqi@0 | 2573 | __ serialize_memory(G2_thread, G1_scratch, G3_scratch); |
aoqi@0 | 2574 | } |
aoqi@0 | 2575 | } |
aoqi@0 | 2576 | __ load_contents(sync_state, G3_scratch); |
aoqi@0 | 2577 | __ cmp(G3_scratch, SafepointSynchronize::_not_synchronized); |
aoqi@0 | 2578 | |
aoqi@0 | 2579 | Label L; |
aoqi@0 | 2580 | Address suspend_state(G2_thread, JavaThread::suspend_flags_offset()); |
aoqi@0 | 2581 | __ br(Assembler::notEqual, false, Assembler::pn, L); |
aoqi@0 | 2582 | __ delayed()->ld(suspend_state, G3_scratch); |
aoqi@0 | 2583 | __ cmp_and_br_short(G3_scratch, 0, Assembler::equal, Assembler::pt, no_block); |
aoqi@0 | 2584 | __ bind(L); |
aoqi@0 | 2585 | |
aoqi@0 | 2586 | // Block. Save any potential method result value before the operation and |
aoqi@0 | 2587 | // use a leaf call to leave the last_Java_frame setup undisturbed. Doing this |
aoqi@0 | 2588 | // lets us share the oopMap we used when we went native rather the create |
aoqi@0 | 2589 | // a distinct one for this pc |
aoqi@0 | 2590 | // |
aoqi@0 | 2591 | save_native_result(masm, ret_type, stack_slots); |
aoqi@0 | 2592 | if (!is_critical_native) { |
aoqi@0 | 2593 | __ call_VM_leaf(L7_thread_cache, |
aoqi@0 | 2594 | CAST_FROM_FN_PTR(address, JavaThread::check_special_condition_for_native_trans), |
aoqi@0 | 2595 | G2_thread); |
aoqi@0 | 2596 | } else { |
aoqi@0 | 2597 | __ call_VM_leaf(L7_thread_cache, |
aoqi@0 | 2598 | CAST_FROM_FN_PTR(address, JavaThread::check_special_condition_for_native_trans_and_transition), |
aoqi@0 | 2599 | G2_thread); |
aoqi@0 | 2600 | } |
aoqi@0 | 2601 | |
aoqi@0 | 2602 | // Restore any method result value |
aoqi@0 | 2603 | restore_native_result(masm, ret_type, stack_slots); |
aoqi@0 | 2604 | |
aoqi@0 | 2605 | if (is_critical_native) { |
aoqi@0 | 2606 | // The call above performed the transition to thread_in_Java so |
aoqi@0 | 2607 | // skip the transition logic below. |
aoqi@0 | 2608 | __ ba(after_transition); |
aoqi@0 | 2609 | __ delayed()->nop(); |
aoqi@0 | 2610 | } |
aoqi@0 | 2611 | |
aoqi@0 | 2612 | __ bind(no_block); |
aoqi@0 | 2613 | } |
aoqi@0 | 2614 | |
aoqi@0 | 2615 | // thread state is thread_in_native_trans. Any safepoint blocking has already |
aoqi@0 | 2616 | // happened so we can now change state to _thread_in_Java. |
aoqi@0 | 2617 | __ set(_thread_in_Java, G3_scratch); |
aoqi@0 | 2618 | __ st(G3_scratch, G2_thread, JavaThread::thread_state_offset()); |
aoqi@0 | 2619 | __ bind(after_transition); |
aoqi@0 | 2620 | |
aoqi@0 | 2621 | Label no_reguard; |
aoqi@0 | 2622 | __ ld(G2_thread, JavaThread::stack_guard_state_offset(), G3_scratch); |
aoqi@0 | 2623 | __ cmp_and_br_short(G3_scratch, JavaThread::stack_guard_yellow_disabled, Assembler::notEqual, Assembler::pt, no_reguard); |
aoqi@0 | 2624 | |
aoqi@0 | 2625 | save_native_result(masm, ret_type, stack_slots); |
aoqi@0 | 2626 | __ call(CAST_FROM_FN_PTR(address, SharedRuntime::reguard_yellow_pages)); |
aoqi@0 | 2627 | __ delayed()->nop(); |
aoqi@0 | 2628 | |
aoqi@0 | 2629 | __ restore_thread(L7_thread_cache); // restore G2_thread |
aoqi@0 | 2630 | restore_native_result(masm, ret_type, stack_slots); |
aoqi@0 | 2631 | |
aoqi@0 | 2632 | __ bind(no_reguard); |
aoqi@0 | 2633 | |
aoqi@0 | 2634 | // Handle possible exception (will unlock if necessary) |
aoqi@0 | 2635 | |
aoqi@0 | 2636 | // native result if any is live in freg or I0 (and I1 if long and 32bit vm) |
aoqi@0 | 2637 | |
aoqi@0 | 2638 | // Unlock |
aoqi@0 | 2639 | if (method->is_synchronized()) { |
aoqi@0 | 2640 | Label done; |
aoqi@0 | 2641 | Register I2_ex_oop = I2; |
aoqi@0 | 2642 | const Register L3_box = L3; |
aoqi@0 | 2643 | // Get locked oop from the handle we passed to jni |
aoqi@0 | 2644 | __ ld_ptr(L6_handle, 0, L4); |
aoqi@0 | 2645 | __ add(SP, lock_offset+STACK_BIAS, L3_box); |
aoqi@0 | 2646 | // Must save pending exception around the slow-path VM call. Since it's a |
aoqi@0 | 2647 | // leaf call, the pending exception (if any) can be kept in a register. |
aoqi@0 | 2648 | __ ld_ptr(G2_thread, in_bytes(Thread::pending_exception_offset()), I2_ex_oop); |
aoqi@0 | 2649 | // Now unlock |
aoqi@0 | 2650 | // (Roop, Rmark, Rbox, Rscratch) |
aoqi@0 | 2651 | __ compiler_unlock_object(L4, L1, L3_box, L2); |
aoqi@0 | 2652 | __ br(Assembler::equal, false, Assembler::pt, done); |
aoqi@0 | 2653 | __ delayed()-> add(SP, lock_offset+STACK_BIAS, L3_box); |
aoqi@0 | 2654 | |
aoqi@0 | 2655 | // save and restore any potential method result value around the unlocking |
aoqi@0 | 2656 | // operation. Will save in I0 (or stack for FP returns). |
aoqi@0 | 2657 | save_native_result(masm, ret_type, stack_slots); |
aoqi@0 | 2658 | |
aoqi@0 | 2659 | // Must clear pending-exception before re-entering the VM. Since this is |
aoqi@0 | 2660 | // a leaf call, pending-exception-oop can be safely kept in a register. |
aoqi@0 | 2661 | __ st_ptr(G0, G2_thread, in_bytes(Thread::pending_exception_offset())); |
aoqi@0 | 2662 | |
aoqi@0 | 2663 | // slow case of monitor enter. Inline a special case of call_VM that |
aoqi@0 | 2664 | // disallows any pending_exception. |
aoqi@0 | 2665 | __ mov(L3_box, O1); |
aoqi@0 | 2666 | |
aoqi@0 | 2667 | __ call(CAST_FROM_FN_PTR(address, SharedRuntime::complete_monitor_unlocking_C), relocInfo::runtime_call_type); |
aoqi@0 | 2668 | __ delayed()->mov(L4, O0); // Need oop in O0 |
aoqi@0 | 2669 | |
aoqi@0 | 2670 | __ restore_thread(L7_thread_cache); // restore G2_thread |
aoqi@0 | 2671 | |
aoqi@0 | 2672 | #ifdef ASSERT |
aoqi@0 | 2673 | { Label L; |
aoqi@0 | 2674 | __ ld_ptr(G2_thread, in_bytes(Thread::pending_exception_offset()), O0); |
aoqi@0 | 2675 | __ br_null_short(O0, Assembler::pt, L); |
aoqi@0 | 2676 | __ stop("no pending exception allowed on exit from IR::monitorexit"); |
aoqi@0 | 2677 | __ bind(L); |
aoqi@0 | 2678 | } |
aoqi@0 | 2679 | #endif |
aoqi@0 | 2680 | restore_native_result(masm, ret_type, stack_slots); |
aoqi@0 | 2681 | // check_forward_pending_exception jump to forward_exception if any pending |
aoqi@0 | 2682 | // exception is set. The forward_exception routine expects to see the |
aoqi@0 | 2683 | // exception in pending_exception and not in a register. Kind of clumsy, |
aoqi@0 | 2684 | // since all folks who branch to forward_exception must have tested |
aoqi@0 | 2685 | // pending_exception first and hence have it in a register already. |
aoqi@0 | 2686 | __ st_ptr(I2_ex_oop, G2_thread, in_bytes(Thread::pending_exception_offset())); |
aoqi@0 | 2687 | __ bind(done); |
aoqi@0 | 2688 | } |
aoqi@0 | 2689 | |
aoqi@0 | 2690 | // Tell dtrace about this method exit |
aoqi@0 | 2691 | { |
aoqi@0 | 2692 | SkipIfEqual skip_if( |
aoqi@0 | 2693 | masm, G3_scratch, &DTraceMethodProbes, Assembler::zero); |
aoqi@0 | 2694 | save_native_result(masm, ret_type, stack_slots); |
aoqi@0 | 2695 | __ set_metadata_constant(method(), O1); |
aoqi@0 | 2696 | __ call_VM_leaf(L7_thread_cache, |
aoqi@0 | 2697 | CAST_FROM_FN_PTR(address, SharedRuntime::dtrace_method_exit), |
aoqi@0 | 2698 | G2_thread, O1); |
aoqi@0 | 2699 | restore_native_result(masm, ret_type, stack_slots); |
aoqi@0 | 2700 | } |
aoqi@0 | 2701 | |
aoqi@0 | 2702 | // Clear "last Java frame" SP and PC. |
aoqi@0 | 2703 | __ verify_thread(); // G2_thread must be correct |
aoqi@0 | 2704 | __ reset_last_Java_frame(); |
aoqi@0 | 2705 | |
aoqi@0 | 2706 | // Unpack oop result |
aoqi@0 | 2707 | if (ret_type == T_OBJECT || ret_type == T_ARRAY) { |
aoqi@0 | 2708 | Label L; |
aoqi@0 | 2709 | __ addcc(G0, I0, G0); |
aoqi@0 | 2710 | __ brx(Assembler::notZero, true, Assembler::pt, L); |
aoqi@0 | 2711 | __ delayed()->ld_ptr(I0, 0, I0); |
aoqi@0 | 2712 | __ mov(G0, I0); |
aoqi@0 | 2713 | __ bind(L); |
aoqi@0 | 2714 | __ verify_oop(I0); |
aoqi@0 | 2715 | } |
aoqi@0 | 2716 | |
aoqi@0 | 2717 | if (!is_critical_native) { |
aoqi@0 | 2718 | // reset handle block |
aoqi@0 | 2719 | __ ld_ptr(G2_thread, in_bytes(JavaThread::active_handles_offset()), L5); |
aoqi@0 | 2720 | __ st(G0, L5, JNIHandleBlock::top_offset_in_bytes()); |
aoqi@0 | 2721 | |
aoqi@0 | 2722 | __ ld_ptr(G2_thread, in_bytes(Thread::pending_exception_offset()), G3_scratch); |
aoqi@0 | 2723 | check_forward_pending_exception(masm, G3_scratch); |
aoqi@0 | 2724 | } |
aoqi@0 | 2725 | |
aoqi@0 | 2726 | |
aoqi@0 | 2727 | // Return |
aoqi@0 | 2728 | |
aoqi@0 | 2729 | #ifndef _LP64 |
aoqi@0 | 2730 | if (ret_type == T_LONG) { |
aoqi@0 | 2731 | |
aoqi@0 | 2732 | // Must leave proper result in O0,O1 and G1 (c2/tiered only) |
aoqi@0 | 2733 | __ sllx(I0, 32, G1); // Shift bits into high G1 |
aoqi@0 | 2734 | __ srl (I1, 0, I1); // Zero extend O1 (harmless?) |
aoqi@0 | 2735 | __ or3 (I1, G1, G1); // OR 64 bits into G1 |
aoqi@0 | 2736 | } |
aoqi@0 | 2737 | #endif |
aoqi@0 | 2738 | |
aoqi@0 | 2739 | __ ret(); |
aoqi@0 | 2740 | __ delayed()->restore(); |
aoqi@0 | 2741 | |
aoqi@0 | 2742 | __ flush(); |
aoqi@0 | 2743 | |
aoqi@0 | 2744 | nmethod *nm = nmethod::new_native_nmethod(method, |
aoqi@0 | 2745 | compile_id, |
aoqi@0 | 2746 | masm->code(), |
aoqi@0 | 2747 | vep_offset, |
aoqi@0 | 2748 | frame_complete, |
aoqi@0 | 2749 | stack_slots / VMRegImpl::slots_per_word, |
aoqi@0 | 2750 | (is_static ? in_ByteSize(klass_offset) : in_ByteSize(receiver_offset)), |
aoqi@0 | 2751 | in_ByteSize(lock_offset), |
aoqi@0 | 2752 | oop_maps); |
aoqi@0 | 2753 | |
aoqi@0 | 2754 | if (is_critical_native) { |
aoqi@0 | 2755 | nm->set_lazy_critical_native(true); |
aoqi@0 | 2756 | } |
aoqi@0 | 2757 | return nm; |
aoqi@0 | 2758 | |
aoqi@0 | 2759 | } |
aoqi@0 | 2760 | |
aoqi@0 | 2761 | #ifdef HAVE_DTRACE_H |
aoqi@0 | 2762 | // --------------------------------------------------------------------------- |
aoqi@0 | 2763 | // Generate a dtrace nmethod for a given signature. The method takes arguments |
aoqi@0 | 2764 | // in the Java compiled code convention, marshals them to the native |
aoqi@0 | 2765 | // abi and then leaves nops at the position you would expect to call a native |
aoqi@0 | 2766 | // function. When the probe is enabled the nops are replaced with a trap |
aoqi@0 | 2767 | // instruction that dtrace inserts and the trace will cause a notification |
aoqi@0 | 2768 | // to dtrace. |
aoqi@0 | 2769 | // |
aoqi@0 | 2770 | // The probes are only able to take primitive types and java/lang/String as |
aoqi@0 | 2771 | // arguments. No other java types are allowed. Strings are converted to utf8 |
aoqi@0 | 2772 | // strings so that from dtrace point of view java strings are converted to C |
aoqi@0 | 2773 | // strings. There is an arbitrary fixed limit on the total space that a method |
aoqi@0 | 2774 | // can use for converting the strings. (256 chars per string in the signature). |
aoqi@0 | 2775 | // So any java string larger then this is truncated. |
aoqi@0 | 2776 | |
aoqi@0 | 2777 | static int fp_offset[ConcreteRegisterImpl::number_of_registers] = { 0 }; |
aoqi@0 | 2778 | static bool offsets_initialized = false; |
aoqi@0 | 2779 | |
aoqi@0 | 2780 | nmethod *SharedRuntime::generate_dtrace_nmethod( |
aoqi@0 | 2781 | MacroAssembler *masm, methodHandle method) { |
aoqi@0 | 2782 | |
aoqi@0 | 2783 | |
aoqi@0 | 2784 | // generate_dtrace_nmethod is guarded by a mutex so we are sure to |
aoqi@0 | 2785 | // be single threaded in this method. |
aoqi@0 | 2786 | assert(AdapterHandlerLibrary_lock->owned_by_self(), "must be"); |
aoqi@0 | 2787 | |
aoqi@0 | 2788 | // Fill in the signature array, for the calling-convention call. |
aoqi@0 | 2789 | int total_args_passed = method->size_of_parameters(); |
aoqi@0 | 2790 | |
aoqi@0 | 2791 | BasicType* in_sig_bt = NEW_RESOURCE_ARRAY(BasicType, total_args_passed); |
aoqi@0 | 2792 | VMRegPair *in_regs = NEW_RESOURCE_ARRAY(VMRegPair, total_args_passed); |
aoqi@0 | 2793 | |
aoqi@0 | 2794 | // The signature we are going to use for the trap that dtrace will see |
aoqi@0 | 2795 | // java/lang/String is converted. We drop "this" and any other object |
aoqi@0 | 2796 | // is converted to NULL. (A one-slot java/lang/Long object reference |
aoqi@0 | 2797 | // is converted to a two-slot long, which is why we double the allocation). |
aoqi@0 | 2798 | BasicType* out_sig_bt = NEW_RESOURCE_ARRAY(BasicType, total_args_passed * 2); |
aoqi@0 | 2799 | VMRegPair* out_regs = NEW_RESOURCE_ARRAY(VMRegPair, total_args_passed * 2); |
aoqi@0 | 2800 | |
aoqi@0 | 2801 | int i=0; |
aoqi@0 | 2802 | int total_strings = 0; |
aoqi@0 | 2803 | int first_arg_to_pass = 0; |
aoqi@0 | 2804 | int total_c_args = 0; |
aoqi@0 | 2805 | |
aoqi@0 | 2806 | // Skip the receiver as dtrace doesn't want to see it |
aoqi@0 | 2807 | if( !method->is_static() ) { |
aoqi@0 | 2808 | in_sig_bt[i++] = T_OBJECT; |
aoqi@0 | 2809 | first_arg_to_pass = 1; |
aoqi@0 | 2810 | } |
aoqi@0 | 2811 | |
aoqi@0 | 2812 | SignatureStream ss(method->signature()); |
aoqi@0 | 2813 | for ( ; !ss.at_return_type(); ss.next()) { |
aoqi@0 | 2814 | BasicType bt = ss.type(); |
aoqi@0 | 2815 | in_sig_bt[i++] = bt; // Collect remaining bits of signature |
aoqi@0 | 2816 | out_sig_bt[total_c_args++] = bt; |
aoqi@0 | 2817 | if( bt == T_OBJECT) { |
aoqi@0 | 2818 | Symbol* s = ss.as_symbol_or_null(); |
aoqi@0 | 2819 | if (s == vmSymbols::java_lang_String()) { |
aoqi@0 | 2820 | total_strings++; |
aoqi@0 | 2821 | out_sig_bt[total_c_args-1] = T_ADDRESS; |
aoqi@0 | 2822 | } else if (s == vmSymbols::java_lang_Boolean() || |
aoqi@0 | 2823 | s == vmSymbols::java_lang_Byte()) { |
aoqi@0 | 2824 | out_sig_bt[total_c_args-1] = T_BYTE; |
aoqi@0 | 2825 | } else if (s == vmSymbols::java_lang_Character() || |
aoqi@0 | 2826 | s == vmSymbols::java_lang_Short()) { |
aoqi@0 | 2827 | out_sig_bt[total_c_args-1] = T_SHORT; |
aoqi@0 | 2828 | } else if (s == vmSymbols::java_lang_Integer() || |
aoqi@0 | 2829 | s == vmSymbols::java_lang_Float()) { |
aoqi@0 | 2830 | out_sig_bt[total_c_args-1] = T_INT; |
aoqi@0 | 2831 | } else if (s == vmSymbols::java_lang_Long() || |
aoqi@0 | 2832 | s == vmSymbols::java_lang_Double()) { |
aoqi@0 | 2833 | out_sig_bt[total_c_args-1] = T_LONG; |
aoqi@0 | 2834 | out_sig_bt[total_c_args++] = T_VOID; |
aoqi@0 | 2835 | } |
aoqi@0 | 2836 | } else if ( bt == T_LONG || bt == T_DOUBLE ) { |
aoqi@0 | 2837 | in_sig_bt[i++] = T_VOID; // Longs & doubles take 2 Java slots |
aoqi@0 | 2838 | // We convert double to long |
aoqi@0 | 2839 | out_sig_bt[total_c_args-1] = T_LONG; |
aoqi@0 | 2840 | out_sig_bt[total_c_args++] = T_VOID; |
aoqi@0 | 2841 | } else if ( bt == T_FLOAT) { |
aoqi@0 | 2842 | // We convert float to int |
aoqi@0 | 2843 | out_sig_bt[total_c_args-1] = T_INT; |
aoqi@0 | 2844 | } |
aoqi@0 | 2845 | } |
aoqi@0 | 2846 | |
aoqi@0 | 2847 | assert(i==total_args_passed, "validly parsed signature"); |
aoqi@0 | 2848 | |
aoqi@0 | 2849 | // Now get the compiled-Java layout as input arguments |
aoqi@0 | 2850 | int comp_args_on_stack; |
aoqi@0 | 2851 | comp_args_on_stack = SharedRuntime::java_calling_convention( |
aoqi@0 | 2852 | in_sig_bt, in_regs, total_args_passed, false); |
aoqi@0 | 2853 | |
aoqi@0 | 2854 | // We have received a description of where all the java arg are located |
aoqi@0 | 2855 | // on entry to the wrapper. We need to convert these args to where |
aoqi@0 | 2856 | // the a native (non-jni) function would expect them. To figure out |
aoqi@0 | 2857 | // where they go we convert the java signature to a C signature and remove |
aoqi@0 | 2858 | // T_VOID for any long/double we might have received. |
aoqi@0 | 2859 | |
aoqi@0 | 2860 | |
aoqi@0 | 2861 | // Now figure out where the args must be stored and how much stack space |
aoqi@0 | 2862 | // they require (neglecting out_preserve_stack_slots but space for storing |
aoqi@0 | 2863 | // the 1st six register arguments). It's weird see int_stk_helper. |
aoqi@0 | 2864 | // |
aoqi@0 | 2865 | int out_arg_slots; |
aoqi@0 | 2866 | out_arg_slots = c_calling_convention(out_sig_bt, out_regs, NULL, total_c_args); |
aoqi@0 | 2867 | |
aoqi@0 | 2868 | // Calculate the total number of stack slots we will need. |
aoqi@0 | 2869 | |
aoqi@0 | 2870 | // First count the abi requirement plus all of the outgoing args |
aoqi@0 | 2871 | int stack_slots = SharedRuntime::out_preserve_stack_slots() + out_arg_slots; |
aoqi@0 | 2872 | |
aoqi@0 | 2873 | // Plus a temp for possible converion of float/double/long register args |
aoqi@0 | 2874 | |
aoqi@0 | 2875 | int conversion_temp = stack_slots; |
aoqi@0 | 2876 | stack_slots += 2; |
aoqi@0 | 2877 | |
aoqi@0 | 2878 | |
aoqi@0 | 2879 | // Now space for the string(s) we must convert |
aoqi@0 | 2880 | |
aoqi@0 | 2881 | int string_locs = stack_slots; |
aoqi@0 | 2882 | stack_slots += total_strings * |
aoqi@0 | 2883 | (max_dtrace_string_size / VMRegImpl::stack_slot_size); |
aoqi@0 | 2884 | |
aoqi@0 | 2885 | // Ok The space we have allocated will look like: |
aoqi@0 | 2886 | // |
aoqi@0 | 2887 | // |
aoqi@0 | 2888 | // FP-> | | |
aoqi@0 | 2889 | // |---------------------| |
aoqi@0 | 2890 | // | string[n] | |
aoqi@0 | 2891 | // |---------------------| <- string_locs[n] |
aoqi@0 | 2892 | // | string[n-1] | |
aoqi@0 | 2893 | // |---------------------| <- string_locs[n-1] |
aoqi@0 | 2894 | // | ... | |
aoqi@0 | 2895 | // | ... | |
aoqi@0 | 2896 | // |---------------------| <- string_locs[1] |
aoqi@0 | 2897 | // | string[0] | |
aoqi@0 | 2898 | // |---------------------| <- string_locs[0] |
aoqi@0 | 2899 | // | temp | |
aoqi@0 | 2900 | // |---------------------| <- conversion_temp |
aoqi@0 | 2901 | // | outbound memory | |
aoqi@0 | 2902 | // | based arguments | |
aoqi@0 | 2903 | // | | |
aoqi@0 | 2904 | // |---------------------| |
aoqi@0 | 2905 | // | | |
aoqi@0 | 2906 | // SP-> | out_preserved_slots | |
aoqi@0 | 2907 | // |
aoqi@0 | 2908 | // |
aoqi@0 | 2909 | |
aoqi@0 | 2910 | // Now compute actual number of stack words we need rounding to make |
aoqi@0 | 2911 | // stack properly aligned. |
aoqi@0 | 2912 | stack_slots = round_to(stack_slots, 4 * VMRegImpl::slots_per_word); |
aoqi@0 | 2913 | |
aoqi@0 | 2914 | int stack_size = stack_slots * VMRegImpl::stack_slot_size; |
aoqi@0 | 2915 | |
aoqi@0 | 2916 | intptr_t start = (intptr_t)__ pc(); |
aoqi@0 | 2917 | |
aoqi@0 | 2918 | // First thing make an ic check to see if we should even be here |
aoqi@0 | 2919 | |
aoqi@0 | 2920 | { |
aoqi@0 | 2921 | Label L; |
aoqi@0 | 2922 | const Register temp_reg = G3_scratch; |
aoqi@0 | 2923 | AddressLiteral ic_miss(SharedRuntime::get_ic_miss_stub()); |
aoqi@0 | 2924 | __ verify_oop(O0); |
aoqi@0 | 2925 | __ ld_ptr(O0, oopDesc::klass_offset_in_bytes(), temp_reg); |
aoqi@0 | 2926 | __ cmp_and_brx_short(temp_reg, G5_inline_cache_reg, Assembler::equal, Assembler::pt, L); |
aoqi@0 | 2927 | |
aoqi@0 | 2928 | __ jump_to(ic_miss, temp_reg); |
aoqi@0 | 2929 | __ delayed()->nop(); |
aoqi@0 | 2930 | __ align(CodeEntryAlignment); |
aoqi@0 | 2931 | __ bind(L); |
aoqi@0 | 2932 | } |
aoqi@0 | 2933 | |
aoqi@0 | 2934 | int vep_offset = ((intptr_t)__ pc()) - start; |
aoqi@0 | 2935 | |
aoqi@0 | 2936 | |
aoqi@0 | 2937 | // The instruction at the verified entry point must be 5 bytes or longer |
aoqi@0 | 2938 | // because it can be patched on the fly by make_non_entrant. The stack bang |
aoqi@0 | 2939 | // instruction fits that requirement. |
aoqi@0 | 2940 | |
aoqi@0 | 2941 | // Generate stack overflow check before creating frame |
aoqi@0 | 2942 | __ generate_stack_overflow_check(stack_size); |
aoqi@0 | 2943 | |
aoqi@0 | 2944 | assert(((intptr_t)__ pc() - start - vep_offset) >= 5, |
aoqi@0 | 2945 | "valid size for make_non_entrant"); |
aoqi@0 | 2946 | |
aoqi@0 | 2947 | // Generate a new frame for the wrapper. |
aoqi@0 | 2948 | __ save(SP, -stack_size, SP); |
aoqi@0 | 2949 | |
aoqi@0 | 2950 | // Frame is now completed as far a size and linkage. |
aoqi@0 | 2951 | |
aoqi@0 | 2952 | int frame_complete = ((intptr_t)__ pc()) - start; |
aoqi@0 | 2953 | |
aoqi@0 | 2954 | #ifdef ASSERT |
aoqi@0 | 2955 | bool reg_destroyed[RegisterImpl::number_of_registers]; |
aoqi@0 | 2956 | bool freg_destroyed[FloatRegisterImpl::number_of_registers]; |
aoqi@0 | 2957 | for ( int r = 0 ; r < RegisterImpl::number_of_registers ; r++ ) { |
aoqi@0 | 2958 | reg_destroyed[r] = false; |
aoqi@0 | 2959 | } |
aoqi@0 | 2960 | for ( int f = 0 ; f < FloatRegisterImpl::number_of_registers ; f++ ) { |
aoqi@0 | 2961 | freg_destroyed[f] = false; |
aoqi@0 | 2962 | } |
aoqi@0 | 2963 | |
aoqi@0 | 2964 | #endif /* ASSERT */ |
aoqi@0 | 2965 | |
aoqi@0 | 2966 | VMRegPair zero; |
aoqi@0 | 2967 | const Register g0 = G0; // without this we get a compiler warning (why??) |
aoqi@0 | 2968 | zero.set2(g0->as_VMReg()); |
aoqi@0 | 2969 | |
aoqi@0 | 2970 | int c_arg, j_arg; |
aoqi@0 | 2971 | |
aoqi@0 | 2972 | Register conversion_off = noreg; |
aoqi@0 | 2973 | |
aoqi@0 | 2974 | for (j_arg = first_arg_to_pass, c_arg = 0 ; |
aoqi@0 | 2975 | j_arg < total_args_passed ; j_arg++, c_arg++ ) { |
aoqi@0 | 2976 | |
aoqi@0 | 2977 | VMRegPair src = in_regs[j_arg]; |
aoqi@0 | 2978 | VMRegPair dst = out_regs[c_arg]; |
aoqi@0 | 2979 | |
aoqi@0 | 2980 | #ifdef ASSERT |
aoqi@0 | 2981 | if (src.first()->is_Register()) { |
aoqi@0 | 2982 | assert(!reg_destroyed[src.first()->as_Register()->encoding()], "ack!"); |
aoqi@0 | 2983 | } else if (src.first()->is_FloatRegister()) { |
aoqi@0 | 2984 | assert(!freg_destroyed[src.first()->as_FloatRegister()->encoding( |
aoqi@0 | 2985 | FloatRegisterImpl::S)], "ack!"); |
aoqi@0 | 2986 | } |
aoqi@0 | 2987 | if (dst.first()->is_Register()) { |
aoqi@0 | 2988 | reg_destroyed[dst.first()->as_Register()->encoding()] = true; |
aoqi@0 | 2989 | } else if (dst.first()->is_FloatRegister()) { |
aoqi@0 | 2990 | freg_destroyed[dst.first()->as_FloatRegister()->encoding( |
aoqi@0 | 2991 | FloatRegisterImpl::S)] = true; |
aoqi@0 | 2992 | } |
aoqi@0 | 2993 | #endif /* ASSERT */ |
aoqi@0 | 2994 | |
aoqi@0 | 2995 | switch (in_sig_bt[j_arg]) { |
aoqi@0 | 2996 | case T_ARRAY: |
aoqi@0 | 2997 | case T_OBJECT: |
aoqi@0 | 2998 | { |
aoqi@0 | 2999 | if (out_sig_bt[c_arg] == T_BYTE || out_sig_bt[c_arg] == T_SHORT || |
aoqi@0 | 3000 | out_sig_bt[c_arg] == T_INT || out_sig_bt[c_arg] == T_LONG) { |
aoqi@0 | 3001 | // need to unbox a one-slot value |
aoqi@0 | 3002 | Register in_reg = L0; |
aoqi@0 | 3003 | Register tmp = L2; |
aoqi@0 | 3004 | if ( src.first()->is_reg() ) { |
aoqi@0 | 3005 | in_reg = src.first()->as_Register(); |
aoqi@0 | 3006 | } else { |
aoqi@0 | 3007 | assert(Assembler::is_simm13(reg2offset(src.first()) + STACK_BIAS), |
aoqi@0 | 3008 | "must be"); |
aoqi@0 | 3009 | __ ld_ptr(FP, reg2offset(src.first()) + STACK_BIAS, in_reg); |
aoqi@0 | 3010 | } |
aoqi@0 | 3011 | // If the final destination is an acceptable register |
aoqi@0 | 3012 | if ( dst.first()->is_reg() ) { |
aoqi@0 | 3013 | if ( dst.is_single_phys_reg() || out_sig_bt[c_arg] != T_LONG ) { |
aoqi@0 | 3014 | tmp = dst.first()->as_Register(); |
aoqi@0 | 3015 | } |
aoqi@0 | 3016 | } |
aoqi@0 | 3017 | |
aoqi@0 | 3018 | Label skipUnbox; |
aoqi@0 | 3019 | if ( wordSize == 4 && out_sig_bt[c_arg] == T_LONG ) { |
aoqi@0 | 3020 | __ mov(G0, tmp->successor()); |
aoqi@0 | 3021 | } |
aoqi@0 | 3022 | __ br_null(in_reg, true, Assembler::pn, skipUnbox); |
aoqi@0 | 3023 | __ delayed()->mov(G0, tmp); |
aoqi@0 | 3024 | |
aoqi@0 | 3025 | BasicType bt = out_sig_bt[c_arg]; |
aoqi@0 | 3026 | int box_offset = java_lang_boxing_object::value_offset_in_bytes(bt); |
aoqi@0 | 3027 | switch (bt) { |
aoqi@0 | 3028 | case T_BYTE: |
aoqi@0 | 3029 | __ ldub(in_reg, box_offset, tmp); break; |
aoqi@0 | 3030 | case T_SHORT: |
aoqi@0 | 3031 | __ lduh(in_reg, box_offset, tmp); break; |
aoqi@0 | 3032 | case T_INT: |
aoqi@0 | 3033 | __ ld(in_reg, box_offset, tmp); break; |
aoqi@0 | 3034 | case T_LONG: |
aoqi@0 | 3035 | __ ld_long(in_reg, box_offset, tmp); break; |
aoqi@0 | 3036 | default: ShouldNotReachHere(); |
aoqi@0 | 3037 | } |
aoqi@0 | 3038 | |
aoqi@0 | 3039 | __ bind(skipUnbox); |
aoqi@0 | 3040 | // If tmp wasn't final destination copy to final destination |
aoqi@0 | 3041 | if (tmp == L2) { |
aoqi@0 | 3042 | VMRegPair tmp_as_VM = reg64_to_VMRegPair(L2); |
aoqi@0 | 3043 | if (out_sig_bt[c_arg] == T_LONG) { |
aoqi@0 | 3044 | long_move(masm, tmp_as_VM, dst); |
aoqi@0 | 3045 | } else { |
aoqi@0 | 3046 | move32_64(masm, tmp_as_VM, out_regs[c_arg]); |
aoqi@0 | 3047 | } |
aoqi@0 | 3048 | } |
aoqi@0 | 3049 | if (out_sig_bt[c_arg] == T_LONG) { |
aoqi@0 | 3050 | assert(out_sig_bt[c_arg+1] == T_VOID, "must be"); |
aoqi@0 | 3051 | ++c_arg; // move over the T_VOID to keep the loop indices in sync |
aoqi@0 | 3052 | } |
aoqi@0 | 3053 | } else if (out_sig_bt[c_arg] == T_ADDRESS) { |
aoqi@0 | 3054 | Register s = |
aoqi@0 | 3055 | src.first()->is_reg() ? src.first()->as_Register() : L2; |
aoqi@0 | 3056 | Register d = |
aoqi@0 | 3057 | dst.first()->is_reg() ? dst.first()->as_Register() : L2; |
aoqi@0 | 3058 | |
aoqi@0 | 3059 | // We store the oop now so that the conversion pass can reach |
aoqi@0 | 3060 | // while in the inner frame. This will be the only store if |
aoqi@0 | 3061 | // the oop is NULL. |
aoqi@0 | 3062 | if (s != L2) { |
aoqi@0 | 3063 | // src is register |
aoqi@0 | 3064 | if (d != L2) { |
aoqi@0 | 3065 | // dst is register |
aoqi@0 | 3066 | __ mov(s, d); |
aoqi@0 | 3067 | } else { |
aoqi@0 | 3068 | assert(Assembler::is_simm13(reg2offset(dst.first()) + |
aoqi@0 | 3069 | STACK_BIAS), "must be"); |
aoqi@0 | 3070 | __ st_ptr(s, SP, reg2offset(dst.first()) + STACK_BIAS); |
aoqi@0 | 3071 | } |
aoqi@0 | 3072 | } else { |
aoqi@0 | 3073 | // src not a register |
aoqi@0 | 3074 | assert(Assembler::is_simm13(reg2offset(src.first()) + |
aoqi@0 | 3075 | STACK_BIAS), "must be"); |
aoqi@0 | 3076 | __ ld_ptr(FP, reg2offset(src.first()) + STACK_BIAS, d); |
aoqi@0 | 3077 | if (d == L2) { |
aoqi@0 | 3078 | assert(Assembler::is_simm13(reg2offset(dst.first()) + |
aoqi@0 | 3079 | STACK_BIAS), "must be"); |
aoqi@0 | 3080 | __ st_ptr(d, SP, reg2offset(dst.first()) + STACK_BIAS); |
aoqi@0 | 3081 | } |
aoqi@0 | 3082 | } |
aoqi@0 | 3083 | } else if (out_sig_bt[c_arg] != T_VOID) { |
aoqi@0 | 3084 | // Convert the arg to NULL |
aoqi@0 | 3085 | if (dst.first()->is_reg()) { |
aoqi@0 | 3086 | __ mov(G0, dst.first()->as_Register()); |
aoqi@0 | 3087 | } else { |
aoqi@0 | 3088 | assert(Assembler::is_simm13(reg2offset(dst.first()) + |
aoqi@0 | 3089 | STACK_BIAS), "must be"); |
aoqi@0 | 3090 | __ st_ptr(G0, SP, reg2offset(dst.first()) + STACK_BIAS); |
aoqi@0 | 3091 | } |
aoqi@0 | 3092 | } |
aoqi@0 | 3093 | } |
aoqi@0 | 3094 | break; |
aoqi@0 | 3095 | case T_VOID: |
aoqi@0 | 3096 | break; |
aoqi@0 | 3097 | |
aoqi@0 | 3098 | case T_FLOAT: |
aoqi@0 | 3099 | if (src.first()->is_stack()) { |
aoqi@0 | 3100 | // Stack to stack/reg is simple |
aoqi@0 | 3101 | move32_64(masm, src, dst); |
aoqi@0 | 3102 | } else { |
aoqi@0 | 3103 | if (dst.first()->is_reg()) { |
aoqi@0 | 3104 | // freg -> reg |
aoqi@0 | 3105 | int off = |
aoqi@0 | 3106 | STACK_BIAS + conversion_temp * VMRegImpl::stack_slot_size; |
aoqi@0 | 3107 | Register d = dst.first()->as_Register(); |
aoqi@0 | 3108 | if (Assembler::is_simm13(off)) { |
aoqi@0 | 3109 | __ stf(FloatRegisterImpl::S, src.first()->as_FloatRegister(), |
aoqi@0 | 3110 | SP, off); |
aoqi@0 | 3111 | __ ld(SP, off, d); |
aoqi@0 | 3112 | } else { |
aoqi@0 | 3113 | if (conversion_off == noreg) { |
aoqi@0 | 3114 | __ set(off, L6); |
aoqi@0 | 3115 | conversion_off = L6; |
aoqi@0 | 3116 | } |
aoqi@0 | 3117 | __ stf(FloatRegisterImpl::S, src.first()->as_FloatRegister(), |
aoqi@0 | 3118 | SP, conversion_off); |
aoqi@0 | 3119 | __ ld(SP, conversion_off , d); |
aoqi@0 | 3120 | } |
aoqi@0 | 3121 | } else { |
aoqi@0 | 3122 | // freg -> mem |
aoqi@0 | 3123 | int off = STACK_BIAS + reg2offset(dst.first()); |
aoqi@0 | 3124 | if (Assembler::is_simm13(off)) { |
aoqi@0 | 3125 | __ stf(FloatRegisterImpl::S, src.first()->as_FloatRegister(), |
aoqi@0 | 3126 | SP, off); |
aoqi@0 | 3127 | } else { |
aoqi@0 | 3128 | if (conversion_off == noreg) { |
aoqi@0 | 3129 | __ set(off, L6); |
aoqi@0 | 3130 | conversion_off = L6; |
aoqi@0 | 3131 | } |
aoqi@0 | 3132 | __ stf(FloatRegisterImpl::S, src.first()->as_FloatRegister(), |
aoqi@0 | 3133 | SP, conversion_off); |
aoqi@0 | 3134 | } |
aoqi@0 | 3135 | } |
aoqi@0 | 3136 | } |
aoqi@0 | 3137 | break; |
aoqi@0 | 3138 | |
aoqi@0 | 3139 | case T_DOUBLE: |
aoqi@0 | 3140 | assert( j_arg + 1 < total_args_passed && |
aoqi@0 | 3141 | in_sig_bt[j_arg + 1] == T_VOID && |
aoqi@0 | 3142 | out_sig_bt[c_arg+1] == T_VOID, "bad arg list"); |
aoqi@0 | 3143 | if (src.first()->is_stack()) { |
aoqi@0 | 3144 | // Stack to stack/reg is simple |
aoqi@0 | 3145 | long_move(masm, src, dst); |
aoqi@0 | 3146 | } else { |
aoqi@0 | 3147 | Register d = dst.first()->is_reg() ? dst.first()->as_Register() : L2; |
aoqi@0 | 3148 | |
aoqi@0 | 3149 | // Destination could be an odd reg on 32bit in which case |
aoqi@0 | 3150 | // we can't load direct to the destination. |
aoqi@0 | 3151 | |
aoqi@0 | 3152 | if (!d->is_even() && wordSize == 4) { |
aoqi@0 | 3153 | d = L2; |
aoqi@0 | 3154 | } |
aoqi@0 | 3155 | int off = STACK_BIAS + conversion_temp * VMRegImpl::stack_slot_size; |
aoqi@0 | 3156 | if (Assembler::is_simm13(off)) { |
aoqi@0 | 3157 | __ stf(FloatRegisterImpl::D, src.first()->as_FloatRegister(), |
aoqi@0 | 3158 | SP, off); |
aoqi@0 | 3159 | __ ld_long(SP, off, d); |
aoqi@0 | 3160 | } else { |
aoqi@0 | 3161 | if (conversion_off == noreg) { |
aoqi@0 | 3162 | __ set(off, L6); |
aoqi@0 | 3163 | conversion_off = L6; |
aoqi@0 | 3164 | } |
aoqi@0 | 3165 | __ stf(FloatRegisterImpl::D, src.first()->as_FloatRegister(), |
aoqi@0 | 3166 | SP, conversion_off); |
aoqi@0 | 3167 | __ ld_long(SP, conversion_off, d); |
aoqi@0 | 3168 | } |
aoqi@0 | 3169 | if (d == L2) { |
aoqi@0 | 3170 | long_move(masm, reg64_to_VMRegPair(L2), dst); |
aoqi@0 | 3171 | } |
aoqi@0 | 3172 | } |
aoqi@0 | 3173 | break; |
aoqi@0 | 3174 | |
aoqi@0 | 3175 | case T_LONG : |
aoqi@0 | 3176 | // 32bit can't do a split move of something like g1 -> O0, O1 |
aoqi@0 | 3177 | // so use a memory temp |
aoqi@0 | 3178 | if (src.is_single_phys_reg() && wordSize == 4) { |
aoqi@0 | 3179 | Register tmp = L2; |
aoqi@0 | 3180 | if (dst.first()->is_reg() && |
aoqi@0 | 3181 | (wordSize == 8 || dst.first()->as_Register()->is_even())) { |
aoqi@0 | 3182 | tmp = dst.first()->as_Register(); |
aoqi@0 | 3183 | } |
aoqi@0 | 3184 | |
aoqi@0 | 3185 | int off = STACK_BIAS + conversion_temp * VMRegImpl::stack_slot_size; |
aoqi@0 | 3186 | if (Assembler::is_simm13(off)) { |
aoqi@0 | 3187 | __ stx(src.first()->as_Register(), SP, off); |
aoqi@0 | 3188 | __ ld_long(SP, off, tmp); |
aoqi@0 | 3189 | } else { |
aoqi@0 | 3190 | if (conversion_off == noreg) { |
aoqi@0 | 3191 | __ set(off, L6); |
aoqi@0 | 3192 | conversion_off = L6; |
aoqi@0 | 3193 | } |
aoqi@0 | 3194 | __ stx(src.first()->as_Register(), SP, conversion_off); |
aoqi@0 | 3195 | __ ld_long(SP, conversion_off, tmp); |
aoqi@0 | 3196 | } |
aoqi@0 | 3197 | |
aoqi@0 | 3198 | if (tmp == L2) { |
aoqi@0 | 3199 | long_move(masm, reg64_to_VMRegPair(L2), dst); |
aoqi@0 | 3200 | } |
aoqi@0 | 3201 | } else { |
aoqi@0 | 3202 | long_move(masm, src, dst); |
aoqi@0 | 3203 | } |
aoqi@0 | 3204 | break; |
aoqi@0 | 3205 | |
aoqi@0 | 3206 | case T_ADDRESS: assert(false, "found T_ADDRESS in java args"); |
aoqi@0 | 3207 | |
aoqi@0 | 3208 | default: |
aoqi@0 | 3209 | move32_64(masm, src, dst); |
aoqi@0 | 3210 | } |
aoqi@0 | 3211 | } |
aoqi@0 | 3212 | |
aoqi@0 | 3213 | |
aoqi@0 | 3214 | // If we have any strings we must store any register based arg to the stack |
aoqi@0 | 3215 | // This includes any still live xmm registers too. |
aoqi@0 | 3216 | |
aoqi@0 | 3217 | if (total_strings > 0 ) { |
aoqi@0 | 3218 | |
aoqi@0 | 3219 | // protect all the arg registers |
aoqi@0 | 3220 | __ save_frame(0); |
aoqi@0 | 3221 | __ mov(G2_thread, L7_thread_cache); |
aoqi@0 | 3222 | const Register L2_string_off = L2; |
aoqi@0 | 3223 | |
aoqi@0 | 3224 | // Get first string offset |
aoqi@0 | 3225 | __ set(string_locs * VMRegImpl::stack_slot_size, L2_string_off); |
aoqi@0 | 3226 | |
aoqi@0 | 3227 | for (c_arg = 0 ; c_arg < total_c_args ; c_arg++ ) { |
aoqi@0 | 3228 | if (out_sig_bt[c_arg] == T_ADDRESS) { |
aoqi@0 | 3229 | |
aoqi@0 | 3230 | VMRegPair dst = out_regs[c_arg]; |
aoqi@0 | 3231 | const Register d = dst.first()->is_reg() ? |
aoqi@0 | 3232 | dst.first()->as_Register()->after_save() : noreg; |
aoqi@0 | 3233 | |
aoqi@0 | 3234 | // It's a string the oop and it was already copied to the out arg |
aoqi@0 | 3235 | // position |
aoqi@0 | 3236 | if (d != noreg) { |
aoqi@0 | 3237 | __ mov(d, O0); |
aoqi@0 | 3238 | } else { |
aoqi@0 | 3239 | assert(Assembler::is_simm13(reg2offset(dst.first()) + STACK_BIAS), |
aoqi@0 | 3240 | "must be"); |
aoqi@0 | 3241 | __ ld_ptr(FP, reg2offset(dst.first()) + STACK_BIAS, O0); |
aoqi@0 | 3242 | } |
aoqi@0 | 3243 | Label skip; |
aoqi@0 | 3244 | |
aoqi@0 | 3245 | __ br_null(O0, false, Assembler::pn, skip); |
aoqi@0 | 3246 | __ delayed()->add(FP, L2_string_off, O1); |
aoqi@0 | 3247 | |
aoqi@0 | 3248 | if (d != noreg) { |
aoqi@0 | 3249 | __ mov(O1, d); |
aoqi@0 | 3250 | } else { |
aoqi@0 | 3251 | assert(Assembler::is_simm13(reg2offset(dst.first()) + STACK_BIAS), |
aoqi@0 | 3252 | "must be"); |
aoqi@0 | 3253 | __ st_ptr(O1, FP, reg2offset(dst.first()) + STACK_BIAS); |
aoqi@0 | 3254 | } |
aoqi@0 | 3255 | |
aoqi@0 | 3256 | __ call(CAST_FROM_FN_PTR(address, SharedRuntime::get_utf), |
aoqi@0 | 3257 | relocInfo::runtime_call_type); |
aoqi@0 | 3258 | __ delayed()->add(L2_string_off, max_dtrace_string_size, L2_string_off); |
aoqi@0 | 3259 | |
aoqi@0 | 3260 | __ bind(skip); |
aoqi@0 | 3261 | |
aoqi@0 | 3262 | } |
aoqi@0 | 3263 | |
aoqi@0 | 3264 | } |
aoqi@0 | 3265 | __ mov(L7_thread_cache, G2_thread); |
aoqi@0 | 3266 | __ restore(); |
aoqi@0 | 3267 | |
aoqi@0 | 3268 | } |
aoqi@0 | 3269 | |
aoqi@0 | 3270 | |
aoqi@0 | 3271 | // Ok now we are done. Need to place the nop that dtrace wants in order to |
aoqi@0 | 3272 | // patch in the trap |
aoqi@0 | 3273 | |
aoqi@0 | 3274 | int patch_offset = ((intptr_t)__ pc()) - start; |
aoqi@0 | 3275 | |
aoqi@0 | 3276 | __ nop(); |
aoqi@0 | 3277 | |
aoqi@0 | 3278 | |
aoqi@0 | 3279 | // Return |
aoqi@0 | 3280 | |
aoqi@0 | 3281 | __ ret(); |
aoqi@0 | 3282 | __ delayed()->restore(); |
aoqi@0 | 3283 | |
aoqi@0 | 3284 | __ flush(); |
aoqi@0 | 3285 | |
aoqi@0 | 3286 | nmethod *nm = nmethod::new_dtrace_nmethod( |
aoqi@0 | 3287 | method, masm->code(), vep_offset, patch_offset, frame_complete, |
aoqi@0 | 3288 | stack_slots / VMRegImpl::slots_per_word); |
aoqi@0 | 3289 | return nm; |
aoqi@0 | 3290 | |
aoqi@0 | 3291 | } |
aoqi@0 | 3292 | |
aoqi@0 | 3293 | #endif // HAVE_DTRACE_H |
aoqi@0 | 3294 | |
aoqi@0 | 3295 | // this function returns the adjust size (in number of words) to a c2i adapter |
aoqi@0 | 3296 | // activation for use during deoptimization |
aoqi@0 | 3297 | int Deoptimization::last_frame_adjust(int callee_parameters, int callee_locals) { |
aoqi@0 | 3298 | assert(callee_locals >= callee_parameters, |
aoqi@0 | 3299 | "test and remove; got more parms than locals"); |
aoqi@0 | 3300 | if (callee_locals < callee_parameters) |
aoqi@0 | 3301 | return 0; // No adjustment for negative locals |
aoqi@0 | 3302 | int diff = (callee_locals - callee_parameters) * Interpreter::stackElementWords; |
aoqi@0 | 3303 | return round_to(diff, WordsPerLong); |
aoqi@0 | 3304 | } |
aoqi@0 | 3305 | |
aoqi@0 | 3306 | // "Top of Stack" slots that may be unused by the calling convention but must |
aoqi@0 | 3307 | // otherwise be preserved. |
aoqi@0 | 3308 | // On Intel these are not necessary and the value can be zero. |
aoqi@0 | 3309 | // On Sparc this describes the words reserved for storing a register window |
aoqi@0 | 3310 | // when an interrupt occurs. |
aoqi@0 | 3311 | uint SharedRuntime::out_preserve_stack_slots() { |
aoqi@0 | 3312 | return frame::register_save_words * VMRegImpl::slots_per_word; |
aoqi@0 | 3313 | } |
aoqi@0 | 3314 | |
aoqi@0 | 3315 | static void gen_new_frame(MacroAssembler* masm, bool deopt) { |
aoqi@0 | 3316 | // |
aoqi@0 | 3317 | // Common out the new frame generation for deopt and uncommon trap |
aoqi@0 | 3318 | // |
aoqi@0 | 3319 | Register G3pcs = G3_scratch; // Array of new pcs (input) |
aoqi@0 | 3320 | Register Oreturn0 = O0; |
aoqi@0 | 3321 | Register Oreturn1 = O1; |
aoqi@0 | 3322 | Register O2UnrollBlock = O2; |
aoqi@0 | 3323 | Register O3array = O3; // Array of frame sizes (input) |
aoqi@0 | 3324 | Register O4array_size = O4; // number of frames (input) |
aoqi@0 | 3325 | Register O7frame_size = O7; // number of frames (input) |
aoqi@0 | 3326 | |
aoqi@0 | 3327 | __ ld_ptr(O3array, 0, O7frame_size); |
aoqi@0 | 3328 | __ sub(G0, O7frame_size, O7frame_size); |
aoqi@0 | 3329 | __ save(SP, O7frame_size, SP); |
aoqi@0 | 3330 | __ ld_ptr(G3pcs, 0, I7); // load frame's new pc |
aoqi@0 | 3331 | |
aoqi@0 | 3332 | #ifdef ASSERT |
aoqi@0 | 3333 | // make sure that the frames are aligned properly |
aoqi@0 | 3334 | #ifndef _LP64 |
aoqi@0 | 3335 | __ btst(wordSize*2-1, SP); |
aoqi@0 | 3336 | __ breakpoint_trap(Assembler::notZero, Assembler::ptr_cc); |
aoqi@0 | 3337 | #endif |
aoqi@0 | 3338 | #endif |
aoqi@0 | 3339 | |
aoqi@0 | 3340 | // Deopt needs to pass some extra live values from frame to frame |
aoqi@0 | 3341 | |
aoqi@0 | 3342 | if (deopt) { |
aoqi@0 | 3343 | __ mov(Oreturn0->after_save(), Oreturn0); |
aoqi@0 | 3344 | __ mov(Oreturn1->after_save(), Oreturn1); |
aoqi@0 | 3345 | } |
aoqi@0 | 3346 | |
aoqi@0 | 3347 | __ mov(O4array_size->after_save(), O4array_size); |
aoqi@0 | 3348 | __ sub(O4array_size, 1, O4array_size); |
aoqi@0 | 3349 | __ mov(O3array->after_save(), O3array); |
aoqi@0 | 3350 | __ mov(O2UnrollBlock->after_save(), O2UnrollBlock); |
aoqi@0 | 3351 | __ add(G3pcs, wordSize, G3pcs); // point to next pc value |
aoqi@0 | 3352 | |
aoqi@0 | 3353 | #ifdef ASSERT |
aoqi@0 | 3354 | // trash registers to show a clear pattern in backtraces |
aoqi@0 | 3355 | __ set(0xDEAD0000, I0); |
aoqi@0 | 3356 | __ add(I0, 2, I1); |
aoqi@0 | 3357 | __ add(I0, 4, I2); |
aoqi@0 | 3358 | __ add(I0, 6, I3); |
aoqi@0 | 3359 | __ add(I0, 8, I4); |
aoqi@0 | 3360 | // Don't touch I5 could have valuable savedSP |
aoqi@0 | 3361 | __ set(0xDEADBEEF, L0); |
aoqi@0 | 3362 | __ mov(L0, L1); |
aoqi@0 | 3363 | __ mov(L0, L2); |
aoqi@0 | 3364 | __ mov(L0, L3); |
aoqi@0 | 3365 | __ mov(L0, L4); |
aoqi@0 | 3366 | __ mov(L0, L5); |
aoqi@0 | 3367 | |
aoqi@0 | 3368 | // trash the return value as there is nothing to return yet |
aoqi@0 | 3369 | __ set(0xDEAD0001, O7); |
aoqi@0 | 3370 | #endif |
aoqi@0 | 3371 | |
aoqi@0 | 3372 | __ mov(SP, O5_savedSP); |
aoqi@0 | 3373 | } |
aoqi@0 | 3374 | |
aoqi@0 | 3375 | |
aoqi@0 | 3376 | static void make_new_frames(MacroAssembler* masm, bool deopt) { |
aoqi@0 | 3377 | // |
aoqi@0 | 3378 | // loop through the UnrollBlock info and create new frames |
aoqi@0 | 3379 | // |
aoqi@0 | 3380 | Register G3pcs = G3_scratch; |
aoqi@0 | 3381 | Register Oreturn0 = O0; |
aoqi@0 | 3382 | Register Oreturn1 = O1; |
aoqi@0 | 3383 | Register O2UnrollBlock = O2; |
aoqi@0 | 3384 | Register O3array = O3; |
aoqi@0 | 3385 | Register O4array_size = O4; |
aoqi@0 | 3386 | Label loop; |
aoqi@0 | 3387 | |
aoqi@0 | 3388 | #ifdef ASSERT |
aoqi@0 | 3389 | // Compilers generate code that bang the stack by as much as the |
aoqi@0 | 3390 | // interpreter would need. So this stack banging should never |
aoqi@0 | 3391 | // trigger a fault. Verify that it does not on non product builds. |
aoqi@0 | 3392 | if (UseStackBanging) { |
aoqi@0 | 3393 | // Get total frame size for interpreted frames |
aoqi@0 | 3394 | __ ld(O2UnrollBlock, Deoptimization::UnrollBlock::total_frame_sizes_offset_in_bytes(), O4); |
aoqi@0 | 3395 | __ bang_stack_size(O4, O3, G3_scratch); |
aoqi@0 | 3396 | } |
aoqi@0 | 3397 | #endif |
aoqi@0 | 3398 | |
aoqi@0 | 3399 | __ ld(O2UnrollBlock, Deoptimization::UnrollBlock::number_of_frames_offset_in_bytes(), O4array_size); |
aoqi@0 | 3400 | __ ld_ptr(O2UnrollBlock, Deoptimization::UnrollBlock::frame_pcs_offset_in_bytes(), G3pcs); |
aoqi@0 | 3401 | __ ld_ptr(O2UnrollBlock, Deoptimization::UnrollBlock::frame_sizes_offset_in_bytes(), O3array); |
aoqi@0 | 3402 | |
aoqi@0 | 3403 | // Adjust old interpreter frame to make space for new frame's extra java locals |
aoqi@0 | 3404 | // |
aoqi@0 | 3405 | // We capture the original sp for the transition frame only because it is needed in |
aoqi@0 | 3406 | // order to properly calculate interpreter_sp_adjustment. Even though in real life |
aoqi@0 | 3407 | // every interpreter frame captures a savedSP it is only needed at the transition |
aoqi@0 | 3408 | // (fortunately). If we had to have it correct everywhere then we would need to |
aoqi@0 | 3409 | // be told the sp_adjustment for each frame we create. If the frame size array |
aoqi@0 | 3410 | // were to have twice the frame count entries then we could have pairs [sp_adjustment, frame_size] |
aoqi@0 | 3411 | // for each frame we create and keep up the illusion every where. |
aoqi@0 | 3412 | // |
aoqi@0 | 3413 | |
aoqi@0 | 3414 | __ ld(O2UnrollBlock, Deoptimization::UnrollBlock::caller_adjustment_offset_in_bytes(), O7); |
aoqi@0 | 3415 | __ mov(SP, O5_savedSP); // remember initial sender's original sp before adjustment |
aoqi@0 | 3416 | __ sub(SP, O7, SP); |
aoqi@0 | 3417 | |
aoqi@0 | 3418 | #ifdef ASSERT |
aoqi@0 | 3419 | // make sure that there is at least one entry in the array |
aoqi@0 | 3420 | __ tst(O4array_size); |
aoqi@0 | 3421 | __ breakpoint_trap(Assembler::zero, Assembler::icc); |
aoqi@0 | 3422 | #endif |
aoqi@0 | 3423 | |
aoqi@0 | 3424 | // Now push the new interpreter frames |
aoqi@0 | 3425 | __ bind(loop); |
aoqi@0 | 3426 | |
aoqi@0 | 3427 | // allocate a new frame, filling the registers |
aoqi@0 | 3428 | |
aoqi@0 | 3429 | gen_new_frame(masm, deopt); // allocate an interpreter frame |
aoqi@0 | 3430 | |
aoqi@0 | 3431 | __ cmp_zero_and_br(Assembler::notZero, O4array_size, loop); |
aoqi@0 | 3432 | __ delayed()->add(O3array, wordSize, O3array); |
aoqi@0 | 3433 | __ ld_ptr(G3pcs, 0, O7); // load final frame new pc |
aoqi@0 | 3434 | |
aoqi@0 | 3435 | } |
aoqi@0 | 3436 | |
aoqi@0 | 3437 | //------------------------------generate_deopt_blob---------------------------- |
aoqi@0 | 3438 | // Ought to generate an ideal graph & compile, but here's some SPARC ASM |
aoqi@0 | 3439 | // instead. |
aoqi@0 | 3440 | void SharedRuntime::generate_deopt_blob() { |
aoqi@0 | 3441 | // allocate space for the code |
aoqi@0 | 3442 | ResourceMark rm; |
aoqi@0 | 3443 | // setup code generation tools |
aoqi@0 | 3444 | int pad = VerifyThread ? 512 : 0;// Extra slop space for more verify code |
aoqi@0 | 3445 | #ifdef ASSERT |
aoqi@0 | 3446 | if (UseStackBanging) { |
aoqi@0 | 3447 | pad += StackShadowPages*16 + 32; |
aoqi@0 | 3448 | } |
aoqi@0 | 3449 | #endif |
aoqi@0 | 3450 | #ifdef _LP64 |
aoqi@0 | 3451 | CodeBuffer buffer("deopt_blob", 2100+pad, 512); |
aoqi@0 | 3452 | #else |
aoqi@0 | 3453 | // Measured 8/7/03 at 1212 in 32bit debug build (no VerifyThread) |
aoqi@0 | 3454 | // Measured 8/7/03 at 1396 in 32bit debug build (VerifyThread) |
aoqi@0 | 3455 | CodeBuffer buffer("deopt_blob", 1600+pad, 512); |
aoqi@0 | 3456 | #endif /* _LP64 */ |
aoqi@0 | 3457 | MacroAssembler* masm = new MacroAssembler(&buffer); |
aoqi@0 | 3458 | FloatRegister Freturn0 = F0; |
aoqi@0 | 3459 | Register Greturn1 = G1; |
aoqi@0 | 3460 | Register Oreturn0 = O0; |
aoqi@0 | 3461 | Register Oreturn1 = O1; |
aoqi@0 | 3462 | Register O2UnrollBlock = O2; |
aoqi@0 | 3463 | Register L0deopt_mode = L0; |
aoqi@0 | 3464 | Register G4deopt_mode = G4_scratch; |
aoqi@0 | 3465 | int frame_size_words; |
aoqi@0 | 3466 | Address saved_Freturn0_addr(FP, -sizeof(double) + STACK_BIAS); |
aoqi@0 | 3467 | #if !defined(_LP64) && defined(COMPILER2) |
aoqi@0 | 3468 | Address saved_Greturn1_addr(FP, -sizeof(double) -sizeof(jlong) + STACK_BIAS); |
aoqi@0 | 3469 | #endif |
aoqi@0 | 3470 | Label cont; |
aoqi@0 | 3471 | |
aoqi@0 | 3472 | OopMapSet *oop_maps = new OopMapSet(); |
aoqi@0 | 3473 | |
aoqi@0 | 3474 | // |
aoqi@0 | 3475 | // This is the entry point for code which is returning to a de-optimized |
aoqi@0 | 3476 | // frame. |
aoqi@0 | 3477 | // The steps taken by this frame are as follows: |
aoqi@0 | 3478 | // - push a dummy "register_save" and save the return values (O0, O1, F0/F1, G1) |
aoqi@0 | 3479 | // and all potentially live registers (at a pollpoint many registers can be live). |
aoqi@0 | 3480 | // |
aoqi@0 | 3481 | // - call the C routine: Deoptimization::fetch_unroll_info (this function |
aoqi@0 | 3482 | // returns information about the number and size of interpreter frames |
aoqi@0 | 3483 | // which are equivalent to the frame which is being deoptimized) |
aoqi@0 | 3484 | // - deallocate the unpack frame, restoring only results values. Other |
aoqi@0 | 3485 | // volatile registers will now be captured in the vframeArray as needed. |
aoqi@0 | 3486 | // - deallocate the deoptimization frame |
aoqi@0 | 3487 | // - in a loop using the information returned in the previous step |
aoqi@0 | 3488 | // push new interpreter frames (take care to propagate the return |
aoqi@0 | 3489 | // values through each new frame pushed) |
aoqi@0 | 3490 | // - create a dummy "unpack_frame" and save the return values (O0, O1, F0) |
aoqi@0 | 3491 | // - call the C routine: Deoptimization::unpack_frames (this function |
aoqi@0 | 3492 | // lays out values on the interpreter frame which was just created) |
aoqi@0 | 3493 | // - deallocate the dummy unpack_frame |
aoqi@0 | 3494 | // - ensure that all the return values are correctly set and then do |
aoqi@0 | 3495 | // a return to the interpreter entry point |
aoqi@0 | 3496 | // |
aoqi@0 | 3497 | // Refer to the following methods for more information: |
aoqi@0 | 3498 | // - Deoptimization::fetch_unroll_info |
aoqi@0 | 3499 | // - Deoptimization::unpack_frames |
aoqi@0 | 3500 | |
aoqi@0 | 3501 | OopMap* map = NULL; |
aoqi@0 | 3502 | |
aoqi@0 | 3503 | int start = __ offset(); |
aoqi@0 | 3504 | |
aoqi@0 | 3505 | // restore G2, the trampoline destroyed it |
aoqi@0 | 3506 | __ get_thread(); |
aoqi@0 | 3507 | |
aoqi@0 | 3508 | // On entry we have been called by the deoptimized nmethod with a call that |
aoqi@0 | 3509 | // replaced the original call (or safepoint polling location) so the deoptimizing |
aoqi@0 | 3510 | // pc is now in O7. Return values are still in the expected places |
aoqi@0 | 3511 | |
aoqi@0 | 3512 | map = RegisterSaver::save_live_registers(masm, 0, &frame_size_words); |
aoqi@0 | 3513 | __ ba(cont); |
aoqi@0 | 3514 | __ delayed()->mov(Deoptimization::Unpack_deopt, L0deopt_mode); |
aoqi@0 | 3515 | |
aoqi@0 | 3516 | int exception_offset = __ offset() - start; |
aoqi@0 | 3517 | |
aoqi@0 | 3518 | // restore G2, the trampoline destroyed it |
aoqi@0 | 3519 | __ get_thread(); |
aoqi@0 | 3520 | |
aoqi@0 | 3521 | // On entry we have been jumped to by the exception handler (or exception_blob |
aoqi@0 | 3522 | // for server). O0 contains the exception oop and O7 contains the original |
aoqi@0 | 3523 | // exception pc. So if we push a frame here it will look to the |
aoqi@0 | 3524 | // stack walking code (fetch_unroll_info) just like a normal call so |
aoqi@0 | 3525 | // state will be extracted normally. |
aoqi@0 | 3526 | |
aoqi@0 | 3527 | // save exception oop in JavaThread and fall through into the |
aoqi@0 | 3528 | // exception_in_tls case since they are handled in same way except |
aoqi@0 | 3529 | // for where the pending exception is kept. |
aoqi@0 | 3530 | __ st_ptr(Oexception, G2_thread, JavaThread::exception_oop_offset()); |
aoqi@0 | 3531 | |
aoqi@0 | 3532 | // |
aoqi@0 | 3533 | // Vanilla deoptimization with an exception pending in exception_oop |
aoqi@0 | 3534 | // |
aoqi@0 | 3535 | int exception_in_tls_offset = __ offset() - start; |
aoqi@0 | 3536 | |
aoqi@0 | 3537 | // No need to update oop_map as each call to save_live_registers will produce identical oopmap |
aoqi@0 | 3538 | (void) RegisterSaver::save_live_registers(masm, 0, &frame_size_words); |
aoqi@0 | 3539 | |
aoqi@0 | 3540 | // Restore G2_thread |
aoqi@0 | 3541 | __ get_thread(); |
aoqi@0 | 3542 | |
aoqi@0 | 3543 | #ifdef ASSERT |
aoqi@0 | 3544 | { |
aoqi@0 | 3545 | // verify that there is really an exception oop in exception_oop |
aoqi@0 | 3546 | Label has_exception; |
aoqi@0 | 3547 | __ ld_ptr(G2_thread, JavaThread::exception_oop_offset(), Oexception); |
aoqi@0 | 3548 | __ br_notnull_short(Oexception, Assembler::pt, has_exception); |
aoqi@0 | 3549 | __ stop("no exception in thread"); |
aoqi@0 | 3550 | __ bind(has_exception); |
aoqi@0 | 3551 | |
aoqi@0 | 3552 | // verify that there is no pending exception |
aoqi@0 | 3553 | Label no_pending_exception; |
aoqi@0 | 3554 | Address exception_addr(G2_thread, Thread::pending_exception_offset()); |
aoqi@0 | 3555 | __ ld_ptr(exception_addr, Oexception); |
aoqi@0 | 3556 | __ br_null_short(Oexception, Assembler::pt, no_pending_exception); |
aoqi@0 | 3557 | __ stop("must not have pending exception here"); |
aoqi@0 | 3558 | __ bind(no_pending_exception); |
aoqi@0 | 3559 | } |
aoqi@0 | 3560 | #endif |
aoqi@0 | 3561 | |
aoqi@0 | 3562 | __ ba(cont); |
aoqi@0 | 3563 | __ delayed()->mov(Deoptimization::Unpack_exception, L0deopt_mode);; |
aoqi@0 | 3564 | |
aoqi@0 | 3565 | // |
aoqi@0 | 3566 | // Reexecute entry, similar to c2 uncommon trap |
aoqi@0 | 3567 | // |
aoqi@0 | 3568 | int reexecute_offset = __ offset() - start; |
aoqi@0 | 3569 | |
aoqi@0 | 3570 | // No need to update oop_map as each call to save_live_registers will produce identical oopmap |
aoqi@0 | 3571 | (void) RegisterSaver::save_live_registers(masm, 0, &frame_size_words); |
aoqi@0 | 3572 | |
aoqi@0 | 3573 | __ mov(Deoptimization::Unpack_reexecute, L0deopt_mode); |
aoqi@0 | 3574 | |
aoqi@0 | 3575 | __ bind(cont); |
aoqi@0 | 3576 | |
aoqi@0 | 3577 | __ set_last_Java_frame(SP, noreg); |
aoqi@0 | 3578 | |
aoqi@0 | 3579 | // do the call by hand so we can get the oopmap |
aoqi@0 | 3580 | |
aoqi@0 | 3581 | __ mov(G2_thread, L7_thread_cache); |
aoqi@0 | 3582 | __ call(CAST_FROM_FN_PTR(address, Deoptimization::fetch_unroll_info), relocInfo::runtime_call_type); |
aoqi@0 | 3583 | __ delayed()->mov(G2_thread, O0); |
aoqi@0 | 3584 | |
aoqi@0 | 3585 | // Set an oopmap for the call site this describes all our saved volatile registers |
aoqi@0 | 3586 | |
aoqi@0 | 3587 | oop_maps->add_gc_map( __ offset()-start, map); |
aoqi@0 | 3588 | |
aoqi@0 | 3589 | __ mov(L7_thread_cache, G2_thread); |
aoqi@0 | 3590 | |
aoqi@0 | 3591 | __ reset_last_Java_frame(); |
aoqi@0 | 3592 | |
aoqi@0 | 3593 | // NOTE: we know that only O0/O1 will be reloaded by restore_result_registers |
aoqi@0 | 3594 | // so this move will survive |
aoqi@0 | 3595 | |
aoqi@0 | 3596 | __ mov(L0deopt_mode, G4deopt_mode); |
aoqi@0 | 3597 | |
aoqi@0 | 3598 | __ mov(O0, O2UnrollBlock->after_save()); |
aoqi@0 | 3599 | |
aoqi@0 | 3600 | RegisterSaver::restore_result_registers(masm); |
aoqi@0 | 3601 | |
aoqi@0 | 3602 | Label noException; |
aoqi@0 | 3603 | __ cmp_and_br_short(G4deopt_mode, Deoptimization::Unpack_exception, Assembler::notEqual, Assembler::pt, noException); |
aoqi@0 | 3604 | |
aoqi@0 | 3605 | // Move the pending exception from exception_oop to Oexception so |
aoqi@0 | 3606 | // the pending exception will be picked up the interpreter. |
aoqi@0 | 3607 | __ ld_ptr(G2_thread, in_bytes(JavaThread::exception_oop_offset()), Oexception); |
aoqi@0 | 3608 | __ st_ptr(G0, G2_thread, in_bytes(JavaThread::exception_oop_offset())); |
aoqi@0 | 3609 | __ st_ptr(G0, G2_thread, in_bytes(JavaThread::exception_pc_offset())); |
aoqi@0 | 3610 | __ bind(noException); |
aoqi@0 | 3611 | |
aoqi@0 | 3612 | // deallocate the deoptimization frame taking care to preserve the return values |
aoqi@0 | 3613 | __ mov(Oreturn0, Oreturn0->after_save()); |
aoqi@0 | 3614 | __ mov(Oreturn1, Oreturn1->after_save()); |
aoqi@0 | 3615 | __ mov(O2UnrollBlock, O2UnrollBlock->after_save()); |
aoqi@0 | 3616 | __ restore(); |
aoqi@0 | 3617 | |
aoqi@0 | 3618 | // Allocate new interpreter frame(s) and possible c2i adapter frame |
aoqi@0 | 3619 | |
aoqi@0 | 3620 | make_new_frames(masm, true); |
aoqi@0 | 3621 | |
aoqi@0 | 3622 | // push a dummy "unpack_frame" taking care of float return values and |
aoqi@0 | 3623 | // call Deoptimization::unpack_frames to have the unpacker layout |
aoqi@0 | 3624 | // information in the interpreter frames just created and then return |
aoqi@0 | 3625 | // to the interpreter entry point |
aoqi@0 | 3626 | __ save(SP, -frame_size_words*wordSize, SP); |
aoqi@0 | 3627 | __ stf(FloatRegisterImpl::D, Freturn0, saved_Freturn0_addr); |
aoqi@0 | 3628 | #if !defined(_LP64) |
aoqi@0 | 3629 | #if defined(COMPILER2) |
aoqi@0 | 3630 | // 32-bit 1-register longs return longs in G1 |
aoqi@0 | 3631 | __ stx(Greturn1, saved_Greturn1_addr); |
aoqi@0 | 3632 | #endif |
aoqi@0 | 3633 | __ set_last_Java_frame(SP, noreg); |
aoqi@0 | 3634 | __ call_VM_leaf(L7_thread_cache, CAST_FROM_FN_PTR(address, Deoptimization::unpack_frames), G2_thread, G4deopt_mode); |
aoqi@0 | 3635 | #else |
aoqi@0 | 3636 | // LP64 uses g4 in set_last_Java_frame |
aoqi@0 | 3637 | __ mov(G4deopt_mode, O1); |
aoqi@0 | 3638 | __ set_last_Java_frame(SP, G0); |
aoqi@0 | 3639 | __ call_VM_leaf(L7_thread_cache, CAST_FROM_FN_PTR(address, Deoptimization::unpack_frames), G2_thread, O1); |
aoqi@0 | 3640 | #endif |
aoqi@0 | 3641 | __ reset_last_Java_frame(); |
aoqi@0 | 3642 | __ ldf(FloatRegisterImpl::D, saved_Freturn0_addr, Freturn0); |
aoqi@0 | 3643 | |
aoqi@0 | 3644 | #if !defined(_LP64) && defined(COMPILER2) |
aoqi@0 | 3645 | // In 32 bit, C2 returns longs in G1 so restore the saved G1 into |
aoqi@0 | 3646 | // I0/I1 if the return value is long. |
aoqi@0 | 3647 | Label not_long; |
aoqi@0 | 3648 | __ cmp_and_br_short(O0,T_LONG, Assembler::notEqual, Assembler::pt, not_long); |
aoqi@0 | 3649 | __ ldd(saved_Greturn1_addr,I0); |
aoqi@0 | 3650 | __ bind(not_long); |
aoqi@0 | 3651 | #endif |
aoqi@0 | 3652 | __ ret(); |
aoqi@0 | 3653 | __ delayed()->restore(); |
aoqi@0 | 3654 | |
aoqi@0 | 3655 | masm->flush(); |
aoqi@0 | 3656 | _deopt_blob = DeoptimizationBlob::create(&buffer, oop_maps, 0, exception_offset, reexecute_offset, frame_size_words); |
aoqi@0 | 3657 | _deopt_blob->set_unpack_with_exception_in_tls_offset(exception_in_tls_offset); |
aoqi@0 | 3658 | } |
aoqi@0 | 3659 | |
aoqi@0 | 3660 | #ifdef COMPILER2 |
aoqi@0 | 3661 | |
aoqi@0 | 3662 | //------------------------------generate_uncommon_trap_blob-------------------- |
aoqi@0 | 3663 | // Ought to generate an ideal graph & compile, but here's some SPARC ASM |
aoqi@0 | 3664 | // instead. |
aoqi@0 | 3665 | void SharedRuntime::generate_uncommon_trap_blob() { |
aoqi@0 | 3666 | // allocate space for the code |
aoqi@0 | 3667 | ResourceMark rm; |
aoqi@0 | 3668 | // setup code generation tools |
aoqi@0 | 3669 | int pad = VerifyThread ? 512 : 0; |
aoqi@0 | 3670 | #ifdef ASSERT |
aoqi@0 | 3671 | if (UseStackBanging) { |
aoqi@0 | 3672 | pad += StackShadowPages*16 + 32; |
aoqi@0 | 3673 | } |
aoqi@0 | 3674 | #endif |
aoqi@0 | 3675 | #ifdef _LP64 |
aoqi@0 | 3676 | CodeBuffer buffer("uncommon_trap_blob", 2700+pad, 512); |
aoqi@0 | 3677 | #else |
aoqi@0 | 3678 | // Measured 8/7/03 at 660 in 32bit debug build (no VerifyThread) |
aoqi@0 | 3679 | // Measured 8/7/03 at 1028 in 32bit debug build (VerifyThread) |
aoqi@0 | 3680 | CodeBuffer buffer("uncommon_trap_blob", 2000+pad, 512); |
aoqi@0 | 3681 | #endif |
aoqi@0 | 3682 | MacroAssembler* masm = new MacroAssembler(&buffer); |
aoqi@0 | 3683 | Register O2UnrollBlock = O2; |
aoqi@0 | 3684 | Register O2klass_index = O2; |
aoqi@0 | 3685 | |
aoqi@0 | 3686 | // |
aoqi@0 | 3687 | // This is the entry point for all traps the compiler takes when it thinks |
aoqi@0 | 3688 | // it cannot handle further execution of compilation code. The frame is |
aoqi@0 | 3689 | // deoptimized in these cases and converted into interpreter frames for |
aoqi@0 | 3690 | // execution |
aoqi@0 | 3691 | // The steps taken by this frame are as follows: |
aoqi@0 | 3692 | // - push a fake "unpack_frame" |
aoqi@0 | 3693 | // - call the C routine Deoptimization::uncommon_trap (this function |
aoqi@0 | 3694 | // packs the current compiled frame into vframe arrays and returns |
aoqi@0 | 3695 | // information about the number and size of interpreter frames which |
aoqi@0 | 3696 | // are equivalent to the frame which is being deoptimized) |
aoqi@0 | 3697 | // - deallocate the "unpack_frame" |
aoqi@0 | 3698 | // - deallocate the deoptimization frame |
aoqi@0 | 3699 | // - in a loop using the information returned in the previous step |
aoqi@0 | 3700 | // push interpreter frames; |
aoqi@0 | 3701 | // - create a dummy "unpack_frame" |
aoqi@0 | 3702 | // - call the C routine: Deoptimization::unpack_frames (this function |
aoqi@0 | 3703 | // lays out values on the interpreter frame which was just created) |
aoqi@0 | 3704 | // - deallocate the dummy unpack_frame |
aoqi@0 | 3705 | // - return to the interpreter entry point |
aoqi@0 | 3706 | // |
aoqi@0 | 3707 | // Refer to the following methods for more information: |
aoqi@0 | 3708 | // - Deoptimization::uncommon_trap |
aoqi@0 | 3709 | // - Deoptimization::unpack_frame |
aoqi@0 | 3710 | |
aoqi@0 | 3711 | // the unloaded class index is in O0 (first parameter to this blob) |
aoqi@0 | 3712 | |
aoqi@0 | 3713 | // push a dummy "unpack_frame" |
aoqi@0 | 3714 | // and call Deoptimization::uncommon_trap to pack the compiled frame into |
aoqi@0 | 3715 | // vframe array and return the UnrollBlock information |
aoqi@0 | 3716 | __ save_frame(0); |
aoqi@0 | 3717 | __ set_last_Java_frame(SP, noreg); |
aoqi@0 | 3718 | __ mov(I0, O2klass_index); |
aoqi@0 | 3719 | __ call_VM_leaf(L7_thread_cache, CAST_FROM_FN_PTR(address, Deoptimization::uncommon_trap), G2_thread, O2klass_index); |
aoqi@0 | 3720 | __ reset_last_Java_frame(); |
aoqi@0 | 3721 | __ mov(O0, O2UnrollBlock->after_save()); |
aoqi@0 | 3722 | __ restore(); |
aoqi@0 | 3723 | |
aoqi@0 | 3724 | // deallocate the deoptimized frame taking care to preserve the return values |
aoqi@0 | 3725 | __ mov(O2UnrollBlock, O2UnrollBlock->after_save()); |
aoqi@0 | 3726 | __ restore(); |
aoqi@0 | 3727 | |
aoqi@0 | 3728 | // Allocate new interpreter frame(s) and possible c2i adapter frame |
aoqi@0 | 3729 | |
aoqi@0 | 3730 | make_new_frames(masm, false); |
aoqi@0 | 3731 | |
aoqi@0 | 3732 | // push a dummy "unpack_frame" taking care of float return values and |
aoqi@0 | 3733 | // call Deoptimization::unpack_frames to have the unpacker layout |
aoqi@0 | 3734 | // information in the interpreter frames just created and then return |
aoqi@0 | 3735 | // to the interpreter entry point |
aoqi@0 | 3736 | __ save_frame(0); |
aoqi@0 | 3737 | __ set_last_Java_frame(SP, noreg); |
aoqi@0 | 3738 | __ mov(Deoptimization::Unpack_uncommon_trap, O3); // indicate it is the uncommon trap case |
aoqi@0 | 3739 | __ call_VM_leaf(L7_thread_cache, CAST_FROM_FN_PTR(address, Deoptimization::unpack_frames), G2_thread, O3); |
aoqi@0 | 3740 | __ reset_last_Java_frame(); |
aoqi@0 | 3741 | __ ret(); |
aoqi@0 | 3742 | __ delayed()->restore(); |
aoqi@0 | 3743 | |
aoqi@0 | 3744 | masm->flush(); |
aoqi@0 | 3745 | _uncommon_trap_blob = UncommonTrapBlob::create(&buffer, NULL, __ total_frame_size_in_bytes(0)/wordSize); |
aoqi@0 | 3746 | } |
aoqi@0 | 3747 | |
aoqi@0 | 3748 | #endif // COMPILER2 |
aoqi@0 | 3749 | |
aoqi@0 | 3750 | //------------------------------generate_handler_blob------------------- |
aoqi@0 | 3751 | // |
aoqi@0 | 3752 | // Generate a special Compile2Runtime blob that saves all registers, and sets |
aoqi@0 | 3753 | // up an OopMap. |
aoqi@0 | 3754 | // |
aoqi@0 | 3755 | // This blob is jumped to (via a breakpoint and the signal handler) from a |
aoqi@0 | 3756 | // safepoint in compiled code. On entry to this blob, O7 contains the |
aoqi@0 | 3757 | // address in the original nmethod at which we should resume normal execution. |
aoqi@0 | 3758 | // Thus, this blob looks like a subroutine which must preserve lots of |
aoqi@0 | 3759 | // registers and return normally. Note that O7 is never register-allocated, |
aoqi@0 | 3760 | // so it is guaranteed to be free here. |
aoqi@0 | 3761 | // |
aoqi@0 | 3762 | |
aoqi@0 | 3763 | // The hardest part of what this blob must do is to save the 64-bit %o |
aoqi@0 | 3764 | // registers in the 32-bit build. A simple 'save' turn the %o's to %i's and |
aoqi@0 | 3765 | // an interrupt will chop off their heads. Making space in the caller's frame |
aoqi@0 | 3766 | // first will let us save the 64-bit %o's before save'ing, but we cannot hand |
aoqi@0 | 3767 | // the adjusted FP off to the GC stack-crawler: this will modify the caller's |
aoqi@0 | 3768 | // SP and mess up HIS OopMaps. So we first adjust the caller's SP, then save |
aoqi@0 | 3769 | // the 64-bit %o's, then do a save, then fixup the caller's SP (our FP). |
aoqi@0 | 3770 | // Tricky, tricky, tricky... |
aoqi@0 | 3771 | |
aoqi@0 | 3772 | SafepointBlob* SharedRuntime::generate_handler_blob(address call_ptr, int poll_type) { |
aoqi@0 | 3773 | assert (StubRoutines::forward_exception_entry() != NULL, "must be generated before"); |
aoqi@0 | 3774 | |
aoqi@0 | 3775 | // allocate space for the code |
aoqi@0 | 3776 | ResourceMark rm; |
aoqi@0 | 3777 | // setup code generation tools |
aoqi@0 | 3778 | // Measured 8/7/03 at 896 in 32bit debug build (no VerifyThread) |
aoqi@0 | 3779 | // Measured 8/7/03 at 1080 in 32bit debug build (VerifyThread) |
aoqi@0 | 3780 | // even larger with TraceJumps |
aoqi@0 | 3781 | int pad = TraceJumps ? 512 : 0; |
aoqi@0 | 3782 | CodeBuffer buffer("handler_blob", 1600 + pad, 512); |
aoqi@0 | 3783 | MacroAssembler* masm = new MacroAssembler(&buffer); |
aoqi@0 | 3784 | int frame_size_words; |
aoqi@0 | 3785 | OopMapSet *oop_maps = new OopMapSet(); |
aoqi@0 | 3786 | OopMap* map = NULL; |
aoqi@0 | 3787 | |
aoqi@0 | 3788 | int start = __ offset(); |
aoqi@0 | 3789 | |
aoqi@0 | 3790 | bool cause_return = (poll_type == POLL_AT_RETURN); |
aoqi@0 | 3791 | // If this causes a return before the processing, then do a "restore" |
aoqi@0 | 3792 | if (cause_return) { |
aoqi@0 | 3793 | __ restore(); |
aoqi@0 | 3794 | } else { |
aoqi@0 | 3795 | // Make it look like we were called via the poll |
aoqi@0 | 3796 | // so that frame constructor always sees a valid return address |
aoqi@0 | 3797 | __ ld_ptr(G2_thread, in_bytes(JavaThread::saved_exception_pc_offset()), O7); |
aoqi@0 | 3798 | __ sub(O7, frame::pc_return_offset, O7); |
aoqi@0 | 3799 | } |
aoqi@0 | 3800 | |
aoqi@0 | 3801 | map = RegisterSaver::save_live_registers(masm, 0, &frame_size_words); |
aoqi@0 | 3802 | |
aoqi@0 | 3803 | // setup last_Java_sp (blows G4) |
aoqi@0 | 3804 | __ set_last_Java_frame(SP, noreg); |
aoqi@0 | 3805 | |
aoqi@0 | 3806 | // call into the runtime to handle illegal instructions exception |
aoqi@0 | 3807 | // Do not use call_VM_leaf, because we need to make a GC map at this call site. |
aoqi@0 | 3808 | __ mov(G2_thread, O0); |
aoqi@0 | 3809 | __ save_thread(L7_thread_cache); |
aoqi@0 | 3810 | __ call(call_ptr); |
aoqi@0 | 3811 | __ delayed()->nop(); |
aoqi@0 | 3812 | |
aoqi@0 | 3813 | // Set an oopmap for the call site. |
aoqi@0 | 3814 | // We need this not only for callee-saved registers, but also for volatile |
aoqi@0 | 3815 | // registers that the compiler might be keeping live across a safepoint. |
aoqi@0 | 3816 | |
aoqi@0 | 3817 | oop_maps->add_gc_map( __ offset() - start, map); |
aoqi@0 | 3818 | |
aoqi@0 | 3819 | __ restore_thread(L7_thread_cache); |
aoqi@0 | 3820 | // clear last_Java_sp |
aoqi@0 | 3821 | __ reset_last_Java_frame(); |
aoqi@0 | 3822 | |
aoqi@0 | 3823 | // Check for exceptions |
aoqi@0 | 3824 | Label pending; |
aoqi@0 | 3825 | |
aoqi@0 | 3826 | __ ld_ptr(G2_thread, in_bytes(Thread::pending_exception_offset()), O1); |
aoqi@0 | 3827 | __ br_notnull_short(O1, Assembler::pn, pending); |
aoqi@0 | 3828 | |
aoqi@0 | 3829 | RegisterSaver::restore_live_registers(masm); |
aoqi@0 | 3830 | |
aoqi@0 | 3831 | // We are back the the original state on entry and ready to go. |
aoqi@0 | 3832 | |
aoqi@0 | 3833 | __ retl(); |
aoqi@0 | 3834 | __ delayed()->nop(); |
aoqi@0 | 3835 | |
aoqi@0 | 3836 | // Pending exception after the safepoint |
aoqi@0 | 3837 | |
aoqi@0 | 3838 | __ bind(pending); |
aoqi@0 | 3839 | |
aoqi@0 | 3840 | RegisterSaver::restore_live_registers(masm); |
aoqi@0 | 3841 | |
aoqi@0 | 3842 | // We are back the the original state on entry. |
aoqi@0 | 3843 | |
aoqi@0 | 3844 | // Tail-call forward_exception_entry, with the issuing PC in O7, |
aoqi@0 | 3845 | // so it looks like the original nmethod called forward_exception_entry. |
aoqi@0 | 3846 | __ set((intptr_t)StubRoutines::forward_exception_entry(), O0); |
aoqi@0 | 3847 | __ JMP(O0, 0); |
aoqi@0 | 3848 | __ delayed()->nop(); |
aoqi@0 | 3849 | |
aoqi@0 | 3850 | // ------------- |
aoqi@0 | 3851 | // make sure all code is generated |
aoqi@0 | 3852 | masm->flush(); |
aoqi@0 | 3853 | |
aoqi@0 | 3854 | // return exception blob |
aoqi@0 | 3855 | return SafepointBlob::create(&buffer, oop_maps, frame_size_words); |
aoqi@0 | 3856 | } |
aoqi@0 | 3857 | |
aoqi@0 | 3858 | // |
aoqi@0 | 3859 | // generate_resolve_blob - call resolution (static/virtual/opt-virtual/ic-miss |
aoqi@0 | 3860 | // |
aoqi@0 | 3861 | // Generate a stub that calls into vm to find out the proper destination |
aoqi@0 | 3862 | // of a java call. All the argument registers are live at this point |
aoqi@0 | 3863 | // but since this is generic code we don't know what they are and the caller |
aoqi@0 | 3864 | // must do any gc of the args. |
aoqi@0 | 3865 | // |
aoqi@0 | 3866 | RuntimeStub* SharedRuntime::generate_resolve_blob(address destination, const char* name) { |
aoqi@0 | 3867 | assert (StubRoutines::forward_exception_entry() != NULL, "must be generated before"); |
aoqi@0 | 3868 | |
aoqi@0 | 3869 | // allocate space for the code |
aoqi@0 | 3870 | ResourceMark rm; |
aoqi@0 | 3871 | // setup code generation tools |
aoqi@0 | 3872 | // Measured 8/7/03 at 896 in 32bit debug build (no VerifyThread) |
aoqi@0 | 3873 | // Measured 8/7/03 at 1080 in 32bit debug build (VerifyThread) |
aoqi@0 | 3874 | // even larger with TraceJumps |
aoqi@0 | 3875 | int pad = TraceJumps ? 512 : 0; |
aoqi@0 | 3876 | CodeBuffer buffer(name, 1600 + pad, 512); |
aoqi@0 | 3877 | MacroAssembler* masm = new MacroAssembler(&buffer); |
aoqi@0 | 3878 | int frame_size_words; |
aoqi@0 | 3879 | OopMapSet *oop_maps = new OopMapSet(); |
aoqi@0 | 3880 | OopMap* map = NULL; |
aoqi@0 | 3881 | |
aoqi@0 | 3882 | int start = __ offset(); |
aoqi@0 | 3883 | |
aoqi@0 | 3884 | map = RegisterSaver::save_live_registers(masm, 0, &frame_size_words); |
aoqi@0 | 3885 | |
aoqi@0 | 3886 | int frame_complete = __ offset(); |
aoqi@0 | 3887 | |
aoqi@0 | 3888 | // setup last_Java_sp (blows G4) |
aoqi@0 | 3889 | __ set_last_Java_frame(SP, noreg); |
aoqi@0 | 3890 | |
aoqi@0 | 3891 | // call into the runtime to handle illegal instructions exception |
aoqi@0 | 3892 | // Do not use call_VM_leaf, because we need to make a GC map at this call site. |
aoqi@0 | 3893 | __ mov(G2_thread, O0); |
aoqi@0 | 3894 | __ save_thread(L7_thread_cache); |
aoqi@0 | 3895 | __ call(destination, relocInfo::runtime_call_type); |
aoqi@0 | 3896 | __ delayed()->nop(); |
aoqi@0 | 3897 | |
aoqi@0 | 3898 | // O0 contains the address we are going to jump to assuming no exception got installed |
aoqi@0 | 3899 | |
aoqi@0 | 3900 | // Set an oopmap for the call site. |
aoqi@0 | 3901 | // We need this not only for callee-saved registers, but also for volatile |
aoqi@0 | 3902 | // registers that the compiler might be keeping live across a safepoint. |
aoqi@0 | 3903 | |
aoqi@0 | 3904 | oop_maps->add_gc_map( __ offset() - start, map); |
aoqi@0 | 3905 | |
aoqi@0 | 3906 | __ restore_thread(L7_thread_cache); |
aoqi@0 | 3907 | // clear last_Java_sp |
aoqi@0 | 3908 | __ reset_last_Java_frame(); |
aoqi@0 | 3909 | |
aoqi@0 | 3910 | // Check for exceptions |
aoqi@0 | 3911 | Label pending; |
aoqi@0 | 3912 | |
aoqi@0 | 3913 | __ ld_ptr(G2_thread, in_bytes(Thread::pending_exception_offset()), O1); |
aoqi@0 | 3914 | __ br_notnull_short(O1, Assembler::pn, pending); |
aoqi@0 | 3915 | |
aoqi@0 | 3916 | // get the returned Method* |
aoqi@0 | 3917 | |
aoqi@0 | 3918 | __ get_vm_result_2(G5_method); |
aoqi@0 | 3919 | __ stx(G5_method, SP, RegisterSaver::G5_offset()+STACK_BIAS); |
aoqi@0 | 3920 | |
aoqi@0 | 3921 | // O0 is where we want to jump, overwrite G3 which is saved and scratch |
aoqi@0 | 3922 | |
aoqi@0 | 3923 | __ stx(O0, SP, RegisterSaver::G3_offset()+STACK_BIAS); |
aoqi@0 | 3924 | |
aoqi@0 | 3925 | RegisterSaver::restore_live_registers(masm); |
aoqi@0 | 3926 | |
aoqi@0 | 3927 | // We are back the the original state on entry and ready to go. |
aoqi@0 | 3928 | |
aoqi@0 | 3929 | __ JMP(G3, 0); |
aoqi@0 | 3930 | __ delayed()->nop(); |
aoqi@0 | 3931 | |
aoqi@0 | 3932 | // Pending exception after the safepoint |
aoqi@0 | 3933 | |
aoqi@0 | 3934 | __ bind(pending); |
aoqi@0 | 3935 | |
aoqi@0 | 3936 | RegisterSaver::restore_live_registers(masm); |
aoqi@0 | 3937 | |
aoqi@0 | 3938 | // We are back the the original state on entry. |
aoqi@0 | 3939 | |
aoqi@0 | 3940 | // Tail-call forward_exception_entry, with the issuing PC in O7, |
aoqi@0 | 3941 | // so it looks like the original nmethod called forward_exception_entry. |
aoqi@0 | 3942 | __ set((intptr_t)StubRoutines::forward_exception_entry(), O0); |
aoqi@0 | 3943 | __ JMP(O0, 0); |
aoqi@0 | 3944 | __ delayed()->nop(); |
aoqi@0 | 3945 | |
aoqi@0 | 3946 | // ------------- |
aoqi@0 | 3947 | // make sure all code is generated |
aoqi@0 | 3948 | masm->flush(); |
aoqi@0 | 3949 | |
aoqi@0 | 3950 | // return the blob |
aoqi@0 | 3951 | // frame_size_words or bytes?? |
aoqi@0 | 3952 | return RuntimeStub::new_runtime_stub(name, &buffer, frame_complete, frame_size_words, oop_maps, true); |
aoqi@0 | 3953 | } |