src/cpu/mips/vm/assembler_mips.inline.hpp

Thu, 07 Sep 2017 09:12:16 +0800

author
aoqi
date
Thu, 07 Sep 2017 09:12:16 +0800
changeset 6880
52ea28d233d2
parent 28
29b7198a76b9
child 9144
cecfc245b19a
permissions
-rw-r--r--

#5745 [Code Reorganization] code cleanup and code style fix
This is a huge patch, but only code cleanup, code style fix and useless code deletion are included, for example:
tab -> two spaces, deleted spacees at the end of a line, delete useless comments.

This patch also included:
Declaration and definition of class MacroAssembler is moved from assembler_mips.h/cpp to macroAssembler_mips.h/cpp

aoqi@1 1 /*
aoqi@1 2 * Copyright (c) 1997, 2010, Oracle and/or its affiliates. All rights reserved.
aoqi@1 3 * Copyright (c) 2015, 2016, Loongson Technology. All rights reserved.
aoqi@1 4 * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
aoqi@1 5 *
aoqi@1 6 * This code is free software; you can redistribute it and/or modify it
aoqi@1 7 * under the terms of the GNU General Public License version 2 only, as
aoqi@1 8 * published by the Free Software Foundation.
aoqi@1 9 *
aoqi@1 10 * This code is distributed in the hope that it will be useful, but WITHOUT
aoqi@1 11 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
aoqi@1 12 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
aoqi@1 13 * version 2 for more details (a copy is included in the LICENSE file that
aoqi@1 14 * accompanied this code).
aoqi@1 15 *
aoqi@1 16 * You should have received a copy of the GNU General Public License version
aoqi@1 17 * 2 along with this work; if not, write to the Free Software Foundation,
aoqi@1 18 * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
aoqi@1 19 *
aoqi@1 20 * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA
aoqi@1 21 * or visit www.oracle.com if you need additional information or have any
aoqi@1 22 * questions.
aoqi@1 23 *
aoqi@1 24 */
aoqi@1 25
aoqi@1 26 #ifndef CPU_MIPS_VM_ASSEMBLER_MIPS_INLINE_HPP
aoqi@1 27 #define CPU_MIPS_VM_ASSEMBLER_MIPS_INLINE_HPP
aoqi@1 28
aoqi@6880 29 #include "asm/assembler.inline.hpp"
aoqi@6880 30 #include "asm/codeBuffer.hpp"
aoqi@6880 31 #include "code/codeCache.hpp"
aoqi@1 32
aoqi@1 33
aoqi@1 34
aoqi@1 35 inline void Assembler::check_delay() {
aoqi@1 36 # ifdef CHECK_DELAY
aoqi@1 37 delay_state = no_delay;
aoqi@1 38 # endif
aoqi@1 39 }
aoqi@1 40
aoqi@1 41 inline void Assembler::emit_long(int x) {
aoqi@1 42 check_delay();
aoqi@28 43 AbstractAssembler::emit_int32(x);
aoqi@1 44 }
aoqi@1 45
aoqi@1 46 inline void Assembler::emit_data(int x, relocInfo::relocType rtype) {
aoqi@1 47 relocate(rtype);
aoqi@1 48 emit_long(x);
aoqi@1 49 }
aoqi@1 50
aoqi@1 51 inline void Assembler::emit_data(int x, RelocationHolder const& rspec) {
aoqi@1 52 relocate(rspec);
aoqi@1 53 emit_long(x);
aoqi@1 54 }
aoqi@1 55
aoqi@1 56 #endif // CPU_MIPS_VM_ASSEMBLER_MIPS_INLINE_HPP

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