Tue, 06 Dec 2011 18:28:51 -0500
7117052: instanceKlass::_init_state can be u1 type
Summary: Change instanceKlass::_init_state field to u1 type.
Reviewed-by: bdelsart, coleenp, dholmes, phh, never
Contributed-by: Jiangli Zhou <jiangli.zhou@oracle.com>
duke@435 | 1 | /* |
twisti@2687 | 2 | * Copyright (c) 2003, 2011, Oracle and/or its affiliates. All rights reserved. |
duke@435 | 3 | * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. |
duke@435 | 4 | * |
duke@435 | 5 | * This code is free software; you can redistribute it and/or modify it |
duke@435 | 6 | * under the terms of the GNU General Public License version 2 only, as |
duke@435 | 7 | * published by the Free Software Foundation. |
duke@435 | 8 | * |
duke@435 | 9 | * This code is distributed in the hope that it will be useful, but WITHOUT |
duke@435 | 10 | * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or |
duke@435 | 11 | * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License |
duke@435 | 12 | * version 2 for more details (a copy is included in the LICENSE file that |
duke@435 | 13 | * accompanied this code). |
duke@435 | 14 | * |
duke@435 | 15 | * You should have received a copy of the GNU General Public License version |
duke@435 | 16 | * 2 along with this work; if not, write to the Free Software Foundation, |
duke@435 | 17 | * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA. |
duke@435 | 18 | * |
trims@1907 | 19 | * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA |
trims@1907 | 20 | * or visit www.oracle.com if you need additional information or have any |
trims@1907 | 21 | * questions. |
duke@435 | 22 | * |
duke@435 | 23 | */ |
duke@435 | 24 | |
stefank@2314 | 25 | #include "precompiled.hpp" |
stefank@2314 | 26 | #include "asm/assembler.hpp" |
stefank@2314 | 27 | #include "assembler_sparc.inline.hpp" |
stefank@2314 | 28 | #include "code/debugInfoRec.hpp" |
stefank@2314 | 29 | #include "code/icBuffer.hpp" |
stefank@2314 | 30 | #include "code/vtableStubs.hpp" |
stefank@2314 | 31 | #include "interpreter/interpreter.hpp" |
stefank@2314 | 32 | #include "oops/compiledICHolderOop.hpp" |
stefank@2314 | 33 | #include "prims/jvmtiRedefineClassesTrace.hpp" |
stefank@2314 | 34 | #include "runtime/sharedRuntime.hpp" |
stefank@2314 | 35 | #include "runtime/vframeArray.hpp" |
stefank@2314 | 36 | #include "vmreg_sparc.inline.hpp" |
stefank@2314 | 37 | #ifdef COMPILER1 |
stefank@2314 | 38 | #include "c1/c1_Runtime1.hpp" |
stefank@2314 | 39 | #endif |
stefank@2314 | 40 | #ifdef COMPILER2 |
stefank@2314 | 41 | #include "opto/runtime.hpp" |
stefank@2314 | 42 | #endif |
stefank@2314 | 43 | #ifdef SHARK |
stefank@2314 | 44 | #include "compiler/compileBroker.hpp" |
stefank@2314 | 45 | #include "shark/sharkCompiler.hpp" |
stefank@2314 | 46 | #endif |
duke@435 | 47 | |
duke@435 | 48 | #define __ masm-> |
duke@435 | 49 | |
duke@435 | 50 | |
duke@435 | 51 | class RegisterSaver { |
duke@435 | 52 | |
duke@435 | 53 | // Used for saving volatile registers. This is Gregs, Fregs, I/L/O. |
duke@435 | 54 | // The Oregs are problematic. In the 32bit build the compiler can |
duke@435 | 55 | // have O registers live with 64 bit quantities. A window save will |
duke@435 | 56 | // cut the heads off of the registers. We have to do a very extensive |
duke@435 | 57 | // stack dance to save and restore these properly. |
duke@435 | 58 | |
duke@435 | 59 | // Note that the Oregs problem only exists if we block at either a polling |
duke@435 | 60 | // page exception a compiled code safepoint that was not originally a call |
duke@435 | 61 | // or deoptimize following one of these kinds of safepoints. |
duke@435 | 62 | |
duke@435 | 63 | // Lots of registers to save. For all builds, a window save will preserve |
duke@435 | 64 | // the %i and %l registers. For the 32-bit longs-in-two entries and 64-bit |
duke@435 | 65 | // builds a window-save will preserve the %o registers. In the LION build |
duke@435 | 66 | // we need to save the 64-bit %o registers which requires we save them |
duke@435 | 67 | // before the window-save (as then they become %i registers and get their |
duke@435 | 68 | // heads chopped off on interrupt). We have to save some %g registers here |
duke@435 | 69 | // as well. |
duke@435 | 70 | enum { |
duke@435 | 71 | // This frame's save area. Includes extra space for the native call: |
duke@435 | 72 | // vararg's layout space and the like. Briefly holds the caller's |
duke@435 | 73 | // register save area. |
duke@435 | 74 | call_args_area = frame::register_save_words_sp_offset + |
duke@435 | 75 | frame::memory_parameter_word_sp_offset*wordSize, |
duke@435 | 76 | // Make sure save locations are always 8 byte aligned. |
duke@435 | 77 | // can't use round_to because it doesn't produce compile time constant |
duke@435 | 78 | start_of_extra_save_area = ((call_args_area + 7) & ~7), |
duke@435 | 79 | g1_offset = start_of_extra_save_area, // g-regs needing saving |
duke@435 | 80 | g3_offset = g1_offset+8, |
duke@435 | 81 | g4_offset = g3_offset+8, |
duke@435 | 82 | g5_offset = g4_offset+8, |
duke@435 | 83 | o0_offset = g5_offset+8, |
duke@435 | 84 | o1_offset = o0_offset+8, |
duke@435 | 85 | o2_offset = o1_offset+8, |
duke@435 | 86 | o3_offset = o2_offset+8, |
duke@435 | 87 | o4_offset = o3_offset+8, |
duke@435 | 88 | o5_offset = o4_offset+8, |
duke@435 | 89 | start_of_flags_save_area = o5_offset+8, |
duke@435 | 90 | ccr_offset = start_of_flags_save_area, |
duke@435 | 91 | fsr_offset = ccr_offset + 8, |
duke@435 | 92 | d00_offset = fsr_offset+8, // Start of float save area |
duke@435 | 93 | register_save_size = d00_offset+8*32 |
duke@435 | 94 | }; |
duke@435 | 95 | |
duke@435 | 96 | |
duke@435 | 97 | public: |
duke@435 | 98 | |
duke@435 | 99 | static int Oexception_offset() { return o0_offset; }; |
duke@435 | 100 | static int G3_offset() { return g3_offset; }; |
duke@435 | 101 | static int G5_offset() { return g5_offset; }; |
duke@435 | 102 | static OopMap* save_live_registers(MacroAssembler* masm, int additional_frame_words, int* total_frame_words); |
duke@435 | 103 | static void restore_live_registers(MacroAssembler* masm); |
duke@435 | 104 | |
duke@435 | 105 | // During deoptimization only the result register need to be restored |
duke@435 | 106 | // all the other values have already been extracted. |
duke@435 | 107 | |
duke@435 | 108 | static void restore_result_registers(MacroAssembler* masm); |
duke@435 | 109 | }; |
duke@435 | 110 | |
duke@435 | 111 | OopMap* RegisterSaver::save_live_registers(MacroAssembler* masm, int additional_frame_words, int* total_frame_words) { |
duke@435 | 112 | // Record volatile registers as callee-save values in an OopMap so their save locations will be |
duke@435 | 113 | // propagated to the caller frame's RegisterMap during StackFrameStream construction (needed for |
duke@435 | 114 | // deoptimization; see compiledVFrame::create_stack_value). The caller's I, L and O registers |
duke@435 | 115 | // are saved in register windows - I's and L's in the caller's frame and O's in the stub frame |
duke@435 | 116 | // (as the stub's I's) when the runtime routine called by the stub creates its frame. |
duke@435 | 117 | int i; |
kvn@1442 | 118 | // Always make the frame size 16 byte aligned. |
duke@435 | 119 | int frame_size = round_to(additional_frame_words + register_save_size, 16); |
duke@435 | 120 | // OopMap frame size is in c2 stack slots (sizeof(jint)) not bytes or words |
duke@435 | 121 | int frame_size_in_slots = frame_size / sizeof(jint); |
duke@435 | 122 | // CodeBlob frame size is in words. |
duke@435 | 123 | *total_frame_words = frame_size / wordSize; |
duke@435 | 124 | // OopMap* map = new OopMap(*total_frame_words, 0); |
duke@435 | 125 | OopMap* map = new OopMap(frame_size_in_slots, 0); |
duke@435 | 126 | |
duke@435 | 127 | #if !defined(_LP64) |
duke@435 | 128 | |
duke@435 | 129 | // Save 64-bit O registers; they will get their heads chopped off on a 'save'. |
duke@435 | 130 | __ stx(O0, G2_thread, JavaThread::o_reg_temps_offset_in_bytes()+0*8); |
duke@435 | 131 | __ stx(O1, G2_thread, JavaThread::o_reg_temps_offset_in_bytes()+1*8); |
duke@435 | 132 | __ stx(O2, G2_thread, JavaThread::o_reg_temps_offset_in_bytes()+2*8); |
duke@435 | 133 | __ stx(O3, G2_thread, JavaThread::o_reg_temps_offset_in_bytes()+3*8); |
duke@435 | 134 | __ stx(O4, G2_thread, JavaThread::o_reg_temps_offset_in_bytes()+4*8); |
duke@435 | 135 | __ stx(O5, G2_thread, JavaThread::o_reg_temps_offset_in_bytes()+5*8); |
duke@435 | 136 | #endif /* _LP64 */ |
duke@435 | 137 | |
duke@435 | 138 | __ save(SP, -frame_size, SP); |
duke@435 | 139 | |
duke@435 | 140 | #ifndef _LP64 |
duke@435 | 141 | // Reload the 64 bit Oregs. Although they are now Iregs we load them |
duke@435 | 142 | // to Oregs here to avoid interrupts cutting off their heads |
duke@435 | 143 | |
duke@435 | 144 | __ ldx(G2_thread, JavaThread::o_reg_temps_offset_in_bytes()+0*8, O0); |
duke@435 | 145 | __ ldx(G2_thread, JavaThread::o_reg_temps_offset_in_bytes()+1*8, O1); |
duke@435 | 146 | __ ldx(G2_thread, JavaThread::o_reg_temps_offset_in_bytes()+2*8, O2); |
duke@435 | 147 | __ ldx(G2_thread, JavaThread::o_reg_temps_offset_in_bytes()+3*8, O3); |
duke@435 | 148 | __ ldx(G2_thread, JavaThread::o_reg_temps_offset_in_bytes()+4*8, O4); |
duke@435 | 149 | __ ldx(G2_thread, JavaThread::o_reg_temps_offset_in_bytes()+5*8, O5); |
duke@435 | 150 | |
duke@435 | 151 | __ stx(O0, SP, o0_offset+STACK_BIAS); |
duke@435 | 152 | map->set_callee_saved(VMRegImpl::stack2reg((o0_offset + 4)>>2), O0->as_VMReg()); |
duke@435 | 153 | |
duke@435 | 154 | __ stx(O1, SP, o1_offset+STACK_BIAS); |
duke@435 | 155 | |
duke@435 | 156 | map->set_callee_saved(VMRegImpl::stack2reg((o1_offset + 4)>>2), O1->as_VMReg()); |
duke@435 | 157 | |
duke@435 | 158 | __ stx(O2, SP, o2_offset+STACK_BIAS); |
duke@435 | 159 | map->set_callee_saved(VMRegImpl::stack2reg((o2_offset + 4)>>2), O2->as_VMReg()); |
duke@435 | 160 | |
duke@435 | 161 | __ stx(O3, SP, o3_offset+STACK_BIAS); |
duke@435 | 162 | map->set_callee_saved(VMRegImpl::stack2reg((o3_offset + 4)>>2), O3->as_VMReg()); |
duke@435 | 163 | |
duke@435 | 164 | __ stx(O4, SP, o4_offset+STACK_BIAS); |
duke@435 | 165 | map->set_callee_saved(VMRegImpl::stack2reg((o4_offset + 4)>>2), O4->as_VMReg()); |
duke@435 | 166 | |
duke@435 | 167 | __ stx(O5, SP, o5_offset+STACK_BIAS); |
duke@435 | 168 | map->set_callee_saved(VMRegImpl::stack2reg((o5_offset + 4)>>2), O5->as_VMReg()); |
duke@435 | 169 | #endif /* _LP64 */ |
duke@435 | 170 | |
coleenp@548 | 171 | |
coleenp@548 | 172 | #ifdef _LP64 |
coleenp@548 | 173 | int debug_offset = 0; |
coleenp@548 | 174 | #else |
coleenp@548 | 175 | int debug_offset = 4; |
coleenp@548 | 176 | #endif |
duke@435 | 177 | // Save the G's |
duke@435 | 178 | __ stx(G1, SP, g1_offset+STACK_BIAS); |
coleenp@548 | 179 | map->set_callee_saved(VMRegImpl::stack2reg((g1_offset + debug_offset)>>2), G1->as_VMReg()); |
duke@435 | 180 | |
duke@435 | 181 | __ stx(G3, SP, g3_offset+STACK_BIAS); |
coleenp@548 | 182 | map->set_callee_saved(VMRegImpl::stack2reg((g3_offset + debug_offset)>>2), G3->as_VMReg()); |
duke@435 | 183 | |
duke@435 | 184 | __ stx(G4, SP, g4_offset+STACK_BIAS); |
coleenp@548 | 185 | map->set_callee_saved(VMRegImpl::stack2reg((g4_offset + debug_offset)>>2), G4->as_VMReg()); |
duke@435 | 186 | |
duke@435 | 187 | __ stx(G5, SP, g5_offset+STACK_BIAS); |
coleenp@548 | 188 | map->set_callee_saved(VMRegImpl::stack2reg((g5_offset + debug_offset)>>2), G5->as_VMReg()); |
duke@435 | 189 | |
duke@435 | 190 | // This is really a waste but we'll keep things as they were for now |
duke@435 | 191 | if (true) { |
duke@435 | 192 | #ifndef _LP64 |
duke@435 | 193 | map->set_callee_saved(VMRegImpl::stack2reg((o0_offset)>>2), O0->as_VMReg()->next()); |
duke@435 | 194 | map->set_callee_saved(VMRegImpl::stack2reg((o1_offset)>>2), O1->as_VMReg()->next()); |
duke@435 | 195 | map->set_callee_saved(VMRegImpl::stack2reg((o2_offset)>>2), O2->as_VMReg()->next()); |
duke@435 | 196 | map->set_callee_saved(VMRegImpl::stack2reg((o3_offset)>>2), O3->as_VMReg()->next()); |
duke@435 | 197 | map->set_callee_saved(VMRegImpl::stack2reg((o4_offset)>>2), O4->as_VMReg()->next()); |
duke@435 | 198 | map->set_callee_saved(VMRegImpl::stack2reg((o5_offset)>>2), O5->as_VMReg()->next()); |
duke@435 | 199 | map->set_callee_saved(VMRegImpl::stack2reg((g1_offset)>>2), G1->as_VMReg()->next()); |
duke@435 | 200 | map->set_callee_saved(VMRegImpl::stack2reg((g3_offset)>>2), G3->as_VMReg()->next()); |
duke@435 | 201 | map->set_callee_saved(VMRegImpl::stack2reg((g4_offset)>>2), G4->as_VMReg()->next()); |
duke@435 | 202 | map->set_callee_saved(VMRegImpl::stack2reg((g5_offset)>>2), G5->as_VMReg()->next()); |
coleenp@548 | 203 | #endif /* _LP64 */ |
duke@435 | 204 | } |
duke@435 | 205 | |
duke@435 | 206 | |
duke@435 | 207 | // Save the flags |
duke@435 | 208 | __ rdccr( G5 ); |
duke@435 | 209 | __ stx(G5, SP, ccr_offset+STACK_BIAS); |
duke@435 | 210 | __ stxfsr(SP, fsr_offset+STACK_BIAS); |
duke@435 | 211 | |
kvn@1442 | 212 | // Save all the FP registers: 32 doubles (32 floats correspond to the 2 halves of the first 16 doubles) |
duke@435 | 213 | int offset = d00_offset; |
kvn@1442 | 214 | for( int i=0; i<FloatRegisterImpl::number_of_registers; i+=2 ) { |
duke@435 | 215 | FloatRegister f = as_FloatRegister(i); |
duke@435 | 216 | __ stf(FloatRegisterImpl::D, f, SP, offset+STACK_BIAS); |
kvn@1442 | 217 | // Record as callee saved both halves of double registers (2 float registers). |
duke@435 | 218 | map->set_callee_saved(VMRegImpl::stack2reg(offset>>2), f->as_VMReg()); |
kvn@1442 | 219 | map->set_callee_saved(VMRegImpl::stack2reg((offset + sizeof(float))>>2), f->as_VMReg()->next()); |
duke@435 | 220 | offset += sizeof(double); |
duke@435 | 221 | } |
duke@435 | 222 | |
duke@435 | 223 | // And we're done. |
duke@435 | 224 | |
duke@435 | 225 | return map; |
duke@435 | 226 | } |
duke@435 | 227 | |
duke@435 | 228 | |
duke@435 | 229 | // Pop the current frame and restore all the registers that we |
duke@435 | 230 | // saved. |
duke@435 | 231 | void RegisterSaver::restore_live_registers(MacroAssembler* masm) { |
duke@435 | 232 | |
duke@435 | 233 | // Restore all the FP registers |
kvn@1442 | 234 | for( int i=0; i<FloatRegisterImpl::number_of_registers; i+=2 ) { |
duke@435 | 235 | __ ldf(FloatRegisterImpl::D, SP, d00_offset+i*sizeof(float)+STACK_BIAS, as_FloatRegister(i)); |
duke@435 | 236 | } |
duke@435 | 237 | |
duke@435 | 238 | __ ldx(SP, ccr_offset+STACK_BIAS, G1); |
duke@435 | 239 | __ wrccr (G1) ; |
duke@435 | 240 | |
duke@435 | 241 | // Restore the G's |
duke@435 | 242 | // Note that G2 (AKA GThread) must be saved and restored separately. |
duke@435 | 243 | // TODO-FIXME: save and restore some of the other ASRs, viz., %asi and %gsr. |
duke@435 | 244 | |
duke@435 | 245 | __ ldx(SP, g1_offset+STACK_BIAS, G1); |
duke@435 | 246 | __ ldx(SP, g3_offset+STACK_BIAS, G3); |
duke@435 | 247 | __ ldx(SP, g4_offset+STACK_BIAS, G4); |
duke@435 | 248 | __ ldx(SP, g5_offset+STACK_BIAS, G5); |
duke@435 | 249 | |
duke@435 | 250 | |
duke@435 | 251 | #if !defined(_LP64) |
duke@435 | 252 | // Restore the 64-bit O's. |
duke@435 | 253 | __ ldx(SP, o0_offset+STACK_BIAS, O0); |
duke@435 | 254 | __ ldx(SP, o1_offset+STACK_BIAS, O1); |
duke@435 | 255 | __ ldx(SP, o2_offset+STACK_BIAS, O2); |
duke@435 | 256 | __ ldx(SP, o3_offset+STACK_BIAS, O3); |
duke@435 | 257 | __ ldx(SP, o4_offset+STACK_BIAS, O4); |
duke@435 | 258 | __ ldx(SP, o5_offset+STACK_BIAS, O5); |
duke@435 | 259 | |
duke@435 | 260 | // And temporarily place them in TLS |
duke@435 | 261 | |
duke@435 | 262 | __ stx(O0, G2_thread, JavaThread::o_reg_temps_offset_in_bytes()+0*8); |
duke@435 | 263 | __ stx(O1, G2_thread, JavaThread::o_reg_temps_offset_in_bytes()+1*8); |
duke@435 | 264 | __ stx(O2, G2_thread, JavaThread::o_reg_temps_offset_in_bytes()+2*8); |
duke@435 | 265 | __ stx(O3, G2_thread, JavaThread::o_reg_temps_offset_in_bytes()+3*8); |
duke@435 | 266 | __ stx(O4, G2_thread, JavaThread::o_reg_temps_offset_in_bytes()+4*8); |
duke@435 | 267 | __ stx(O5, G2_thread, JavaThread::o_reg_temps_offset_in_bytes()+5*8); |
duke@435 | 268 | #endif /* _LP64 */ |
duke@435 | 269 | |
duke@435 | 270 | // Restore flags |
duke@435 | 271 | |
duke@435 | 272 | __ ldxfsr(SP, fsr_offset+STACK_BIAS); |
duke@435 | 273 | |
duke@435 | 274 | __ restore(); |
duke@435 | 275 | |
duke@435 | 276 | #if !defined(_LP64) |
duke@435 | 277 | // Now reload the 64bit Oregs after we've restore the window. |
duke@435 | 278 | __ ldx(G2_thread, JavaThread::o_reg_temps_offset_in_bytes()+0*8, O0); |
duke@435 | 279 | __ ldx(G2_thread, JavaThread::o_reg_temps_offset_in_bytes()+1*8, O1); |
duke@435 | 280 | __ ldx(G2_thread, JavaThread::o_reg_temps_offset_in_bytes()+2*8, O2); |
duke@435 | 281 | __ ldx(G2_thread, JavaThread::o_reg_temps_offset_in_bytes()+3*8, O3); |
duke@435 | 282 | __ ldx(G2_thread, JavaThread::o_reg_temps_offset_in_bytes()+4*8, O4); |
duke@435 | 283 | __ ldx(G2_thread, JavaThread::o_reg_temps_offset_in_bytes()+5*8, O5); |
duke@435 | 284 | #endif /* _LP64 */ |
duke@435 | 285 | |
duke@435 | 286 | } |
duke@435 | 287 | |
duke@435 | 288 | // Pop the current frame and restore the registers that might be holding |
duke@435 | 289 | // a result. |
duke@435 | 290 | void RegisterSaver::restore_result_registers(MacroAssembler* masm) { |
duke@435 | 291 | |
duke@435 | 292 | #if !defined(_LP64) |
duke@435 | 293 | // 32bit build returns longs in G1 |
duke@435 | 294 | __ ldx(SP, g1_offset+STACK_BIAS, G1); |
duke@435 | 295 | |
duke@435 | 296 | // Retrieve the 64-bit O's. |
duke@435 | 297 | __ ldx(SP, o0_offset+STACK_BIAS, O0); |
duke@435 | 298 | __ ldx(SP, o1_offset+STACK_BIAS, O1); |
duke@435 | 299 | // and save to TLS |
duke@435 | 300 | __ stx(O0, G2_thread, JavaThread::o_reg_temps_offset_in_bytes()+0*8); |
duke@435 | 301 | __ stx(O1, G2_thread, JavaThread::o_reg_temps_offset_in_bytes()+1*8); |
duke@435 | 302 | #endif /* _LP64 */ |
duke@435 | 303 | |
duke@435 | 304 | __ ldf(FloatRegisterImpl::D, SP, d00_offset+STACK_BIAS, as_FloatRegister(0)); |
duke@435 | 305 | |
duke@435 | 306 | __ restore(); |
duke@435 | 307 | |
duke@435 | 308 | #if !defined(_LP64) |
duke@435 | 309 | // Now reload the 64bit Oregs after we've restore the window. |
duke@435 | 310 | __ ldx(G2_thread, JavaThread::o_reg_temps_offset_in_bytes()+0*8, O0); |
duke@435 | 311 | __ ldx(G2_thread, JavaThread::o_reg_temps_offset_in_bytes()+1*8, O1); |
duke@435 | 312 | #endif /* _LP64 */ |
duke@435 | 313 | |
duke@435 | 314 | } |
duke@435 | 315 | |
duke@435 | 316 | // The java_calling_convention describes stack locations as ideal slots on |
duke@435 | 317 | // a frame with no abi restrictions. Since we must observe abi restrictions |
duke@435 | 318 | // (like the placement of the register window) the slots must be biased by |
duke@435 | 319 | // the following value. |
duke@435 | 320 | static int reg2offset(VMReg r) { |
duke@435 | 321 | return (r->reg2stack() + SharedRuntime::out_preserve_stack_slots()) * VMRegImpl::stack_slot_size; |
duke@435 | 322 | } |
duke@435 | 323 | |
duke@435 | 324 | // --------------------------------------------------------------------------- |
duke@435 | 325 | // Read the array of BasicTypes from a signature, and compute where the |
duke@435 | 326 | // arguments should go. Values in the VMRegPair regs array refer to 4-byte (VMRegImpl::stack_slot_size) |
duke@435 | 327 | // quantities. Values less than VMRegImpl::stack0 are registers, those above |
duke@435 | 328 | // refer to 4-byte stack slots. All stack slots are based off of the window |
duke@435 | 329 | // top. VMRegImpl::stack0 refers to the first slot past the 16-word window, |
duke@435 | 330 | // and VMRegImpl::stack0+1 refers to the memory word 4-byes higher. Register |
duke@435 | 331 | // values 0-63 (up to RegisterImpl::number_of_registers) are the 64-bit |
duke@435 | 332 | // integer registers. Values 64-95 are the (32-bit only) float registers. |
duke@435 | 333 | // Each 32-bit quantity is given its own number, so the integer registers |
duke@435 | 334 | // (in either 32- or 64-bit builds) use 2 numbers. For example, there is |
duke@435 | 335 | // an O0-low and an O0-high. Essentially, all int register numbers are doubled. |
duke@435 | 336 | |
duke@435 | 337 | // Register results are passed in O0-O5, for outgoing call arguments. To |
duke@435 | 338 | // convert to incoming arguments, convert all O's to I's. The regs array |
duke@435 | 339 | // refer to the low and hi 32-bit words of 64-bit registers or stack slots. |
duke@435 | 340 | // If the regs[].second() field is set to VMRegImpl::Bad(), it means it's unused (a |
duke@435 | 341 | // 32-bit value was passed). If both are VMRegImpl::Bad(), it means no value was |
duke@435 | 342 | // passed (used as a placeholder for the other half of longs and doubles in |
duke@435 | 343 | // the 64-bit build). regs[].second() is either VMRegImpl::Bad() or regs[].second() is |
duke@435 | 344 | // regs[].first()+1 (regs[].first() may be misaligned in the C calling convention). |
duke@435 | 345 | // Sparc never passes a value in regs[].second() but not regs[].first() (regs[].first() |
duke@435 | 346 | // == VMRegImpl::Bad() && regs[].second() != VMRegImpl::Bad()) nor unrelated values in the |
duke@435 | 347 | // same VMRegPair. |
duke@435 | 348 | |
duke@435 | 349 | // Note: the INPUTS in sig_bt are in units of Java argument words, which are |
duke@435 | 350 | // either 32-bit or 64-bit depending on the build. The OUTPUTS are in 32-bit |
duke@435 | 351 | // units regardless of build. |
duke@435 | 352 | |
duke@435 | 353 | |
duke@435 | 354 | // --------------------------------------------------------------------------- |
duke@435 | 355 | // The compiled Java calling convention. The Java convention always passes |
duke@435 | 356 | // 64-bit values in adjacent aligned locations (either registers or stack), |
duke@435 | 357 | // floats in float registers and doubles in aligned float pairs. Values are |
duke@435 | 358 | // packed in the registers. There is no backing varargs store for values in |
duke@435 | 359 | // registers. In the 32-bit build, longs are passed in G1 and G4 (cannot be |
duke@435 | 360 | // passed in I's, because longs in I's get their heads chopped off at |
duke@435 | 361 | // interrupt). |
duke@435 | 362 | int SharedRuntime::java_calling_convention(const BasicType *sig_bt, |
duke@435 | 363 | VMRegPair *regs, |
duke@435 | 364 | int total_args_passed, |
duke@435 | 365 | int is_outgoing) { |
duke@435 | 366 | assert(F31->as_VMReg()->is_reg(), "overlapping stack/register numbers"); |
duke@435 | 367 | |
duke@435 | 368 | // Convention is to pack the first 6 int/oop args into the first 6 registers |
duke@435 | 369 | // (I0-I5), extras spill to the stack. Then pack the first 8 float args |
duke@435 | 370 | // into F0-F7, extras spill to the stack. Then pad all register sets to |
duke@435 | 371 | // align. Then put longs and doubles into the same registers as they fit, |
duke@435 | 372 | // else spill to the stack. |
duke@435 | 373 | const int int_reg_max = SPARC_ARGS_IN_REGS_NUM; |
duke@435 | 374 | const int flt_reg_max = 8; |
duke@435 | 375 | // |
duke@435 | 376 | // Where 32-bit 1-reg longs start being passed |
duke@435 | 377 | // In tiered we must pass on stack because c1 can't use a "pair" in a single reg. |
duke@435 | 378 | // So make it look like we've filled all the G regs that c2 wants to use. |
duke@435 | 379 | Register g_reg = TieredCompilation ? noreg : G1; |
duke@435 | 380 | |
duke@435 | 381 | // Count int/oop and float args. See how many stack slots we'll need and |
duke@435 | 382 | // where the longs & doubles will go. |
duke@435 | 383 | int int_reg_cnt = 0; |
duke@435 | 384 | int flt_reg_cnt = 0; |
duke@435 | 385 | // int stk_reg_pairs = frame::register_save_words*(wordSize>>2); |
duke@435 | 386 | // int stk_reg_pairs = SharedRuntime::out_preserve_stack_slots(); |
duke@435 | 387 | int stk_reg_pairs = 0; |
duke@435 | 388 | for (int i = 0; i < total_args_passed; i++) { |
duke@435 | 389 | switch (sig_bt[i]) { |
duke@435 | 390 | case T_LONG: // LP64, longs compete with int args |
duke@435 | 391 | assert(sig_bt[i+1] == T_VOID, ""); |
duke@435 | 392 | #ifdef _LP64 |
duke@435 | 393 | if (int_reg_cnt < int_reg_max) int_reg_cnt++; |
duke@435 | 394 | #endif |
duke@435 | 395 | break; |
duke@435 | 396 | case T_OBJECT: |
duke@435 | 397 | case T_ARRAY: |
duke@435 | 398 | case T_ADDRESS: // Used, e.g., in slow-path locking for the lock's stack address |
duke@435 | 399 | if (int_reg_cnt < int_reg_max) int_reg_cnt++; |
duke@435 | 400 | #ifndef _LP64 |
duke@435 | 401 | else stk_reg_pairs++; |
duke@435 | 402 | #endif |
duke@435 | 403 | break; |
duke@435 | 404 | case T_INT: |
duke@435 | 405 | case T_SHORT: |
duke@435 | 406 | case T_CHAR: |
duke@435 | 407 | case T_BYTE: |
duke@435 | 408 | case T_BOOLEAN: |
duke@435 | 409 | if (int_reg_cnt < int_reg_max) int_reg_cnt++; |
duke@435 | 410 | else stk_reg_pairs++; |
duke@435 | 411 | break; |
duke@435 | 412 | case T_FLOAT: |
duke@435 | 413 | if (flt_reg_cnt < flt_reg_max) flt_reg_cnt++; |
duke@435 | 414 | else stk_reg_pairs++; |
duke@435 | 415 | break; |
duke@435 | 416 | case T_DOUBLE: |
duke@435 | 417 | assert(sig_bt[i+1] == T_VOID, ""); |
duke@435 | 418 | break; |
duke@435 | 419 | case T_VOID: |
duke@435 | 420 | break; |
duke@435 | 421 | default: |
duke@435 | 422 | ShouldNotReachHere(); |
duke@435 | 423 | } |
duke@435 | 424 | } |
duke@435 | 425 | |
duke@435 | 426 | // This is where the longs/doubles start on the stack. |
duke@435 | 427 | stk_reg_pairs = (stk_reg_pairs+1) & ~1; // Round |
duke@435 | 428 | |
duke@435 | 429 | int int_reg_pairs = (int_reg_cnt+1) & ~1; // 32-bit 2-reg longs only |
duke@435 | 430 | int flt_reg_pairs = (flt_reg_cnt+1) & ~1; |
duke@435 | 431 | |
duke@435 | 432 | // int stk_reg = frame::register_save_words*(wordSize>>2); |
duke@435 | 433 | // int stk_reg = SharedRuntime::out_preserve_stack_slots(); |
duke@435 | 434 | int stk_reg = 0; |
duke@435 | 435 | int int_reg = 0; |
duke@435 | 436 | int flt_reg = 0; |
duke@435 | 437 | |
duke@435 | 438 | // Now do the signature layout |
duke@435 | 439 | for (int i = 0; i < total_args_passed; i++) { |
duke@435 | 440 | switch (sig_bt[i]) { |
duke@435 | 441 | case T_INT: |
duke@435 | 442 | case T_SHORT: |
duke@435 | 443 | case T_CHAR: |
duke@435 | 444 | case T_BYTE: |
duke@435 | 445 | case T_BOOLEAN: |
duke@435 | 446 | #ifndef _LP64 |
duke@435 | 447 | case T_OBJECT: |
duke@435 | 448 | case T_ARRAY: |
duke@435 | 449 | case T_ADDRESS: // Used, e.g., in slow-path locking for the lock's stack address |
duke@435 | 450 | #endif // _LP64 |
duke@435 | 451 | if (int_reg < int_reg_max) { |
duke@435 | 452 | Register r = is_outgoing ? as_oRegister(int_reg++) : as_iRegister(int_reg++); |
duke@435 | 453 | regs[i].set1(r->as_VMReg()); |
duke@435 | 454 | } else { |
duke@435 | 455 | regs[i].set1(VMRegImpl::stack2reg(stk_reg++)); |
duke@435 | 456 | } |
duke@435 | 457 | break; |
duke@435 | 458 | |
duke@435 | 459 | #ifdef _LP64 |
duke@435 | 460 | case T_OBJECT: |
duke@435 | 461 | case T_ARRAY: |
duke@435 | 462 | case T_ADDRESS: // Used, e.g., in slow-path locking for the lock's stack address |
duke@435 | 463 | if (int_reg < int_reg_max) { |
duke@435 | 464 | Register r = is_outgoing ? as_oRegister(int_reg++) : as_iRegister(int_reg++); |
duke@435 | 465 | regs[i].set2(r->as_VMReg()); |
duke@435 | 466 | } else { |
duke@435 | 467 | regs[i].set2(VMRegImpl::stack2reg(stk_reg_pairs)); |
duke@435 | 468 | stk_reg_pairs += 2; |
duke@435 | 469 | } |
duke@435 | 470 | break; |
duke@435 | 471 | #endif // _LP64 |
duke@435 | 472 | |
duke@435 | 473 | case T_LONG: |
duke@435 | 474 | assert(sig_bt[i+1] == T_VOID, "expecting VOID in other half"); |
duke@435 | 475 | #ifdef _LP64 |
duke@435 | 476 | if (int_reg < int_reg_max) { |
duke@435 | 477 | Register r = is_outgoing ? as_oRegister(int_reg++) : as_iRegister(int_reg++); |
duke@435 | 478 | regs[i].set2(r->as_VMReg()); |
duke@435 | 479 | } else { |
duke@435 | 480 | regs[i].set2(VMRegImpl::stack2reg(stk_reg_pairs)); |
duke@435 | 481 | stk_reg_pairs += 2; |
duke@435 | 482 | } |
duke@435 | 483 | #else |
never@739 | 484 | #ifdef COMPILER2 |
duke@435 | 485 | // For 32-bit build, can't pass longs in O-regs because they become |
duke@435 | 486 | // I-regs and get trashed. Use G-regs instead. G1 and G4 are almost |
duke@435 | 487 | // spare and available. This convention isn't used by the Sparc ABI or |
duke@435 | 488 | // anywhere else. If we're tiered then we don't use G-regs because c1 |
never@739 | 489 | // can't deal with them as a "pair". (Tiered makes this code think g's are filled) |
duke@435 | 490 | // G0: zero |
duke@435 | 491 | // G1: 1st Long arg |
duke@435 | 492 | // G2: global allocated to TLS |
duke@435 | 493 | // G3: used in inline cache check |
duke@435 | 494 | // G4: 2nd Long arg |
duke@435 | 495 | // G5: used in inline cache check |
duke@435 | 496 | // G6: used by OS |
duke@435 | 497 | // G7: used by OS |
duke@435 | 498 | |
duke@435 | 499 | if (g_reg == G1) { |
duke@435 | 500 | regs[i].set2(G1->as_VMReg()); // This long arg in G1 |
duke@435 | 501 | g_reg = G4; // Where the next arg goes |
duke@435 | 502 | } else if (g_reg == G4) { |
duke@435 | 503 | regs[i].set2(G4->as_VMReg()); // The 2nd long arg in G4 |
duke@435 | 504 | g_reg = noreg; // No more longs in registers |
duke@435 | 505 | } else { |
duke@435 | 506 | regs[i].set2(VMRegImpl::stack2reg(stk_reg_pairs)); |
duke@435 | 507 | stk_reg_pairs += 2; |
duke@435 | 508 | } |
duke@435 | 509 | #else // COMPILER2 |
duke@435 | 510 | if (int_reg_pairs + 1 < int_reg_max) { |
duke@435 | 511 | if (is_outgoing) { |
duke@435 | 512 | regs[i].set_pair(as_oRegister(int_reg_pairs + 1)->as_VMReg(), as_oRegister(int_reg_pairs)->as_VMReg()); |
duke@435 | 513 | } else { |
duke@435 | 514 | regs[i].set_pair(as_iRegister(int_reg_pairs + 1)->as_VMReg(), as_iRegister(int_reg_pairs)->as_VMReg()); |
duke@435 | 515 | } |
duke@435 | 516 | int_reg_pairs += 2; |
duke@435 | 517 | } else { |
duke@435 | 518 | regs[i].set2(VMRegImpl::stack2reg(stk_reg_pairs)); |
duke@435 | 519 | stk_reg_pairs += 2; |
duke@435 | 520 | } |
duke@435 | 521 | #endif // COMPILER2 |
never@739 | 522 | #endif // _LP64 |
duke@435 | 523 | break; |
duke@435 | 524 | |
duke@435 | 525 | case T_FLOAT: |
duke@435 | 526 | if (flt_reg < flt_reg_max) regs[i].set1(as_FloatRegister(flt_reg++)->as_VMReg()); |
duke@435 | 527 | else regs[i].set1( VMRegImpl::stack2reg(stk_reg++)); |
duke@435 | 528 | break; |
duke@435 | 529 | case T_DOUBLE: |
duke@435 | 530 | assert(sig_bt[i+1] == T_VOID, "expecting half"); |
duke@435 | 531 | if (flt_reg_pairs + 1 < flt_reg_max) { |
duke@435 | 532 | regs[i].set2(as_FloatRegister(flt_reg_pairs)->as_VMReg()); |
duke@435 | 533 | flt_reg_pairs += 2; |
duke@435 | 534 | } else { |
duke@435 | 535 | regs[i].set2(VMRegImpl::stack2reg(stk_reg_pairs)); |
duke@435 | 536 | stk_reg_pairs += 2; |
duke@435 | 537 | } |
duke@435 | 538 | break; |
duke@435 | 539 | case T_VOID: regs[i].set_bad(); break; // Halves of longs & doubles |
duke@435 | 540 | default: |
duke@435 | 541 | ShouldNotReachHere(); |
duke@435 | 542 | } |
duke@435 | 543 | } |
duke@435 | 544 | |
duke@435 | 545 | // retun the amount of stack space these arguments will need. |
duke@435 | 546 | return stk_reg_pairs; |
duke@435 | 547 | |
duke@435 | 548 | } |
duke@435 | 549 | |
twisti@1441 | 550 | // Helper class mostly to avoid passing masm everywhere, and handle |
twisti@1441 | 551 | // store displacement overflow logic. |
duke@435 | 552 | class AdapterGenerator { |
duke@435 | 553 | MacroAssembler *masm; |
duke@435 | 554 | Register Rdisp; |
duke@435 | 555 | void set_Rdisp(Register r) { Rdisp = r; } |
duke@435 | 556 | |
duke@435 | 557 | void patch_callers_callsite(); |
duke@435 | 558 | |
duke@435 | 559 | // base+st_off points to top of argument |
twisti@1861 | 560 | int arg_offset(const int st_off) { return st_off; } |
duke@435 | 561 | int next_arg_offset(const int st_off) { |
twisti@1861 | 562 | return st_off - Interpreter::stackElementSize; |
twisti@1441 | 563 | } |
twisti@1441 | 564 | |
twisti@1441 | 565 | // Argument slot values may be loaded first into a register because |
twisti@1441 | 566 | // they might not fit into displacement. |
twisti@1441 | 567 | RegisterOrConstant arg_slot(const int st_off); |
twisti@1441 | 568 | RegisterOrConstant next_arg_slot(const int st_off); |
twisti@1441 | 569 | |
duke@435 | 570 | // Stores long into offset pointed to by base |
duke@435 | 571 | void store_c2i_long(Register r, Register base, |
duke@435 | 572 | const int st_off, bool is_stack); |
duke@435 | 573 | void store_c2i_object(Register r, Register base, |
duke@435 | 574 | const int st_off); |
duke@435 | 575 | void store_c2i_int(Register r, Register base, |
duke@435 | 576 | const int st_off); |
duke@435 | 577 | void store_c2i_double(VMReg r_2, |
duke@435 | 578 | VMReg r_1, Register base, const int st_off); |
duke@435 | 579 | void store_c2i_float(FloatRegister f, Register base, |
duke@435 | 580 | const int st_off); |
duke@435 | 581 | |
duke@435 | 582 | public: |
duke@435 | 583 | void gen_c2i_adapter(int total_args_passed, |
duke@435 | 584 | // VMReg max_arg, |
duke@435 | 585 | int comp_args_on_stack, // VMRegStackSlots |
duke@435 | 586 | const BasicType *sig_bt, |
duke@435 | 587 | const VMRegPair *regs, |
duke@435 | 588 | Label& skip_fixup); |
duke@435 | 589 | void gen_i2c_adapter(int total_args_passed, |
duke@435 | 590 | // VMReg max_arg, |
duke@435 | 591 | int comp_args_on_stack, // VMRegStackSlots |
duke@435 | 592 | const BasicType *sig_bt, |
duke@435 | 593 | const VMRegPair *regs); |
duke@435 | 594 | |
duke@435 | 595 | AdapterGenerator(MacroAssembler *_masm) : masm(_masm) {} |
duke@435 | 596 | }; |
duke@435 | 597 | |
duke@435 | 598 | |
duke@435 | 599 | // Patch the callers callsite with entry to compiled code if it exists. |
duke@435 | 600 | void AdapterGenerator::patch_callers_callsite() { |
duke@435 | 601 | Label L; |
duke@435 | 602 | __ ld_ptr(G5_method, in_bytes(methodOopDesc::code_offset()), G3_scratch); |
kvn@3037 | 603 | __ br_null(G3_scratch, false, Assembler::pt, L); |
duke@435 | 604 | // Schedule the branch target address early. |
duke@435 | 605 | __ delayed()->ld_ptr(G5_method, in_bytes(methodOopDesc::interpreter_entry_offset()), G3_scratch); |
duke@435 | 606 | // Call into the VM to patch the caller, then jump to compiled callee |
duke@435 | 607 | __ save_frame(4); // Args in compiled layout; do not blow them |
duke@435 | 608 | |
duke@435 | 609 | // Must save all the live Gregs the list is: |
duke@435 | 610 | // G1: 1st Long arg (32bit build) |
duke@435 | 611 | // G2: global allocated to TLS |
duke@435 | 612 | // G3: used in inline cache check (scratch) |
duke@435 | 613 | // G4: 2nd Long arg (32bit build); |
duke@435 | 614 | // G5: used in inline cache check (methodOop) |
duke@435 | 615 | |
duke@435 | 616 | // The longs must go to the stack by hand since in the 32 bit build they can be trashed by window ops. |
duke@435 | 617 | |
duke@435 | 618 | #ifdef _LP64 |
duke@435 | 619 | // mov(s,d) |
duke@435 | 620 | __ mov(G1, L1); |
duke@435 | 621 | __ mov(G4, L4); |
duke@435 | 622 | __ mov(G5_method, L5); |
duke@435 | 623 | __ mov(G5_method, O0); // VM needs target method |
duke@435 | 624 | __ mov(I7, O1); // VM needs caller's callsite |
duke@435 | 625 | // Must be a leaf call... |
duke@435 | 626 | // can be very far once the blob has been relocated |
twisti@1162 | 627 | AddressLiteral dest(CAST_FROM_FN_PTR(address, SharedRuntime::fixup_callers_callsite)); |
duke@435 | 628 | __ relocate(relocInfo::runtime_call_type); |
twisti@1162 | 629 | __ jumpl_to(dest, O7, O7); |
duke@435 | 630 | __ delayed()->mov(G2_thread, L7_thread_cache); |
duke@435 | 631 | __ mov(L7_thread_cache, G2_thread); |
duke@435 | 632 | __ mov(L1, G1); |
duke@435 | 633 | __ mov(L4, G4); |
duke@435 | 634 | __ mov(L5, G5_method); |
duke@435 | 635 | #else |
duke@435 | 636 | __ stx(G1, FP, -8 + STACK_BIAS); |
duke@435 | 637 | __ stx(G4, FP, -16 + STACK_BIAS); |
duke@435 | 638 | __ mov(G5_method, L5); |
duke@435 | 639 | __ mov(G5_method, O0); // VM needs target method |
duke@435 | 640 | __ mov(I7, O1); // VM needs caller's callsite |
duke@435 | 641 | // Must be a leaf call... |
duke@435 | 642 | __ call(CAST_FROM_FN_PTR(address, SharedRuntime::fixup_callers_callsite), relocInfo::runtime_call_type); |
duke@435 | 643 | __ delayed()->mov(G2_thread, L7_thread_cache); |
duke@435 | 644 | __ mov(L7_thread_cache, G2_thread); |
duke@435 | 645 | __ ldx(FP, -8 + STACK_BIAS, G1); |
duke@435 | 646 | __ ldx(FP, -16 + STACK_BIAS, G4); |
duke@435 | 647 | __ mov(L5, G5_method); |
duke@435 | 648 | __ ld_ptr(G5_method, in_bytes(methodOopDesc::interpreter_entry_offset()), G3_scratch); |
duke@435 | 649 | #endif /* _LP64 */ |
duke@435 | 650 | |
duke@435 | 651 | __ restore(); // Restore args |
duke@435 | 652 | __ bind(L); |
duke@435 | 653 | } |
duke@435 | 654 | |
twisti@1441 | 655 | |
twisti@1441 | 656 | RegisterOrConstant AdapterGenerator::arg_slot(const int st_off) { |
twisti@1441 | 657 | RegisterOrConstant roc(arg_offset(st_off)); |
twisti@1441 | 658 | return __ ensure_simm13_or_reg(roc, Rdisp); |
duke@435 | 659 | } |
duke@435 | 660 | |
twisti@1441 | 661 | RegisterOrConstant AdapterGenerator::next_arg_slot(const int st_off) { |
twisti@1441 | 662 | RegisterOrConstant roc(next_arg_offset(st_off)); |
twisti@1441 | 663 | return __ ensure_simm13_or_reg(roc, Rdisp); |
duke@435 | 664 | } |
twisti@1441 | 665 | |
twisti@1441 | 666 | |
duke@435 | 667 | // Stores long into offset pointed to by base |
duke@435 | 668 | void AdapterGenerator::store_c2i_long(Register r, Register base, |
duke@435 | 669 | const int st_off, bool is_stack) { |
duke@435 | 670 | #ifdef _LP64 |
duke@435 | 671 | // In V9, longs are given 2 64-bit slots in the interpreter, but the |
duke@435 | 672 | // data is passed in only 1 slot. |
duke@435 | 673 | __ stx(r, base, next_arg_slot(st_off)); |
duke@435 | 674 | #else |
ysr@777 | 675 | #ifdef COMPILER2 |
duke@435 | 676 | // Misaligned store of 64-bit data |
duke@435 | 677 | __ stw(r, base, arg_slot(st_off)); // lo bits |
duke@435 | 678 | __ srlx(r, 32, r); |
duke@435 | 679 | __ stw(r, base, next_arg_slot(st_off)); // hi bits |
duke@435 | 680 | #else |
duke@435 | 681 | if (is_stack) { |
duke@435 | 682 | // Misaligned store of 64-bit data |
duke@435 | 683 | __ stw(r, base, arg_slot(st_off)); // lo bits |
duke@435 | 684 | __ srlx(r, 32, r); |
duke@435 | 685 | __ stw(r, base, next_arg_slot(st_off)); // hi bits |
duke@435 | 686 | } else { |
duke@435 | 687 | __ stw(r->successor(), base, arg_slot(st_off) ); // lo bits |
duke@435 | 688 | __ stw(r , base, next_arg_slot(st_off)); // hi bits |
duke@435 | 689 | } |
duke@435 | 690 | #endif // COMPILER2 |
ysr@777 | 691 | #endif // _LP64 |
duke@435 | 692 | } |
duke@435 | 693 | |
duke@435 | 694 | void AdapterGenerator::store_c2i_object(Register r, Register base, |
duke@435 | 695 | const int st_off) { |
duke@435 | 696 | __ st_ptr (r, base, arg_slot(st_off)); |
duke@435 | 697 | } |
duke@435 | 698 | |
duke@435 | 699 | void AdapterGenerator::store_c2i_int(Register r, Register base, |
duke@435 | 700 | const int st_off) { |
duke@435 | 701 | __ st (r, base, arg_slot(st_off)); |
duke@435 | 702 | } |
duke@435 | 703 | |
duke@435 | 704 | // Stores into offset pointed to by base |
duke@435 | 705 | void AdapterGenerator::store_c2i_double(VMReg r_2, |
duke@435 | 706 | VMReg r_1, Register base, const int st_off) { |
duke@435 | 707 | #ifdef _LP64 |
duke@435 | 708 | // In V9, doubles are given 2 64-bit slots in the interpreter, but the |
duke@435 | 709 | // data is passed in only 1 slot. |
duke@435 | 710 | __ stf(FloatRegisterImpl::D, r_1->as_FloatRegister(), base, next_arg_slot(st_off)); |
duke@435 | 711 | #else |
duke@435 | 712 | // Need to marshal 64-bit value from misaligned Lesp loads |
duke@435 | 713 | __ stf(FloatRegisterImpl::S, r_1->as_FloatRegister(), base, next_arg_slot(st_off)); |
duke@435 | 714 | __ stf(FloatRegisterImpl::S, r_2->as_FloatRegister(), base, arg_slot(st_off) ); |
duke@435 | 715 | #endif |
duke@435 | 716 | } |
duke@435 | 717 | |
duke@435 | 718 | void AdapterGenerator::store_c2i_float(FloatRegister f, Register base, |
duke@435 | 719 | const int st_off) { |
duke@435 | 720 | __ stf(FloatRegisterImpl::S, f, base, arg_slot(st_off)); |
duke@435 | 721 | } |
duke@435 | 722 | |
duke@435 | 723 | void AdapterGenerator::gen_c2i_adapter( |
duke@435 | 724 | int total_args_passed, |
duke@435 | 725 | // VMReg max_arg, |
duke@435 | 726 | int comp_args_on_stack, // VMRegStackSlots |
duke@435 | 727 | const BasicType *sig_bt, |
duke@435 | 728 | const VMRegPair *regs, |
duke@435 | 729 | Label& skip_fixup) { |
duke@435 | 730 | |
duke@435 | 731 | // Before we get into the guts of the C2I adapter, see if we should be here |
duke@435 | 732 | // at all. We've come from compiled code and are attempting to jump to the |
duke@435 | 733 | // interpreter, which means the caller made a static call to get here |
duke@435 | 734 | // (vcalls always get a compiled target if there is one). Check for a |
duke@435 | 735 | // compiled target. If there is one, we need to patch the caller's call. |
duke@435 | 736 | // However we will run interpreted if we come thru here. The next pass |
duke@435 | 737 | // thru the call site will run compiled. If we ran compiled here then |
duke@435 | 738 | // we can (theorectically) do endless i2c->c2i->i2c transitions during |
duke@435 | 739 | // deopt/uncommon trap cycles. If we always go interpreted here then |
duke@435 | 740 | // we can have at most one and don't need to play any tricks to keep |
duke@435 | 741 | // from endlessly growing the stack. |
duke@435 | 742 | // |
duke@435 | 743 | // Actually if we detected that we had an i2c->c2i transition here we |
duke@435 | 744 | // ought to be able to reset the world back to the state of the interpreted |
duke@435 | 745 | // call and not bother building another interpreter arg area. We don't |
duke@435 | 746 | // do that at this point. |
duke@435 | 747 | |
duke@435 | 748 | patch_callers_callsite(); |
duke@435 | 749 | |
duke@435 | 750 | __ bind(skip_fixup); |
duke@435 | 751 | |
duke@435 | 752 | // Since all args are passed on the stack, total_args_passed*wordSize is the |
duke@435 | 753 | // space we need. Add in varargs area needed by the interpreter. Round up |
duke@435 | 754 | // to stack alignment. |
twisti@1861 | 755 | const int arg_size = total_args_passed * Interpreter::stackElementSize; |
duke@435 | 756 | const int varargs_area = |
duke@435 | 757 | (frame::varargs_offset - frame::register_save_words)*wordSize; |
duke@435 | 758 | const int extraspace = round_to(arg_size + varargs_area, 2*wordSize); |
duke@435 | 759 | |
duke@435 | 760 | int bias = STACK_BIAS; |
duke@435 | 761 | const int interp_arg_offset = frame::varargs_offset*wordSize + |
twisti@1861 | 762 | (total_args_passed-1)*Interpreter::stackElementSize; |
duke@435 | 763 | |
duke@435 | 764 | Register base = SP; |
duke@435 | 765 | |
duke@435 | 766 | #ifdef _LP64 |
duke@435 | 767 | // In the 64bit build because of wider slots and STACKBIAS we can run |
duke@435 | 768 | // out of bits in the displacement to do loads and stores. Use g3 as |
duke@435 | 769 | // temporary displacement. |
duke@435 | 770 | if (! __ is_simm13(extraspace)) { |
duke@435 | 771 | __ set(extraspace, G3_scratch); |
duke@435 | 772 | __ sub(SP, G3_scratch, SP); |
duke@435 | 773 | } else { |
duke@435 | 774 | __ sub(SP, extraspace, SP); |
duke@435 | 775 | } |
duke@435 | 776 | set_Rdisp(G3_scratch); |
duke@435 | 777 | #else |
duke@435 | 778 | __ sub(SP, extraspace, SP); |
duke@435 | 779 | #endif // _LP64 |
duke@435 | 780 | |
duke@435 | 781 | // First write G1 (if used) to where ever it must go |
duke@435 | 782 | for (int i=0; i<total_args_passed; i++) { |
twisti@1861 | 783 | const int st_off = interp_arg_offset - (i*Interpreter::stackElementSize) + bias; |
duke@435 | 784 | VMReg r_1 = regs[i].first(); |
duke@435 | 785 | VMReg r_2 = regs[i].second(); |
duke@435 | 786 | if (r_1 == G1_scratch->as_VMReg()) { |
duke@435 | 787 | if (sig_bt[i] == T_OBJECT || sig_bt[i] == T_ARRAY) { |
duke@435 | 788 | store_c2i_object(G1_scratch, base, st_off); |
duke@435 | 789 | } else if (sig_bt[i] == T_LONG) { |
duke@435 | 790 | assert(!TieredCompilation, "should not use register args for longs"); |
duke@435 | 791 | store_c2i_long(G1_scratch, base, st_off, false); |
duke@435 | 792 | } else { |
duke@435 | 793 | store_c2i_int(G1_scratch, base, st_off); |
duke@435 | 794 | } |
duke@435 | 795 | } |
duke@435 | 796 | } |
duke@435 | 797 | |
duke@435 | 798 | // Now write the args into the outgoing interpreter space |
duke@435 | 799 | for (int i=0; i<total_args_passed; i++) { |
twisti@1861 | 800 | const int st_off = interp_arg_offset - (i*Interpreter::stackElementSize) + bias; |
duke@435 | 801 | VMReg r_1 = regs[i].first(); |
duke@435 | 802 | VMReg r_2 = regs[i].second(); |
duke@435 | 803 | if (!r_1->is_valid()) { |
duke@435 | 804 | assert(!r_2->is_valid(), ""); |
duke@435 | 805 | continue; |
duke@435 | 806 | } |
duke@435 | 807 | // Skip G1 if found as we did it first in order to free it up |
duke@435 | 808 | if (r_1 == G1_scratch->as_VMReg()) { |
duke@435 | 809 | continue; |
duke@435 | 810 | } |
duke@435 | 811 | #ifdef ASSERT |
duke@435 | 812 | bool G1_forced = false; |
duke@435 | 813 | #endif // ASSERT |
duke@435 | 814 | if (r_1->is_stack()) { // Pretend stack targets are loaded into G1 |
duke@435 | 815 | #ifdef _LP64 |
duke@435 | 816 | Register ld_off = Rdisp; |
duke@435 | 817 | __ set(reg2offset(r_1) + extraspace + bias, ld_off); |
duke@435 | 818 | #else |
duke@435 | 819 | int ld_off = reg2offset(r_1) + extraspace + bias; |
kvn@1686 | 820 | #endif // _LP64 |
duke@435 | 821 | #ifdef ASSERT |
duke@435 | 822 | G1_forced = true; |
duke@435 | 823 | #endif // ASSERT |
duke@435 | 824 | r_1 = G1_scratch->as_VMReg();// as part of the load/store shuffle |
duke@435 | 825 | if (!r_2->is_valid()) __ ld (base, ld_off, G1_scratch); |
duke@435 | 826 | else __ ldx(base, ld_off, G1_scratch); |
duke@435 | 827 | } |
duke@435 | 828 | |
duke@435 | 829 | if (r_1->is_Register()) { |
duke@435 | 830 | Register r = r_1->as_Register()->after_restore(); |
duke@435 | 831 | if (sig_bt[i] == T_OBJECT || sig_bt[i] == T_ARRAY) { |
duke@435 | 832 | store_c2i_object(r, base, st_off); |
duke@435 | 833 | } else if (sig_bt[i] == T_LONG || sig_bt[i] == T_DOUBLE) { |
kvn@1686 | 834 | #ifndef _LP64 |
duke@435 | 835 | if (TieredCompilation) { |
duke@435 | 836 | assert(G1_forced || sig_bt[i] != T_LONG, "should not use register args for longs"); |
duke@435 | 837 | } |
kvn@1686 | 838 | #endif // _LP64 |
duke@435 | 839 | store_c2i_long(r, base, st_off, r_2->is_stack()); |
duke@435 | 840 | } else { |
duke@435 | 841 | store_c2i_int(r, base, st_off); |
duke@435 | 842 | } |
duke@435 | 843 | } else { |
duke@435 | 844 | assert(r_1->is_FloatRegister(), ""); |
duke@435 | 845 | if (sig_bt[i] == T_FLOAT) { |
duke@435 | 846 | store_c2i_float(r_1->as_FloatRegister(), base, st_off); |
duke@435 | 847 | } else { |
duke@435 | 848 | assert(sig_bt[i] == T_DOUBLE, "wrong type"); |
duke@435 | 849 | store_c2i_double(r_2, r_1, base, st_off); |
duke@435 | 850 | } |
duke@435 | 851 | } |
duke@435 | 852 | } |
duke@435 | 853 | |
duke@435 | 854 | #ifdef _LP64 |
duke@435 | 855 | // Need to reload G3_scratch, used for temporary displacements. |
duke@435 | 856 | __ ld_ptr(G5_method, in_bytes(methodOopDesc::interpreter_entry_offset()), G3_scratch); |
duke@435 | 857 | |
duke@435 | 858 | // Pass O5_savedSP as an argument to the interpreter. |
duke@435 | 859 | // The interpreter will restore SP to this value before returning. |
duke@435 | 860 | __ set(extraspace, G1); |
duke@435 | 861 | __ add(SP, G1, O5_savedSP); |
duke@435 | 862 | #else |
duke@435 | 863 | // Pass O5_savedSP as an argument to the interpreter. |
duke@435 | 864 | // The interpreter will restore SP to this value before returning. |
duke@435 | 865 | __ add(SP, extraspace, O5_savedSP); |
duke@435 | 866 | #endif // _LP64 |
duke@435 | 867 | |
duke@435 | 868 | __ mov((frame::varargs_offset)*wordSize - |
twisti@1861 | 869 | 1*Interpreter::stackElementSize+bias+BytesPerWord, G1); |
duke@435 | 870 | // Jump to the interpreter just as if interpreter was doing it. |
duke@435 | 871 | __ jmpl(G3_scratch, 0, G0); |
duke@435 | 872 | // Setup Lesp for the call. Cannot actually set Lesp as the current Lesp |
duke@435 | 873 | // (really L0) is in use by the compiled frame as a generic temp. However, |
duke@435 | 874 | // the interpreter does not know where its args are without some kind of |
duke@435 | 875 | // arg pointer being passed in. Pass it in Gargs. |
duke@435 | 876 | __ delayed()->add(SP, G1, Gargs); |
duke@435 | 877 | } |
duke@435 | 878 | |
duke@435 | 879 | void AdapterGenerator::gen_i2c_adapter( |
duke@435 | 880 | int total_args_passed, |
duke@435 | 881 | // VMReg max_arg, |
duke@435 | 882 | int comp_args_on_stack, // VMRegStackSlots |
duke@435 | 883 | const BasicType *sig_bt, |
duke@435 | 884 | const VMRegPair *regs) { |
duke@435 | 885 | |
duke@435 | 886 | // Generate an I2C adapter: adjust the I-frame to make space for the C-frame |
duke@435 | 887 | // layout. Lesp was saved by the calling I-frame and will be restored on |
duke@435 | 888 | // return. Meanwhile, outgoing arg space is all owned by the callee |
duke@435 | 889 | // C-frame, so we can mangle it at will. After adjusting the frame size, |
duke@435 | 890 | // hoist register arguments and repack other args according to the compiled |
duke@435 | 891 | // code convention. Finally, end in a jump to the compiled code. The entry |
duke@435 | 892 | // point address is the start of the buffer. |
duke@435 | 893 | |
duke@435 | 894 | // We will only enter here from an interpreted frame and never from after |
duke@435 | 895 | // passing thru a c2i. Azul allowed this but we do not. If we lose the |
duke@435 | 896 | // race and use a c2i we will remain interpreted for the race loser(s). |
duke@435 | 897 | // This removes all sorts of headaches on the x86 side and also eliminates |
duke@435 | 898 | // the possibility of having c2i -> i2c -> c2i -> ... endless transitions. |
duke@435 | 899 | |
duke@435 | 900 | // As you can see from the list of inputs & outputs there are not a lot |
duke@435 | 901 | // of temp registers to work with: mostly G1, G3 & G4. |
duke@435 | 902 | |
duke@435 | 903 | // Inputs: |
duke@435 | 904 | // G2_thread - TLS |
duke@435 | 905 | // G5_method - Method oop |
jrose@1145 | 906 | // G4 (Gargs) - Pointer to interpreter's args |
jrose@1145 | 907 | // O0..O4 - free for scratch |
jrose@1145 | 908 | // O5_savedSP - Caller's saved SP, to be restored if needed |
duke@435 | 909 | // O6 - Current SP! |
duke@435 | 910 | // O7 - Valid return address |
jrose@1145 | 911 | // L0-L7, I0-I7 - Caller's temps (no frame pushed yet) |
duke@435 | 912 | |
duke@435 | 913 | // Outputs: |
duke@435 | 914 | // G2_thread - TLS |
duke@435 | 915 | // G1, G4 - Outgoing long args in 32-bit build |
duke@435 | 916 | // O0-O5 - Outgoing args in compiled layout |
duke@435 | 917 | // O6 - Adjusted or restored SP |
duke@435 | 918 | // O7 - Valid return address |
twisti@1919 | 919 | // L0-L7, I0-I7 - Caller's temps (no frame pushed yet) |
duke@435 | 920 | // F0-F7 - more outgoing args |
duke@435 | 921 | |
duke@435 | 922 | |
jrose@1145 | 923 | // Gargs is the incoming argument base, and also an outgoing argument. |
duke@435 | 924 | __ sub(Gargs, BytesPerWord, Gargs); |
duke@435 | 925 | |
duke@435 | 926 | // ON ENTRY TO THE CODE WE ARE MAKING, WE HAVE AN INTERPRETED FRAME |
duke@435 | 927 | // WITH O7 HOLDING A VALID RETURN PC |
duke@435 | 928 | // |
duke@435 | 929 | // | | |
duke@435 | 930 | // : java stack : |
duke@435 | 931 | // | | |
duke@435 | 932 | // +--------------+ <--- start of outgoing args |
duke@435 | 933 | // | receiver | | |
duke@435 | 934 | // : rest of args : |---size is java-arg-words |
duke@435 | 935 | // | | | |
duke@435 | 936 | // +--------------+ <--- O4_args (misaligned) and Lesp if prior is not C2I |
duke@435 | 937 | // | | | |
duke@435 | 938 | // : unused : |---Space for max Java stack, plus stack alignment |
duke@435 | 939 | // | | | |
duke@435 | 940 | // +--------------+ <--- SP + 16*wordsize |
duke@435 | 941 | // | | |
duke@435 | 942 | // : window : |
duke@435 | 943 | // | | |
duke@435 | 944 | // +--------------+ <--- SP |
duke@435 | 945 | |
duke@435 | 946 | // WE REPACK THE STACK. We use the common calling convention layout as |
duke@435 | 947 | // discovered by calling SharedRuntime::calling_convention. We assume it |
duke@435 | 948 | // causes an arbitrary shuffle of memory, which may require some register |
duke@435 | 949 | // temps to do the shuffle. We hope for (and optimize for) the case where |
duke@435 | 950 | // temps are not needed. We may have to resize the stack slightly, in case |
duke@435 | 951 | // we need alignment padding (32-bit interpreter can pass longs & doubles |
duke@435 | 952 | // misaligned, but the compilers expect them aligned). |
duke@435 | 953 | // |
duke@435 | 954 | // | | |
duke@435 | 955 | // : java stack : |
duke@435 | 956 | // | | |
duke@435 | 957 | // +--------------+ <--- start of outgoing args |
duke@435 | 958 | // | pad, align | | |
duke@435 | 959 | // +--------------+ | |
duke@435 | 960 | // | ints, floats | |---Outgoing stack args, packed low. |
duke@435 | 961 | // +--------------+ | First few args in registers. |
duke@435 | 962 | // : doubles : | |
duke@435 | 963 | // | longs | | |
duke@435 | 964 | // +--------------+ <--- SP' + 16*wordsize |
duke@435 | 965 | // | | |
duke@435 | 966 | // : window : |
duke@435 | 967 | // | | |
duke@435 | 968 | // +--------------+ <--- SP' |
duke@435 | 969 | |
duke@435 | 970 | // ON EXIT FROM THE CODE WE ARE MAKING, WE STILL HAVE AN INTERPRETED FRAME |
duke@435 | 971 | // WITH O7 HOLDING A VALID RETURN PC - ITS JUST THAT THE ARGS ARE NOW SETUP |
duke@435 | 972 | // FOR COMPILED CODE AND THE FRAME SLIGHTLY GROWN. |
duke@435 | 973 | |
duke@435 | 974 | // Cut-out for having no stack args. Since up to 6 args are passed |
duke@435 | 975 | // in registers, we will commonly have no stack args. |
duke@435 | 976 | if (comp_args_on_stack > 0) { |
duke@435 | 977 | |
duke@435 | 978 | // Convert VMReg stack slots to words. |
duke@435 | 979 | int comp_words_on_stack = round_to(comp_args_on_stack*VMRegImpl::stack_slot_size, wordSize)>>LogBytesPerWord; |
duke@435 | 980 | // Round up to miminum stack alignment, in wordSize |
duke@435 | 981 | comp_words_on_stack = round_to(comp_words_on_stack, 2); |
duke@435 | 982 | // Now compute the distance from Lesp to SP. This calculation does not |
duke@435 | 983 | // include the space for total_args_passed because Lesp has not yet popped |
duke@435 | 984 | // the arguments. |
duke@435 | 985 | __ sub(SP, (comp_words_on_stack)*wordSize, SP); |
duke@435 | 986 | } |
duke@435 | 987 | |
duke@435 | 988 | // Will jump to the compiled code just as if compiled code was doing it. |
duke@435 | 989 | // Pre-load the register-jump target early, to schedule it better. |
duke@435 | 990 | __ ld_ptr(G5_method, in_bytes(methodOopDesc::from_compiled_offset()), G3); |
duke@435 | 991 | |
duke@435 | 992 | // Now generate the shuffle code. Pick up all register args and move the |
duke@435 | 993 | // rest through G1_scratch. |
duke@435 | 994 | for (int i=0; i<total_args_passed; i++) { |
duke@435 | 995 | if (sig_bt[i] == T_VOID) { |
duke@435 | 996 | // Longs and doubles are passed in native word order, but misaligned |
duke@435 | 997 | // in the 32-bit build. |
duke@435 | 998 | assert(i > 0 && (sig_bt[i-1] == T_LONG || sig_bt[i-1] == T_DOUBLE), "missing half"); |
duke@435 | 999 | continue; |
duke@435 | 1000 | } |
duke@435 | 1001 | |
duke@435 | 1002 | // Pick up 0, 1 or 2 words from Lesp+offset. Assume mis-aligned in the |
duke@435 | 1003 | // 32-bit build and aligned in the 64-bit build. Look for the obvious |
duke@435 | 1004 | // ldx/lddf optimizations. |
duke@435 | 1005 | |
duke@435 | 1006 | // Load in argument order going down. |
twisti@1861 | 1007 | const int ld_off = (total_args_passed-i)*Interpreter::stackElementSize; |
duke@435 | 1008 | set_Rdisp(G1_scratch); |
duke@435 | 1009 | |
duke@435 | 1010 | VMReg r_1 = regs[i].first(); |
duke@435 | 1011 | VMReg r_2 = regs[i].second(); |
duke@435 | 1012 | if (!r_1->is_valid()) { |
duke@435 | 1013 | assert(!r_2->is_valid(), ""); |
duke@435 | 1014 | continue; |
duke@435 | 1015 | } |
duke@435 | 1016 | if (r_1->is_stack()) { // Pretend stack targets are loaded into F8/F9 |
duke@435 | 1017 | r_1 = F8->as_VMReg(); // as part of the load/store shuffle |
duke@435 | 1018 | if (r_2->is_valid()) r_2 = r_1->next(); |
duke@435 | 1019 | } |
duke@435 | 1020 | if (r_1->is_Register()) { // Register argument |
duke@435 | 1021 | Register r = r_1->as_Register()->after_restore(); |
duke@435 | 1022 | if (!r_2->is_valid()) { |
duke@435 | 1023 | __ ld(Gargs, arg_slot(ld_off), r); |
duke@435 | 1024 | } else { |
duke@435 | 1025 | #ifdef _LP64 |
duke@435 | 1026 | // In V9, longs are given 2 64-bit slots in the interpreter, but the |
duke@435 | 1027 | // data is passed in only 1 slot. |
twisti@1441 | 1028 | RegisterOrConstant slot = (sig_bt[i] == T_LONG) ? |
duke@435 | 1029 | next_arg_slot(ld_off) : arg_slot(ld_off); |
duke@435 | 1030 | __ ldx(Gargs, slot, r); |
duke@435 | 1031 | #else |
duke@435 | 1032 | // Need to load a 64-bit value into G1/G4, but G1/G4 is being used in the |
duke@435 | 1033 | // stack shuffle. Load the first 2 longs into G1/G4 later. |
duke@435 | 1034 | #endif |
duke@435 | 1035 | } |
duke@435 | 1036 | } else { |
duke@435 | 1037 | assert(r_1->is_FloatRegister(), ""); |
duke@435 | 1038 | if (!r_2->is_valid()) { |
duke@435 | 1039 | __ ldf(FloatRegisterImpl::S, Gargs, arg_slot(ld_off), r_1->as_FloatRegister()); |
duke@435 | 1040 | } else { |
duke@435 | 1041 | #ifdef _LP64 |
duke@435 | 1042 | // In V9, doubles are given 2 64-bit slots in the interpreter, but the |
duke@435 | 1043 | // data is passed in only 1 slot. This code also handles longs that |
duke@435 | 1044 | // are passed on the stack, but need a stack-to-stack move through a |
duke@435 | 1045 | // spare float register. |
twisti@1441 | 1046 | RegisterOrConstant slot = (sig_bt[i] == T_LONG || sig_bt[i] == T_DOUBLE) ? |
duke@435 | 1047 | next_arg_slot(ld_off) : arg_slot(ld_off); |
duke@435 | 1048 | __ ldf(FloatRegisterImpl::D, Gargs, slot, r_1->as_FloatRegister()); |
duke@435 | 1049 | #else |
duke@435 | 1050 | // Need to marshal 64-bit value from misaligned Lesp loads |
duke@435 | 1051 | __ ldf(FloatRegisterImpl::S, Gargs, next_arg_slot(ld_off), r_1->as_FloatRegister()); |
duke@435 | 1052 | __ ldf(FloatRegisterImpl::S, Gargs, arg_slot(ld_off), r_2->as_FloatRegister()); |
duke@435 | 1053 | #endif |
duke@435 | 1054 | } |
duke@435 | 1055 | } |
duke@435 | 1056 | // Was the argument really intended to be on the stack, but was loaded |
duke@435 | 1057 | // into F8/F9? |
duke@435 | 1058 | if (regs[i].first()->is_stack()) { |
duke@435 | 1059 | assert(r_1->as_FloatRegister() == F8, "fix this code"); |
duke@435 | 1060 | // Convert stack slot to an SP offset |
duke@435 | 1061 | int st_off = reg2offset(regs[i].first()) + STACK_BIAS; |
duke@435 | 1062 | // Store down the shuffled stack word. Target address _is_ aligned. |
twisti@1441 | 1063 | RegisterOrConstant slot = __ ensure_simm13_or_reg(st_off, Rdisp); |
twisti@1441 | 1064 | if (!r_2->is_valid()) __ stf(FloatRegisterImpl::S, r_1->as_FloatRegister(), SP, slot); |
twisti@1441 | 1065 | else __ stf(FloatRegisterImpl::D, r_1->as_FloatRegister(), SP, slot); |
duke@435 | 1066 | } |
duke@435 | 1067 | } |
duke@435 | 1068 | bool made_space = false; |
duke@435 | 1069 | #ifndef _LP64 |
duke@435 | 1070 | // May need to pick up a few long args in G1/G4 |
duke@435 | 1071 | bool g4_crushed = false; |
duke@435 | 1072 | bool g3_crushed = false; |
duke@435 | 1073 | for (int i=0; i<total_args_passed; i++) { |
duke@435 | 1074 | if (regs[i].first()->is_Register() && regs[i].second()->is_valid()) { |
duke@435 | 1075 | // Load in argument order going down |
twisti@1861 | 1076 | int ld_off = (total_args_passed-i)*Interpreter::stackElementSize; |
duke@435 | 1077 | // Need to marshal 64-bit value from misaligned Lesp loads |
duke@435 | 1078 | Register r = regs[i].first()->as_Register()->after_restore(); |
duke@435 | 1079 | if (r == G1 || r == G4) { |
duke@435 | 1080 | assert(!g4_crushed, "ordering problem"); |
duke@435 | 1081 | if (r == G4){ |
duke@435 | 1082 | g4_crushed = true; |
duke@435 | 1083 | __ lduw(Gargs, arg_slot(ld_off) , G3_scratch); // Load lo bits |
duke@435 | 1084 | __ ld (Gargs, next_arg_slot(ld_off), r); // Load hi bits |
duke@435 | 1085 | } else { |
duke@435 | 1086 | // better schedule this way |
duke@435 | 1087 | __ ld (Gargs, next_arg_slot(ld_off), r); // Load hi bits |
duke@435 | 1088 | __ lduw(Gargs, arg_slot(ld_off) , G3_scratch); // Load lo bits |
duke@435 | 1089 | } |
duke@435 | 1090 | g3_crushed = true; |
duke@435 | 1091 | __ sllx(r, 32, r); |
duke@435 | 1092 | __ or3(G3_scratch, r, r); |
duke@435 | 1093 | } else { |
duke@435 | 1094 | assert(r->is_out(), "longs passed in two O registers"); |
duke@435 | 1095 | __ ld (Gargs, arg_slot(ld_off) , r->successor()); // Load lo bits |
duke@435 | 1096 | __ ld (Gargs, next_arg_slot(ld_off), r); // Load hi bits |
duke@435 | 1097 | } |
duke@435 | 1098 | } |
duke@435 | 1099 | } |
duke@435 | 1100 | #endif |
duke@435 | 1101 | |
duke@435 | 1102 | // Jump to the compiled code just as if compiled code was doing it. |
duke@435 | 1103 | // |
duke@435 | 1104 | #ifndef _LP64 |
duke@435 | 1105 | if (g3_crushed) { |
duke@435 | 1106 | // Rats load was wasted, at least it is in cache... |
twisti@1162 | 1107 | __ ld_ptr(G5_method, methodOopDesc::from_compiled_offset(), G3); |
duke@435 | 1108 | } |
duke@435 | 1109 | #endif /* _LP64 */ |
duke@435 | 1110 | |
duke@435 | 1111 | // 6243940 We might end up in handle_wrong_method if |
duke@435 | 1112 | // the callee is deoptimized as we race thru here. If that |
duke@435 | 1113 | // happens we don't want to take a safepoint because the |
duke@435 | 1114 | // caller frame will look interpreted and arguments are now |
duke@435 | 1115 | // "compiled" so it is much better to make this transition |
duke@435 | 1116 | // invisible to the stack walking code. Unfortunately if |
duke@435 | 1117 | // we try and find the callee by normal means a safepoint |
duke@435 | 1118 | // is possible. So we stash the desired callee in the thread |
duke@435 | 1119 | // and the vm will find there should this case occur. |
twisti@1162 | 1120 | Address callee_target_addr(G2_thread, JavaThread::callee_target_offset()); |
duke@435 | 1121 | __ st_ptr(G5_method, callee_target_addr); |
duke@435 | 1122 | |
duke@435 | 1123 | if (StressNonEntrant) { |
duke@435 | 1124 | // Open a big window for deopt failure |
duke@435 | 1125 | __ save_frame(0); |
duke@435 | 1126 | __ mov(G0, L0); |
duke@435 | 1127 | Label loop; |
duke@435 | 1128 | __ bind(loop); |
duke@435 | 1129 | __ sub(L0, 1, L0); |
kvn@3037 | 1130 | __ br_null_short(L0, Assembler::pt, loop); |
duke@435 | 1131 | |
duke@435 | 1132 | __ restore(); |
duke@435 | 1133 | } |
duke@435 | 1134 | |
duke@435 | 1135 | |
duke@435 | 1136 | __ jmpl(G3, 0, G0); |
duke@435 | 1137 | __ delayed()->nop(); |
duke@435 | 1138 | } |
duke@435 | 1139 | |
duke@435 | 1140 | // --------------------------------------------------------------- |
duke@435 | 1141 | AdapterHandlerEntry* SharedRuntime::generate_i2c2i_adapters(MacroAssembler *masm, |
duke@435 | 1142 | int total_args_passed, |
duke@435 | 1143 | // VMReg max_arg, |
duke@435 | 1144 | int comp_args_on_stack, // VMRegStackSlots |
duke@435 | 1145 | const BasicType *sig_bt, |
never@1622 | 1146 | const VMRegPair *regs, |
never@1622 | 1147 | AdapterFingerPrint* fingerprint) { |
duke@435 | 1148 | address i2c_entry = __ pc(); |
duke@435 | 1149 | |
duke@435 | 1150 | AdapterGenerator agen(masm); |
duke@435 | 1151 | |
duke@435 | 1152 | agen.gen_i2c_adapter(total_args_passed, comp_args_on_stack, sig_bt, regs); |
duke@435 | 1153 | |
duke@435 | 1154 | |
duke@435 | 1155 | // ------------------------------------------------------------------------- |
duke@435 | 1156 | // Generate a C2I adapter. On entry we know G5 holds the methodOop. The |
duke@435 | 1157 | // args start out packed in the compiled layout. They need to be unpacked |
duke@435 | 1158 | // into the interpreter layout. This will almost always require some stack |
duke@435 | 1159 | // space. We grow the current (compiled) stack, then repack the args. We |
duke@435 | 1160 | // finally end in a jump to the generic interpreter entry point. On exit |
duke@435 | 1161 | // from the interpreter, the interpreter will restore our SP (lest the |
duke@435 | 1162 | // compiled code, which relys solely on SP and not FP, get sick). |
duke@435 | 1163 | |
duke@435 | 1164 | address c2i_unverified_entry = __ pc(); |
duke@435 | 1165 | Label skip_fixup; |
duke@435 | 1166 | { |
duke@435 | 1167 | #if !defined(_LP64) && defined(COMPILER2) |
duke@435 | 1168 | Register R_temp = L0; // another scratch register |
duke@435 | 1169 | #else |
duke@435 | 1170 | Register R_temp = G1; // another scratch register |
duke@435 | 1171 | #endif |
duke@435 | 1172 | |
twisti@1162 | 1173 | AddressLiteral ic_miss(SharedRuntime::get_ic_miss_stub()); |
duke@435 | 1174 | |
duke@435 | 1175 | __ verify_oop(O0); |
duke@435 | 1176 | __ verify_oop(G5_method); |
coleenp@548 | 1177 | __ load_klass(O0, G3_scratch); |
duke@435 | 1178 | __ verify_oop(G3_scratch); |
duke@435 | 1179 | |
duke@435 | 1180 | #if !defined(_LP64) && defined(COMPILER2) |
duke@435 | 1181 | __ save(SP, -frame::register_save_words*wordSize, SP); |
duke@435 | 1182 | __ ld_ptr(G5_method, compiledICHolderOopDesc::holder_klass_offset(), R_temp); |
duke@435 | 1183 | __ verify_oop(R_temp); |
duke@435 | 1184 | __ cmp(G3_scratch, R_temp); |
duke@435 | 1185 | __ restore(); |
duke@435 | 1186 | #else |
duke@435 | 1187 | __ ld_ptr(G5_method, compiledICHolderOopDesc::holder_klass_offset(), R_temp); |
duke@435 | 1188 | __ verify_oop(R_temp); |
duke@435 | 1189 | __ cmp(G3_scratch, R_temp); |
duke@435 | 1190 | #endif |
duke@435 | 1191 | |
duke@435 | 1192 | Label ok, ok2; |
duke@435 | 1193 | __ brx(Assembler::equal, false, Assembler::pt, ok); |
duke@435 | 1194 | __ delayed()->ld_ptr(G5_method, compiledICHolderOopDesc::holder_method_offset(), G5_method); |
twisti@1162 | 1195 | __ jump_to(ic_miss, G3_scratch); |
duke@435 | 1196 | __ delayed()->nop(); |
duke@435 | 1197 | |
duke@435 | 1198 | __ bind(ok); |
duke@435 | 1199 | // Method might have been compiled since the call site was patched to |
duke@435 | 1200 | // interpreted if that is the case treat it as a miss so we can get |
duke@435 | 1201 | // the call site corrected. |
duke@435 | 1202 | __ ld_ptr(G5_method, in_bytes(methodOopDesc::code_offset()), G3_scratch); |
duke@435 | 1203 | __ bind(ok2); |
kvn@3037 | 1204 | __ br_null(G3_scratch, false, Assembler::pt, skip_fixup); |
duke@435 | 1205 | __ delayed()->ld_ptr(G5_method, in_bytes(methodOopDesc::interpreter_entry_offset()), G3_scratch); |
twisti@1162 | 1206 | __ jump_to(ic_miss, G3_scratch); |
duke@435 | 1207 | __ delayed()->nop(); |
duke@435 | 1208 | |
duke@435 | 1209 | } |
duke@435 | 1210 | |
duke@435 | 1211 | address c2i_entry = __ pc(); |
duke@435 | 1212 | |
duke@435 | 1213 | agen.gen_c2i_adapter(total_args_passed, comp_args_on_stack, sig_bt, regs, skip_fixup); |
duke@435 | 1214 | |
duke@435 | 1215 | __ flush(); |
never@1622 | 1216 | return AdapterHandlerLibrary::new_entry(fingerprint, i2c_entry, c2i_entry, c2i_unverified_entry); |
duke@435 | 1217 | |
duke@435 | 1218 | } |
duke@435 | 1219 | |
duke@435 | 1220 | // Helper function for native calling conventions |
duke@435 | 1221 | static VMReg int_stk_helper( int i ) { |
duke@435 | 1222 | // Bias any stack based VMReg we get by ignoring the window area |
duke@435 | 1223 | // but not the register parameter save area. |
duke@435 | 1224 | // |
duke@435 | 1225 | // This is strange for the following reasons. We'd normally expect |
duke@435 | 1226 | // the calling convention to return an VMReg for a stack slot |
duke@435 | 1227 | // completely ignoring any abi reserved area. C2 thinks of that |
duke@435 | 1228 | // abi area as only out_preserve_stack_slots. This does not include |
duke@435 | 1229 | // the area allocated by the C abi to store down integer arguments |
duke@435 | 1230 | // because the java calling convention does not use it. So |
duke@435 | 1231 | // since c2 assumes that there are only out_preserve_stack_slots |
duke@435 | 1232 | // to bias the optoregs (which impacts VMRegs) when actually referencing any actual stack |
duke@435 | 1233 | // location the c calling convention must add in this bias amount |
duke@435 | 1234 | // to make up for the fact that the out_preserve_stack_slots is |
duke@435 | 1235 | // insufficient for C calls. What a mess. I sure hope those 6 |
duke@435 | 1236 | // stack words were worth it on every java call! |
duke@435 | 1237 | |
duke@435 | 1238 | // Another way of cleaning this up would be for out_preserve_stack_slots |
duke@435 | 1239 | // to take a parameter to say whether it was C or java calling conventions. |
duke@435 | 1240 | // Then things might look a little better (but not much). |
duke@435 | 1241 | |
duke@435 | 1242 | int mem_parm_offset = i - SPARC_ARGS_IN_REGS_NUM; |
duke@435 | 1243 | if( mem_parm_offset < 0 ) { |
duke@435 | 1244 | return as_oRegister(i)->as_VMReg(); |
duke@435 | 1245 | } else { |
duke@435 | 1246 | int actual_offset = (mem_parm_offset + frame::memory_parameter_word_sp_offset) * VMRegImpl::slots_per_word; |
duke@435 | 1247 | // Now return a biased offset that will be correct when out_preserve_slots is added back in |
duke@435 | 1248 | return VMRegImpl::stack2reg(actual_offset - SharedRuntime::out_preserve_stack_slots()); |
duke@435 | 1249 | } |
duke@435 | 1250 | } |
duke@435 | 1251 | |
duke@435 | 1252 | |
duke@435 | 1253 | int SharedRuntime::c_calling_convention(const BasicType *sig_bt, |
duke@435 | 1254 | VMRegPair *regs, |
duke@435 | 1255 | int total_args_passed) { |
duke@435 | 1256 | |
duke@435 | 1257 | // Return the number of VMReg stack_slots needed for the args. |
duke@435 | 1258 | // This value does not include an abi space (like register window |
duke@435 | 1259 | // save area). |
duke@435 | 1260 | |
duke@435 | 1261 | // The native convention is V8 if !LP64 |
duke@435 | 1262 | // The LP64 convention is the V9 convention which is slightly more sane. |
duke@435 | 1263 | |
duke@435 | 1264 | // We return the amount of VMReg stack slots we need to reserve for all |
duke@435 | 1265 | // the arguments NOT counting out_preserve_stack_slots. Since we always |
duke@435 | 1266 | // have space for storing at least 6 registers to memory we start with that. |
duke@435 | 1267 | // See int_stk_helper for a further discussion. |
duke@435 | 1268 | int max_stack_slots = (frame::varargs_offset * VMRegImpl::slots_per_word) - SharedRuntime::out_preserve_stack_slots(); |
duke@435 | 1269 | |
duke@435 | 1270 | #ifdef _LP64 |
duke@435 | 1271 | // V9 convention: All things "as-if" on double-wide stack slots. |
duke@435 | 1272 | // Hoist any int/ptr/long's in the first 6 to int regs. |
duke@435 | 1273 | // Hoist any flt/dbl's in the first 16 dbl regs. |
duke@435 | 1274 | int j = 0; // Count of actual args, not HALVES |
duke@435 | 1275 | for( int i=0; i<total_args_passed; i++, j++ ) { |
duke@435 | 1276 | switch( sig_bt[i] ) { |
duke@435 | 1277 | case T_BOOLEAN: |
duke@435 | 1278 | case T_BYTE: |
duke@435 | 1279 | case T_CHAR: |
duke@435 | 1280 | case T_INT: |
duke@435 | 1281 | case T_SHORT: |
duke@435 | 1282 | regs[i].set1( int_stk_helper( j ) ); break; |
duke@435 | 1283 | case T_LONG: |
duke@435 | 1284 | assert( sig_bt[i+1] == T_VOID, "expecting half" ); |
duke@435 | 1285 | case T_ADDRESS: // raw pointers, like current thread, for VM calls |
duke@435 | 1286 | case T_ARRAY: |
duke@435 | 1287 | case T_OBJECT: |
duke@435 | 1288 | regs[i].set2( int_stk_helper( j ) ); |
duke@435 | 1289 | break; |
duke@435 | 1290 | case T_FLOAT: |
duke@435 | 1291 | if ( j < 16 ) { |
duke@435 | 1292 | // V9ism: floats go in ODD registers |
duke@435 | 1293 | regs[i].set1(as_FloatRegister(1 + (j<<1))->as_VMReg()); |
duke@435 | 1294 | } else { |
duke@435 | 1295 | // V9ism: floats go in ODD stack slot |
duke@435 | 1296 | regs[i].set1(VMRegImpl::stack2reg(1 + (j<<1))); |
duke@435 | 1297 | } |
duke@435 | 1298 | break; |
duke@435 | 1299 | case T_DOUBLE: |
duke@435 | 1300 | assert( sig_bt[i+1] == T_VOID, "expecting half" ); |
duke@435 | 1301 | if ( j < 16 ) { |
duke@435 | 1302 | // V9ism: doubles go in EVEN/ODD regs |
duke@435 | 1303 | regs[i].set2(as_FloatRegister(j<<1)->as_VMReg()); |
duke@435 | 1304 | } else { |
duke@435 | 1305 | // V9ism: doubles go in EVEN/ODD stack slots |
duke@435 | 1306 | regs[i].set2(VMRegImpl::stack2reg(j<<1)); |
duke@435 | 1307 | } |
duke@435 | 1308 | break; |
duke@435 | 1309 | case T_VOID: regs[i].set_bad(); j--; break; // Do not count HALVES |
duke@435 | 1310 | default: |
duke@435 | 1311 | ShouldNotReachHere(); |
duke@435 | 1312 | } |
duke@435 | 1313 | if (regs[i].first()->is_stack()) { |
duke@435 | 1314 | int off = regs[i].first()->reg2stack(); |
duke@435 | 1315 | if (off > max_stack_slots) max_stack_slots = off; |
duke@435 | 1316 | } |
duke@435 | 1317 | if (regs[i].second()->is_stack()) { |
duke@435 | 1318 | int off = regs[i].second()->reg2stack(); |
duke@435 | 1319 | if (off > max_stack_slots) max_stack_slots = off; |
duke@435 | 1320 | } |
duke@435 | 1321 | } |
duke@435 | 1322 | |
duke@435 | 1323 | #else // _LP64 |
duke@435 | 1324 | // V8 convention: first 6 things in O-regs, rest on stack. |
duke@435 | 1325 | // Alignment is willy-nilly. |
duke@435 | 1326 | for( int i=0; i<total_args_passed; i++ ) { |
duke@435 | 1327 | switch( sig_bt[i] ) { |
duke@435 | 1328 | case T_ADDRESS: // raw pointers, like current thread, for VM calls |
duke@435 | 1329 | case T_ARRAY: |
duke@435 | 1330 | case T_BOOLEAN: |
duke@435 | 1331 | case T_BYTE: |
duke@435 | 1332 | case T_CHAR: |
duke@435 | 1333 | case T_FLOAT: |
duke@435 | 1334 | case T_INT: |
duke@435 | 1335 | case T_OBJECT: |
duke@435 | 1336 | case T_SHORT: |
duke@435 | 1337 | regs[i].set1( int_stk_helper( i ) ); |
duke@435 | 1338 | break; |
duke@435 | 1339 | case T_DOUBLE: |
duke@435 | 1340 | case T_LONG: |
duke@435 | 1341 | assert( sig_bt[i+1] == T_VOID, "expecting half" ); |
duke@435 | 1342 | regs[i].set_pair( int_stk_helper( i+1 ), int_stk_helper( i ) ); |
duke@435 | 1343 | break; |
duke@435 | 1344 | case T_VOID: regs[i].set_bad(); break; |
duke@435 | 1345 | default: |
duke@435 | 1346 | ShouldNotReachHere(); |
duke@435 | 1347 | } |
duke@435 | 1348 | if (regs[i].first()->is_stack()) { |
duke@435 | 1349 | int off = regs[i].first()->reg2stack(); |
duke@435 | 1350 | if (off > max_stack_slots) max_stack_slots = off; |
duke@435 | 1351 | } |
duke@435 | 1352 | if (regs[i].second()->is_stack()) { |
duke@435 | 1353 | int off = regs[i].second()->reg2stack(); |
duke@435 | 1354 | if (off > max_stack_slots) max_stack_slots = off; |
duke@435 | 1355 | } |
duke@435 | 1356 | } |
duke@435 | 1357 | #endif // _LP64 |
duke@435 | 1358 | |
duke@435 | 1359 | return round_to(max_stack_slots + 1, 2); |
duke@435 | 1360 | |
duke@435 | 1361 | } |
duke@435 | 1362 | |
duke@435 | 1363 | |
duke@435 | 1364 | // --------------------------------------------------------------------------- |
duke@435 | 1365 | void SharedRuntime::save_native_result(MacroAssembler *masm, BasicType ret_type, int frame_slots) { |
duke@435 | 1366 | switch (ret_type) { |
duke@435 | 1367 | case T_FLOAT: |
duke@435 | 1368 | __ stf(FloatRegisterImpl::S, F0, SP, frame_slots*VMRegImpl::stack_slot_size - 4+STACK_BIAS); |
duke@435 | 1369 | break; |
duke@435 | 1370 | case T_DOUBLE: |
duke@435 | 1371 | __ stf(FloatRegisterImpl::D, F0, SP, frame_slots*VMRegImpl::stack_slot_size - 8+STACK_BIAS); |
duke@435 | 1372 | break; |
duke@435 | 1373 | } |
duke@435 | 1374 | } |
duke@435 | 1375 | |
duke@435 | 1376 | void SharedRuntime::restore_native_result(MacroAssembler *masm, BasicType ret_type, int frame_slots) { |
duke@435 | 1377 | switch (ret_type) { |
duke@435 | 1378 | case T_FLOAT: |
duke@435 | 1379 | __ ldf(FloatRegisterImpl::S, SP, frame_slots*VMRegImpl::stack_slot_size - 4+STACK_BIAS, F0); |
duke@435 | 1380 | break; |
duke@435 | 1381 | case T_DOUBLE: |
duke@435 | 1382 | __ ldf(FloatRegisterImpl::D, SP, frame_slots*VMRegImpl::stack_slot_size - 8+STACK_BIAS, F0); |
duke@435 | 1383 | break; |
duke@435 | 1384 | } |
duke@435 | 1385 | } |
duke@435 | 1386 | |
duke@435 | 1387 | // Check and forward and pending exception. Thread is stored in |
duke@435 | 1388 | // L7_thread_cache and possibly NOT in G2_thread. Since this is a native call, there |
duke@435 | 1389 | // is no exception handler. We merely pop this frame off and throw the |
duke@435 | 1390 | // exception in the caller's frame. |
duke@435 | 1391 | static void check_forward_pending_exception(MacroAssembler *masm, Register Rex_oop) { |
duke@435 | 1392 | Label L; |
duke@435 | 1393 | __ br_null(Rex_oop, false, Assembler::pt, L); |
duke@435 | 1394 | __ delayed()->mov(L7_thread_cache, G2_thread); // restore in case we have exception |
duke@435 | 1395 | // Since this is a native call, we *know* the proper exception handler |
duke@435 | 1396 | // without calling into the VM: it's the empty function. Just pop this |
duke@435 | 1397 | // frame and then jump to forward_exception_entry; O7 will contain the |
duke@435 | 1398 | // native caller's return PC. |
twisti@1162 | 1399 | AddressLiteral exception_entry(StubRoutines::forward_exception_entry()); |
twisti@1162 | 1400 | __ jump_to(exception_entry, G3_scratch); |
duke@435 | 1401 | __ delayed()->restore(); // Pop this frame off. |
duke@435 | 1402 | __ bind(L); |
duke@435 | 1403 | } |
duke@435 | 1404 | |
duke@435 | 1405 | // A simple move of integer like type |
duke@435 | 1406 | static void simple_move32(MacroAssembler* masm, VMRegPair src, VMRegPair dst) { |
duke@435 | 1407 | if (src.first()->is_stack()) { |
duke@435 | 1408 | if (dst.first()->is_stack()) { |
duke@435 | 1409 | // stack to stack |
duke@435 | 1410 | __ ld(FP, reg2offset(src.first()) + STACK_BIAS, L5); |
duke@435 | 1411 | __ st(L5, SP, reg2offset(dst.first()) + STACK_BIAS); |
duke@435 | 1412 | } else { |
duke@435 | 1413 | // stack to reg |
duke@435 | 1414 | __ ld(FP, reg2offset(src.first()) + STACK_BIAS, dst.first()->as_Register()); |
duke@435 | 1415 | } |
duke@435 | 1416 | } else if (dst.first()->is_stack()) { |
duke@435 | 1417 | // reg to stack |
duke@435 | 1418 | __ st(src.first()->as_Register(), SP, reg2offset(dst.first()) + STACK_BIAS); |
duke@435 | 1419 | } else { |
duke@435 | 1420 | __ mov(src.first()->as_Register(), dst.first()->as_Register()); |
duke@435 | 1421 | } |
duke@435 | 1422 | } |
duke@435 | 1423 | |
duke@435 | 1424 | // On 64 bit we will store integer like items to the stack as |
duke@435 | 1425 | // 64 bits items (sparc abi) even though java would only store |
duke@435 | 1426 | // 32bits for a parameter. On 32bit it will simply be 32 bits |
duke@435 | 1427 | // So this routine will do 32->32 on 32bit and 32->64 on 64bit |
duke@435 | 1428 | static void move32_64(MacroAssembler* masm, VMRegPair src, VMRegPair dst) { |
duke@435 | 1429 | if (src.first()->is_stack()) { |
duke@435 | 1430 | if (dst.first()->is_stack()) { |
duke@435 | 1431 | // stack to stack |
duke@435 | 1432 | __ ld(FP, reg2offset(src.first()) + STACK_BIAS, L5); |
duke@435 | 1433 | __ st_ptr(L5, SP, reg2offset(dst.first()) + STACK_BIAS); |
duke@435 | 1434 | } else { |
duke@435 | 1435 | // stack to reg |
duke@435 | 1436 | __ ld(FP, reg2offset(src.first()) + STACK_BIAS, dst.first()->as_Register()); |
duke@435 | 1437 | } |
duke@435 | 1438 | } else if (dst.first()->is_stack()) { |
duke@435 | 1439 | // reg to stack |
duke@435 | 1440 | __ st_ptr(src.first()->as_Register(), SP, reg2offset(dst.first()) + STACK_BIAS); |
duke@435 | 1441 | } else { |
duke@435 | 1442 | __ mov(src.first()->as_Register(), dst.first()->as_Register()); |
duke@435 | 1443 | } |
duke@435 | 1444 | } |
duke@435 | 1445 | |
duke@435 | 1446 | |
duke@435 | 1447 | // An oop arg. Must pass a handle not the oop itself |
duke@435 | 1448 | static void object_move(MacroAssembler* masm, |
duke@435 | 1449 | OopMap* map, |
duke@435 | 1450 | int oop_handle_offset, |
duke@435 | 1451 | int framesize_in_slots, |
duke@435 | 1452 | VMRegPair src, |
duke@435 | 1453 | VMRegPair dst, |
duke@435 | 1454 | bool is_receiver, |
duke@435 | 1455 | int* receiver_offset) { |
duke@435 | 1456 | |
duke@435 | 1457 | // must pass a handle. First figure out the location we use as a handle |
duke@435 | 1458 | |
duke@435 | 1459 | if (src.first()->is_stack()) { |
duke@435 | 1460 | // Oop is already on the stack |
duke@435 | 1461 | Register rHandle = dst.first()->is_stack() ? L5 : dst.first()->as_Register(); |
duke@435 | 1462 | __ add(FP, reg2offset(src.first()) + STACK_BIAS, rHandle); |
duke@435 | 1463 | __ ld_ptr(rHandle, 0, L4); |
duke@435 | 1464 | #ifdef _LP64 |
duke@435 | 1465 | __ movr( Assembler::rc_z, L4, G0, rHandle ); |
duke@435 | 1466 | #else |
duke@435 | 1467 | __ tst( L4 ); |
duke@435 | 1468 | __ movcc( Assembler::zero, false, Assembler::icc, G0, rHandle ); |
duke@435 | 1469 | #endif |
duke@435 | 1470 | if (dst.first()->is_stack()) { |
duke@435 | 1471 | __ st_ptr(rHandle, SP, reg2offset(dst.first()) + STACK_BIAS); |
duke@435 | 1472 | } |
duke@435 | 1473 | int offset_in_older_frame = src.first()->reg2stack() + SharedRuntime::out_preserve_stack_slots(); |
duke@435 | 1474 | if (is_receiver) { |
duke@435 | 1475 | *receiver_offset = (offset_in_older_frame + framesize_in_slots) * VMRegImpl::stack_slot_size; |
duke@435 | 1476 | } |
duke@435 | 1477 | map->set_oop(VMRegImpl::stack2reg(offset_in_older_frame + framesize_in_slots)); |
duke@435 | 1478 | } else { |
duke@435 | 1479 | // Oop is in an input register pass we must flush it to the stack |
duke@435 | 1480 | const Register rOop = src.first()->as_Register(); |
duke@435 | 1481 | const Register rHandle = L5; |
duke@435 | 1482 | int oop_slot = rOop->input_number() * VMRegImpl::slots_per_word + oop_handle_offset; |
duke@435 | 1483 | int offset = oop_slot*VMRegImpl::stack_slot_size; |
duke@435 | 1484 | Label skip; |
duke@435 | 1485 | __ st_ptr(rOop, SP, offset + STACK_BIAS); |
duke@435 | 1486 | if (is_receiver) { |
duke@435 | 1487 | *receiver_offset = oop_slot * VMRegImpl::stack_slot_size; |
duke@435 | 1488 | } |
duke@435 | 1489 | map->set_oop(VMRegImpl::stack2reg(oop_slot)); |
duke@435 | 1490 | __ add(SP, offset + STACK_BIAS, rHandle); |
duke@435 | 1491 | #ifdef _LP64 |
duke@435 | 1492 | __ movr( Assembler::rc_z, rOop, G0, rHandle ); |
duke@435 | 1493 | #else |
duke@435 | 1494 | __ tst( rOop ); |
duke@435 | 1495 | __ movcc( Assembler::zero, false, Assembler::icc, G0, rHandle ); |
duke@435 | 1496 | #endif |
duke@435 | 1497 | |
duke@435 | 1498 | if (dst.first()->is_stack()) { |
duke@435 | 1499 | __ st_ptr(rHandle, SP, reg2offset(dst.first()) + STACK_BIAS); |
duke@435 | 1500 | } else { |
duke@435 | 1501 | __ mov(rHandle, dst.first()->as_Register()); |
duke@435 | 1502 | } |
duke@435 | 1503 | } |
duke@435 | 1504 | } |
duke@435 | 1505 | |
duke@435 | 1506 | // A float arg may have to do float reg int reg conversion |
duke@435 | 1507 | static void float_move(MacroAssembler* masm, VMRegPair src, VMRegPair dst) { |
duke@435 | 1508 | assert(!src.second()->is_valid() && !dst.second()->is_valid(), "bad float_move"); |
duke@435 | 1509 | |
duke@435 | 1510 | if (src.first()->is_stack()) { |
duke@435 | 1511 | if (dst.first()->is_stack()) { |
duke@435 | 1512 | // stack to stack the easiest of the bunch |
duke@435 | 1513 | __ ld(FP, reg2offset(src.first()) + STACK_BIAS, L5); |
duke@435 | 1514 | __ st(L5, SP, reg2offset(dst.first()) + STACK_BIAS); |
duke@435 | 1515 | } else { |
duke@435 | 1516 | // stack to reg |
duke@435 | 1517 | if (dst.first()->is_Register()) { |
duke@435 | 1518 | __ ld(FP, reg2offset(src.first()) + STACK_BIAS, dst.first()->as_Register()); |
duke@435 | 1519 | } else { |
duke@435 | 1520 | __ ldf(FloatRegisterImpl::S, FP, reg2offset(src.first()) + STACK_BIAS, dst.first()->as_FloatRegister()); |
duke@435 | 1521 | } |
duke@435 | 1522 | } |
duke@435 | 1523 | } else if (dst.first()->is_stack()) { |
duke@435 | 1524 | // reg to stack |
duke@435 | 1525 | if (src.first()->is_Register()) { |
duke@435 | 1526 | __ st(src.first()->as_Register(), SP, reg2offset(dst.first()) + STACK_BIAS); |
duke@435 | 1527 | } else { |
duke@435 | 1528 | __ stf(FloatRegisterImpl::S, src.first()->as_FloatRegister(), SP, reg2offset(dst.first()) + STACK_BIAS); |
duke@435 | 1529 | } |
duke@435 | 1530 | } else { |
duke@435 | 1531 | // reg to reg |
duke@435 | 1532 | if (src.first()->is_Register()) { |
duke@435 | 1533 | if (dst.first()->is_Register()) { |
duke@435 | 1534 | // gpr -> gpr |
duke@435 | 1535 | __ mov(src.first()->as_Register(), dst.first()->as_Register()); |
duke@435 | 1536 | } else { |
duke@435 | 1537 | // gpr -> fpr |
duke@435 | 1538 | __ st(src.first()->as_Register(), FP, -4 + STACK_BIAS); |
duke@435 | 1539 | __ ldf(FloatRegisterImpl::S, FP, -4 + STACK_BIAS, dst.first()->as_FloatRegister()); |
duke@435 | 1540 | } |
duke@435 | 1541 | } else if (dst.first()->is_Register()) { |
duke@435 | 1542 | // fpr -> gpr |
duke@435 | 1543 | __ stf(FloatRegisterImpl::S, src.first()->as_FloatRegister(), FP, -4 + STACK_BIAS); |
duke@435 | 1544 | __ ld(FP, -4 + STACK_BIAS, dst.first()->as_Register()); |
duke@435 | 1545 | } else { |
duke@435 | 1546 | // fpr -> fpr |
duke@435 | 1547 | // In theory these overlap but the ordering is such that this is likely a nop |
duke@435 | 1548 | if ( src.first() != dst.first()) { |
duke@435 | 1549 | __ fmov(FloatRegisterImpl::S, src.first()->as_FloatRegister(), dst.first()->as_FloatRegister()); |
duke@435 | 1550 | } |
duke@435 | 1551 | } |
duke@435 | 1552 | } |
duke@435 | 1553 | } |
duke@435 | 1554 | |
duke@435 | 1555 | static void split_long_move(MacroAssembler* masm, VMRegPair src, VMRegPair dst) { |
duke@435 | 1556 | VMRegPair src_lo(src.first()); |
duke@435 | 1557 | VMRegPair src_hi(src.second()); |
duke@435 | 1558 | VMRegPair dst_lo(dst.first()); |
duke@435 | 1559 | VMRegPair dst_hi(dst.second()); |
duke@435 | 1560 | simple_move32(masm, src_lo, dst_lo); |
duke@435 | 1561 | simple_move32(masm, src_hi, dst_hi); |
duke@435 | 1562 | } |
duke@435 | 1563 | |
duke@435 | 1564 | // A long move |
duke@435 | 1565 | static void long_move(MacroAssembler* masm, VMRegPair src, VMRegPair dst) { |
duke@435 | 1566 | |
duke@435 | 1567 | // Do the simple ones here else do two int moves |
duke@435 | 1568 | if (src.is_single_phys_reg() ) { |
duke@435 | 1569 | if (dst.is_single_phys_reg()) { |
duke@435 | 1570 | __ mov(src.first()->as_Register(), dst.first()->as_Register()); |
duke@435 | 1571 | } else { |
duke@435 | 1572 | // split src into two separate registers |
duke@435 | 1573 | // Remember hi means hi address or lsw on sparc |
duke@435 | 1574 | // Move msw to lsw |
duke@435 | 1575 | if (dst.second()->is_reg()) { |
duke@435 | 1576 | // MSW -> MSW |
duke@435 | 1577 | __ srax(src.first()->as_Register(), 32, dst.first()->as_Register()); |
duke@435 | 1578 | // Now LSW -> LSW |
duke@435 | 1579 | // this will only move lo -> lo and ignore hi |
duke@435 | 1580 | VMRegPair split(dst.second()); |
duke@435 | 1581 | simple_move32(masm, src, split); |
duke@435 | 1582 | } else { |
duke@435 | 1583 | VMRegPair split(src.first(), L4->as_VMReg()); |
duke@435 | 1584 | // MSW -> MSW (lo ie. first word) |
duke@435 | 1585 | __ srax(src.first()->as_Register(), 32, L4); |
duke@435 | 1586 | split_long_move(masm, split, dst); |
duke@435 | 1587 | } |
duke@435 | 1588 | } |
duke@435 | 1589 | } else if (dst.is_single_phys_reg()) { |
duke@435 | 1590 | if (src.is_adjacent_aligned_on_stack(2)) { |
never@739 | 1591 | __ ldx(FP, reg2offset(src.first()) + STACK_BIAS, dst.first()->as_Register()); |
duke@435 | 1592 | } else { |
duke@435 | 1593 | // dst is a single reg. |
duke@435 | 1594 | // Remember lo is low address not msb for stack slots |
duke@435 | 1595 | // and lo is the "real" register for registers |
duke@435 | 1596 | // src is |
duke@435 | 1597 | |
duke@435 | 1598 | VMRegPair split; |
duke@435 | 1599 | |
duke@435 | 1600 | if (src.first()->is_reg()) { |
duke@435 | 1601 | // src.lo (msw) is a reg, src.hi is stk/reg |
duke@435 | 1602 | // we will move: src.hi (LSW) -> dst.lo, src.lo (MSW) -> src.lo [the MSW is in the LSW of the reg] |
duke@435 | 1603 | split.set_pair(dst.first(), src.first()); |
duke@435 | 1604 | } else { |
duke@435 | 1605 | // msw is stack move to L5 |
duke@435 | 1606 | // lsw is stack move to dst.lo (real reg) |
duke@435 | 1607 | // we will move: src.hi (LSW) -> dst.lo, src.lo (MSW) -> L5 |
duke@435 | 1608 | split.set_pair(dst.first(), L5->as_VMReg()); |
duke@435 | 1609 | } |
duke@435 | 1610 | |
duke@435 | 1611 | // src.lo -> src.lo/L5, src.hi -> dst.lo (the real reg) |
duke@435 | 1612 | // msw -> src.lo/L5, lsw -> dst.lo |
duke@435 | 1613 | split_long_move(masm, src, split); |
duke@435 | 1614 | |
duke@435 | 1615 | // So dst now has the low order correct position the |
duke@435 | 1616 | // msw half |
duke@435 | 1617 | __ sllx(split.first()->as_Register(), 32, L5); |
duke@435 | 1618 | |
duke@435 | 1619 | const Register d = dst.first()->as_Register(); |
duke@435 | 1620 | __ or3(L5, d, d); |
duke@435 | 1621 | } |
duke@435 | 1622 | } else { |
duke@435 | 1623 | // For LP64 we can probably do better. |
duke@435 | 1624 | split_long_move(masm, src, dst); |
duke@435 | 1625 | } |
duke@435 | 1626 | } |
duke@435 | 1627 | |
duke@435 | 1628 | // A double move |
duke@435 | 1629 | static void double_move(MacroAssembler* masm, VMRegPair src, VMRegPair dst) { |
duke@435 | 1630 | |
duke@435 | 1631 | // The painful thing here is that like long_move a VMRegPair might be |
duke@435 | 1632 | // 1: a single physical register |
duke@435 | 1633 | // 2: two physical registers (v8) |
duke@435 | 1634 | // 3: a physical reg [lo] and a stack slot [hi] (v8) |
duke@435 | 1635 | // 4: two stack slots |
duke@435 | 1636 | |
duke@435 | 1637 | // Since src is always a java calling convention we know that the src pair |
duke@435 | 1638 | // is always either all registers or all stack (and aligned?) |
duke@435 | 1639 | |
duke@435 | 1640 | // in a register [lo] and a stack slot [hi] |
duke@435 | 1641 | if (src.first()->is_stack()) { |
duke@435 | 1642 | if (dst.first()->is_stack()) { |
duke@435 | 1643 | // stack to stack the easiest of the bunch |
duke@435 | 1644 | // ought to be a way to do this where if alignment is ok we use ldd/std when possible |
duke@435 | 1645 | __ ld(FP, reg2offset(src.first()) + STACK_BIAS, L5); |
duke@435 | 1646 | __ ld(FP, reg2offset(src.second()) + STACK_BIAS, L4); |
duke@435 | 1647 | __ st(L5, SP, reg2offset(dst.first()) + STACK_BIAS); |
duke@435 | 1648 | __ st(L4, SP, reg2offset(dst.second()) + STACK_BIAS); |
duke@435 | 1649 | } else { |
duke@435 | 1650 | // stack to reg |
duke@435 | 1651 | if (dst.second()->is_stack()) { |
duke@435 | 1652 | // stack -> reg, stack -> stack |
duke@435 | 1653 | __ ld(FP, reg2offset(src.second()) + STACK_BIAS, L4); |
duke@435 | 1654 | if (dst.first()->is_Register()) { |
duke@435 | 1655 | __ ld(FP, reg2offset(src.first()) + STACK_BIAS, dst.first()->as_Register()); |
duke@435 | 1656 | } else { |
duke@435 | 1657 | __ ldf(FloatRegisterImpl::S, FP, reg2offset(src.first()) + STACK_BIAS, dst.first()->as_FloatRegister()); |
duke@435 | 1658 | } |
duke@435 | 1659 | // This was missing. (very rare case) |
duke@435 | 1660 | __ st(L4, SP, reg2offset(dst.second()) + STACK_BIAS); |
duke@435 | 1661 | } else { |
duke@435 | 1662 | // stack -> reg |
duke@435 | 1663 | // Eventually optimize for alignment QQQ |
duke@435 | 1664 | if (dst.first()->is_Register()) { |
duke@435 | 1665 | __ ld(FP, reg2offset(src.first()) + STACK_BIAS, dst.first()->as_Register()); |
duke@435 | 1666 | __ ld(FP, reg2offset(src.second()) + STACK_BIAS, dst.second()->as_Register()); |
duke@435 | 1667 | } else { |
duke@435 | 1668 | __ ldf(FloatRegisterImpl::S, FP, reg2offset(src.first()) + STACK_BIAS, dst.first()->as_FloatRegister()); |
duke@435 | 1669 | __ ldf(FloatRegisterImpl::S, FP, reg2offset(src.second()) + STACK_BIAS, dst.second()->as_FloatRegister()); |
duke@435 | 1670 | } |
duke@435 | 1671 | } |
duke@435 | 1672 | } |
duke@435 | 1673 | } else if (dst.first()->is_stack()) { |
duke@435 | 1674 | // reg to stack |
duke@435 | 1675 | if (src.first()->is_Register()) { |
duke@435 | 1676 | // Eventually optimize for alignment QQQ |
duke@435 | 1677 | __ st(src.first()->as_Register(), SP, reg2offset(dst.first()) + STACK_BIAS); |
duke@435 | 1678 | if (src.second()->is_stack()) { |
duke@435 | 1679 | __ ld(FP, reg2offset(src.second()) + STACK_BIAS, L4); |
duke@435 | 1680 | __ st(L4, SP, reg2offset(dst.second()) + STACK_BIAS); |
duke@435 | 1681 | } else { |
duke@435 | 1682 | __ st(src.second()->as_Register(), SP, reg2offset(dst.second()) + STACK_BIAS); |
duke@435 | 1683 | } |
duke@435 | 1684 | } else { |
duke@435 | 1685 | // fpr to stack |
duke@435 | 1686 | if (src.second()->is_stack()) { |
duke@435 | 1687 | ShouldNotReachHere(); |
duke@435 | 1688 | } else { |
duke@435 | 1689 | // Is the stack aligned? |
duke@435 | 1690 | if (reg2offset(dst.first()) & 0x7) { |
duke@435 | 1691 | // No do as pairs |
duke@435 | 1692 | __ stf(FloatRegisterImpl::S, src.first()->as_FloatRegister(), SP, reg2offset(dst.first()) + STACK_BIAS); |
duke@435 | 1693 | __ stf(FloatRegisterImpl::S, src.second()->as_FloatRegister(), SP, reg2offset(dst.second()) + STACK_BIAS); |
duke@435 | 1694 | } else { |
duke@435 | 1695 | __ stf(FloatRegisterImpl::D, src.first()->as_FloatRegister(), SP, reg2offset(dst.first()) + STACK_BIAS); |
duke@435 | 1696 | } |
duke@435 | 1697 | } |
duke@435 | 1698 | } |
duke@435 | 1699 | } else { |
duke@435 | 1700 | // reg to reg |
duke@435 | 1701 | if (src.first()->is_Register()) { |
duke@435 | 1702 | if (dst.first()->is_Register()) { |
duke@435 | 1703 | // gpr -> gpr |
duke@435 | 1704 | __ mov(src.first()->as_Register(), dst.first()->as_Register()); |
duke@435 | 1705 | __ mov(src.second()->as_Register(), dst.second()->as_Register()); |
duke@435 | 1706 | } else { |
duke@435 | 1707 | // gpr -> fpr |
duke@435 | 1708 | // ought to be able to do a single store |
duke@435 | 1709 | __ stx(src.first()->as_Register(), FP, -8 + STACK_BIAS); |
duke@435 | 1710 | __ stx(src.second()->as_Register(), FP, -4 + STACK_BIAS); |
duke@435 | 1711 | // ought to be able to do a single load |
duke@435 | 1712 | __ ldf(FloatRegisterImpl::S, FP, -8 + STACK_BIAS, dst.first()->as_FloatRegister()); |
duke@435 | 1713 | __ ldf(FloatRegisterImpl::S, FP, -4 + STACK_BIAS, dst.second()->as_FloatRegister()); |
duke@435 | 1714 | } |
duke@435 | 1715 | } else if (dst.first()->is_Register()) { |
duke@435 | 1716 | // fpr -> gpr |
duke@435 | 1717 | // ought to be able to do a single store |
duke@435 | 1718 | __ stf(FloatRegisterImpl::D, src.first()->as_FloatRegister(), FP, -8 + STACK_BIAS); |
duke@435 | 1719 | // ought to be able to do a single load |
duke@435 | 1720 | // REMEMBER first() is low address not LSB |
duke@435 | 1721 | __ ld(FP, -8 + STACK_BIAS, dst.first()->as_Register()); |
duke@435 | 1722 | if (dst.second()->is_Register()) { |
duke@435 | 1723 | __ ld(FP, -4 + STACK_BIAS, dst.second()->as_Register()); |
duke@435 | 1724 | } else { |
duke@435 | 1725 | __ ld(FP, -4 + STACK_BIAS, L4); |
duke@435 | 1726 | __ st(L4, SP, reg2offset(dst.second()) + STACK_BIAS); |
duke@435 | 1727 | } |
duke@435 | 1728 | } else { |
duke@435 | 1729 | // fpr -> fpr |
duke@435 | 1730 | // In theory these overlap but the ordering is such that this is likely a nop |
duke@435 | 1731 | if ( src.first() != dst.first()) { |
duke@435 | 1732 | __ fmov(FloatRegisterImpl::D, src.first()->as_FloatRegister(), dst.first()->as_FloatRegister()); |
duke@435 | 1733 | } |
duke@435 | 1734 | } |
duke@435 | 1735 | } |
duke@435 | 1736 | } |
duke@435 | 1737 | |
duke@435 | 1738 | // Creates an inner frame if one hasn't already been created, and |
duke@435 | 1739 | // saves a copy of the thread in L7_thread_cache |
duke@435 | 1740 | static void create_inner_frame(MacroAssembler* masm, bool* already_created) { |
duke@435 | 1741 | if (!*already_created) { |
duke@435 | 1742 | __ save_frame(0); |
duke@435 | 1743 | // Save thread in L7 (INNER FRAME); it crosses a bunch of VM calls below |
duke@435 | 1744 | // Don't use save_thread because it smashes G2 and we merely want to save a |
duke@435 | 1745 | // copy |
duke@435 | 1746 | __ mov(G2_thread, L7_thread_cache); |
duke@435 | 1747 | *already_created = true; |
duke@435 | 1748 | } |
duke@435 | 1749 | } |
duke@435 | 1750 | |
duke@435 | 1751 | // --------------------------------------------------------------------------- |
duke@435 | 1752 | // Generate a native wrapper for a given method. The method takes arguments |
duke@435 | 1753 | // in the Java compiled code convention, marshals them to the native |
duke@435 | 1754 | // convention (handlizes oops, etc), transitions to native, makes the call, |
duke@435 | 1755 | // returns to java state (possibly blocking), unhandlizes any result and |
duke@435 | 1756 | // returns. |
duke@435 | 1757 | nmethod *SharedRuntime::generate_native_wrapper(MacroAssembler* masm, |
duke@435 | 1758 | methodHandle method, |
twisti@2687 | 1759 | int compile_id, |
duke@435 | 1760 | int total_in_args, |
duke@435 | 1761 | int comp_args_on_stack, // in VMRegStackSlots |
duke@435 | 1762 | BasicType *in_sig_bt, |
duke@435 | 1763 | VMRegPair *in_regs, |
duke@435 | 1764 | BasicType ret_type) { |
duke@435 | 1765 | |
duke@435 | 1766 | // Native nmethod wrappers never take possesion of the oop arguments. |
duke@435 | 1767 | // So the caller will gc the arguments. The only thing we need an |
duke@435 | 1768 | // oopMap for is if the call is static |
duke@435 | 1769 | // |
duke@435 | 1770 | // An OopMap for lock (and class if static), and one for the VM call itself |
duke@435 | 1771 | OopMapSet *oop_maps = new OopMapSet(); |
duke@435 | 1772 | intptr_t start = (intptr_t)__ pc(); |
duke@435 | 1773 | |
duke@435 | 1774 | // First thing make an ic check to see if we should even be here |
duke@435 | 1775 | { |
duke@435 | 1776 | Label L; |
duke@435 | 1777 | const Register temp_reg = G3_scratch; |
twisti@1162 | 1778 | AddressLiteral ic_miss(SharedRuntime::get_ic_miss_stub()); |
duke@435 | 1779 | __ verify_oop(O0); |
coleenp@548 | 1780 | __ load_klass(O0, temp_reg); |
kvn@3037 | 1781 | __ cmp_and_brx_short(temp_reg, G5_inline_cache_reg, Assembler::equal, Assembler::pt, L); |
duke@435 | 1782 | |
twisti@1162 | 1783 | __ jump_to(ic_miss, temp_reg); |
duke@435 | 1784 | __ delayed()->nop(); |
duke@435 | 1785 | __ align(CodeEntryAlignment); |
duke@435 | 1786 | __ bind(L); |
duke@435 | 1787 | } |
duke@435 | 1788 | |
duke@435 | 1789 | int vep_offset = ((intptr_t)__ pc()) - start; |
duke@435 | 1790 | |
duke@435 | 1791 | #ifdef COMPILER1 |
duke@435 | 1792 | if (InlineObjectHash && method->intrinsic_id() == vmIntrinsics::_hashCode) { |
duke@435 | 1793 | // Object.hashCode can pull the hashCode from the header word |
duke@435 | 1794 | // instead of doing a full VM transition once it's been computed. |
duke@435 | 1795 | // Since hashCode is usually polymorphic at call sites we can't do |
duke@435 | 1796 | // this optimization at the call site without a lot of work. |
duke@435 | 1797 | Label slowCase; |
duke@435 | 1798 | Register receiver = O0; |
duke@435 | 1799 | Register result = O0; |
duke@435 | 1800 | Register header = G3_scratch; |
duke@435 | 1801 | Register hash = G3_scratch; // overwrite header value with hash value |
duke@435 | 1802 | Register mask = G1; // to get hash field from header |
duke@435 | 1803 | |
duke@435 | 1804 | // Read the header and build a mask to get its hash field. Give up if the object is not unlocked. |
duke@435 | 1805 | // We depend on hash_mask being at most 32 bits and avoid the use of |
duke@435 | 1806 | // hash_mask_in_place because it could be larger than 32 bits in a 64-bit |
duke@435 | 1807 | // vm: see markOop.hpp. |
duke@435 | 1808 | __ ld_ptr(receiver, oopDesc::mark_offset_in_bytes(), header); |
duke@435 | 1809 | __ sethi(markOopDesc::hash_mask, mask); |
duke@435 | 1810 | __ btst(markOopDesc::unlocked_value, header); |
duke@435 | 1811 | __ br(Assembler::zero, false, Assembler::pn, slowCase); |
duke@435 | 1812 | if (UseBiasedLocking) { |
duke@435 | 1813 | // Check if biased and fall through to runtime if so |
duke@435 | 1814 | __ delayed()->nop(); |
duke@435 | 1815 | __ btst(markOopDesc::biased_lock_bit_in_place, header); |
duke@435 | 1816 | __ br(Assembler::notZero, false, Assembler::pn, slowCase); |
duke@435 | 1817 | } |
duke@435 | 1818 | __ delayed()->or3(mask, markOopDesc::hash_mask & 0x3ff, mask); |
duke@435 | 1819 | |
duke@435 | 1820 | // Check for a valid (non-zero) hash code and get its value. |
duke@435 | 1821 | #ifdef _LP64 |
duke@435 | 1822 | __ srlx(header, markOopDesc::hash_shift, hash); |
duke@435 | 1823 | #else |
duke@435 | 1824 | __ srl(header, markOopDesc::hash_shift, hash); |
duke@435 | 1825 | #endif |
duke@435 | 1826 | __ andcc(hash, mask, hash); |
duke@435 | 1827 | __ br(Assembler::equal, false, Assembler::pn, slowCase); |
duke@435 | 1828 | __ delayed()->nop(); |
duke@435 | 1829 | |
duke@435 | 1830 | // leaf return. |
duke@435 | 1831 | __ retl(); |
duke@435 | 1832 | __ delayed()->mov(hash, result); |
duke@435 | 1833 | __ bind(slowCase); |
duke@435 | 1834 | } |
duke@435 | 1835 | #endif // COMPILER1 |
duke@435 | 1836 | |
duke@435 | 1837 | |
duke@435 | 1838 | // We have received a description of where all the java arg are located |
duke@435 | 1839 | // on entry to the wrapper. We need to convert these args to where |
duke@435 | 1840 | // the jni function will expect them. To figure out where they go |
duke@435 | 1841 | // we convert the java signature to a C signature by inserting |
duke@435 | 1842 | // the hidden arguments as arg[0] and possibly arg[1] (static method) |
duke@435 | 1843 | |
duke@435 | 1844 | int total_c_args = total_in_args + 1; |
duke@435 | 1845 | if (method->is_static()) { |
duke@435 | 1846 | total_c_args++; |
duke@435 | 1847 | } |
duke@435 | 1848 | |
duke@435 | 1849 | BasicType* out_sig_bt = NEW_RESOURCE_ARRAY(BasicType, total_c_args); |
duke@435 | 1850 | VMRegPair * out_regs = NEW_RESOURCE_ARRAY(VMRegPair, total_c_args); |
duke@435 | 1851 | |
duke@435 | 1852 | int argc = 0; |
duke@435 | 1853 | out_sig_bt[argc++] = T_ADDRESS; |
duke@435 | 1854 | if (method->is_static()) { |
duke@435 | 1855 | out_sig_bt[argc++] = T_OBJECT; |
duke@435 | 1856 | } |
duke@435 | 1857 | |
duke@435 | 1858 | for (int i = 0; i < total_in_args ; i++ ) { |
duke@435 | 1859 | out_sig_bt[argc++] = in_sig_bt[i]; |
duke@435 | 1860 | } |
duke@435 | 1861 | |
duke@435 | 1862 | // Now figure out where the args must be stored and how much stack space |
duke@435 | 1863 | // they require (neglecting out_preserve_stack_slots but space for storing |
duke@435 | 1864 | // the 1st six register arguments). It's weird see int_stk_helper. |
duke@435 | 1865 | // |
duke@435 | 1866 | int out_arg_slots; |
duke@435 | 1867 | out_arg_slots = c_calling_convention(out_sig_bt, out_regs, total_c_args); |
duke@435 | 1868 | |
duke@435 | 1869 | // Compute framesize for the wrapper. We need to handlize all oops in |
duke@435 | 1870 | // registers. We must create space for them here that is disjoint from |
duke@435 | 1871 | // the windowed save area because we have no control over when we might |
duke@435 | 1872 | // flush the window again and overwrite values that gc has since modified. |
duke@435 | 1873 | // (The live window race) |
duke@435 | 1874 | // |
duke@435 | 1875 | // We always just allocate 6 word for storing down these object. This allow |
duke@435 | 1876 | // us to simply record the base and use the Ireg number to decide which |
duke@435 | 1877 | // slot to use. (Note that the reg number is the inbound number not the |
duke@435 | 1878 | // outbound number). |
duke@435 | 1879 | // We must shuffle args to match the native convention, and include var-args space. |
duke@435 | 1880 | |
duke@435 | 1881 | // Calculate the total number of stack slots we will need. |
duke@435 | 1882 | |
duke@435 | 1883 | // First count the abi requirement plus all of the outgoing args |
duke@435 | 1884 | int stack_slots = SharedRuntime::out_preserve_stack_slots() + out_arg_slots; |
duke@435 | 1885 | |
duke@435 | 1886 | // Now the space for the inbound oop handle area |
duke@435 | 1887 | |
duke@435 | 1888 | int oop_handle_offset = stack_slots; |
duke@435 | 1889 | stack_slots += 6*VMRegImpl::slots_per_word; |
duke@435 | 1890 | |
duke@435 | 1891 | // Now any space we need for handlizing a klass if static method |
duke@435 | 1892 | |
duke@435 | 1893 | int oop_temp_slot_offset = 0; |
duke@435 | 1894 | int klass_slot_offset = 0; |
duke@435 | 1895 | int klass_offset = -1; |
duke@435 | 1896 | int lock_slot_offset = 0; |
duke@435 | 1897 | bool is_static = false; |
duke@435 | 1898 | |
duke@435 | 1899 | if (method->is_static()) { |
duke@435 | 1900 | klass_slot_offset = stack_slots; |
duke@435 | 1901 | stack_slots += VMRegImpl::slots_per_word; |
duke@435 | 1902 | klass_offset = klass_slot_offset * VMRegImpl::stack_slot_size; |
duke@435 | 1903 | is_static = true; |
duke@435 | 1904 | } |
duke@435 | 1905 | |
duke@435 | 1906 | // Plus a lock if needed |
duke@435 | 1907 | |
duke@435 | 1908 | if (method->is_synchronized()) { |
duke@435 | 1909 | lock_slot_offset = stack_slots; |
duke@435 | 1910 | stack_slots += VMRegImpl::slots_per_word; |
duke@435 | 1911 | } |
duke@435 | 1912 | |
duke@435 | 1913 | // Now a place to save return value or as a temporary for any gpr -> fpr moves |
duke@435 | 1914 | stack_slots += 2; |
duke@435 | 1915 | |
duke@435 | 1916 | // Ok The space we have allocated will look like: |
duke@435 | 1917 | // |
duke@435 | 1918 | // |
duke@435 | 1919 | // FP-> | | |
duke@435 | 1920 | // |---------------------| |
duke@435 | 1921 | // | 2 slots for moves | |
duke@435 | 1922 | // |---------------------| |
duke@435 | 1923 | // | lock box (if sync) | |
duke@435 | 1924 | // |---------------------| <- lock_slot_offset |
duke@435 | 1925 | // | klass (if static) | |
duke@435 | 1926 | // |---------------------| <- klass_slot_offset |
duke@435 | 1927 | // | oopHandle area | |
duke@435 | 1928 | // |---------------------| <- oop_handle_offset |
duke@435 | 1929 | // | outbound memory | |
duke@435 | 1930 | // | based arguments | |
duke@435 | 1931 | // | | |
duke@435 | 1932 | // |---------------------| |
duke@435 | 1933 | // | vararg area | |
duke@435 | 1934 | // |---------------------| |
duke@435 | 1935 | // | | |
duke@435 | 1936 | // SP-> | out_preserved_slots | |
duke@435 | 1937 | // |
duke@435 | 1938 | // |
duke@435 | 1939 | |
duke@435 | 1940 | |
duke@435 | 1941 | // Now compute actual number of stack words we need rounding to make |
duke@435 | 1942 | // stack properly aligned. |
duke@435 | 1943 | stack_slots = round_to(stack_slots, 2 * VMRegImpl::slots_per_word); |
duke@435 | 1944 | |
duke@435 | 1945 | int stack_size = stack_slots * VMRegImpl::stack_slot_size; |
duke@435 | 1946 | |
duke@435 | 1947 | // Generate stack overflow check before creating frame |
duke@435 | 1948 | __ generate_stack_overflow_check(stack_size); |
duke@435 | 1949 | |
duke@435 | 1950 | // Generate a new frame for the wrapper. |
duke@435 | 1951 | __ save(SP, -stack_size, SP); |
duke@435 | 1952 | |
duke@435 | 1953 | int frame_complete = ((intptr_t)__ pc()) - start; |
duke@435 | 1954 | |
duke@435 | 1955 | __ verify_thread(); |
duke@435 | 1956 | |
duke@435 | 1957 | |
duke@435 | 1958 | // |
duke@435 | 1959 | // We immediately shuffle the arguments so that any vm call we have to |
duke@435 | 1960 | // make from here on out (sync slow path, jvmti, etc.) we will have |
duke@435 | 1961 | // captured the oops from our caller and have a valid oopMap for |
duke@435 | 1962 | // them. |
duke@435 | 1963 | |
duke@435 | 1964 | // ----------------- |
duke@435 | 1965 | // The Grand Shuffle |
duke@435 | 1966 | // |
duke@435 | 1967 | // Natives require 1 or 2 extra arguments over the normal ones: the JNIEnv* |
duke@435 | 1968 | // (derived from JavaThread* which is in L7_thread_cache) and, if static, |
duke@435 | 1969 | // the class mirror instead of a receiver. This pretty much guarantees that |
duke@435 | 1970 | // register layout will not match. We ignore these extra arguments during |
duke@435 | 1971 | // the shuffle. The shuffle is described by the two calling convention |
duke@435 | 1972 | // vectors we have in our possession. We simply walk the java vector to |
duke@435 | 1973 | // get the source locations and the c vector to get the destinations. |
duke@435 | 1974 | // Because we have a new window and the argument registers are completely |
duke@435 | 1975 | // disjoint ( I0 -> O1, I1 -> O2, ...) we have nothing to worry about |
duke@435 | 1976 | // here. |
duke@435 | 1977 | |
duke@435 | 1978 | // This is a trick. We double the stack slots so we can claim |
duke@435 | 1979 | // the oops in the caller's frame. Since we are sure to have |
duke@435 | 1980 | // more args than the caller doubling is enough to make |
duke@435 | 1981 | // sure we can capture all the incoming oop args from the |
duke@435 | 1982 | // caller. |
duke@435 | 1983 | // |
duke@435 | 1984 | OopMap* map = new OopMap(stack_slots * 2, 0 /* arg_slots*/); |
duke@435 | 1985 | int c_arg = total_c_args - 1; |
duke@435 | 1986 | // Record sp-based slot for receiver on stack for non-static methods |
duke@435 | 1987 | int receiver_offset = -1; |
duke@435 | 1988 | |
duke@435 | 1989 | // We move the arguments backward because the floating point registers |
duke@435 | 1990 | // destination will always be to a register with a greater or equal register |
duke@435 | 1991 | // number or the stack. |
duke@435 | 1992 | |
duke@435 | 1993 | #ifdef ASSERT |
duke@435 | 1994 | bool reg_destroyed[RegisterImpl::number_of_registers]; |
duke@435 | 1995 | bool freg_destroyed[FloatRegisterImpl::number_of_registers]; |
duke@435 | 1996 | for ( int r = 0 ; r < RegisterImpl::number_of_registers ; r++ ) { |
duke@435 | 1997 | reg_destroyed[r] = false; |
duke@435 | 1998 | } |
duke@435 | 1999 | for ( int f = 0 ; f < FloatRegisterImpl::number_of_registers ; f++ ) { |
duke@435 | 2000 | freg_destroyed[f] = false; |
duke@435 | 2001 | } |
duke@435 | 2002 | |
duke@435 | 2003 | #endif /* ASSERT */ |
duke@435 | 2004 | |
duke@435 | 2005 | for ( int i = total_in_args - 1; i >= 0 ; i--, c_arg-- ) { |
duke@435 | 2006 | |
duke@435 | 2007 | #ifdef ASSERT |
duke@435 | 2008 | if (in_regs[i].first()->is_Register()) { |
duke@435 | 2009 | assert(!reg_destroyed[in_regs[i].first()->as_Register()->encoding()], "ack!"); |
duke@435 | 2010 | } else if (in_regs[i].first()->is_FloatRegister()) { |
duke@435 | 2011 | assert(!freg_destroyed[in_regs[i].first()->as_FloatRegister()->encoding(FloatRegisterImpl::S)], "ack!"); |
duke@435 | 2012 | } |
duke@435 | 2013 | if (out_regs[c_arg].first()->is_Register()) { |
duke@435 | 2014 | reg_destroyed[out_regs[c_arg].first()->as_Register()->encoding()] = true; |
duke@435 | 2015 | } else if (out_regs[c_arg].first()->is_FloatRegister()) { |
duke@435 | 2016 | freg_destroyed[out_regs[c_arg].first()->as_FloatRegister()->encoding(FloatRegisterImpl::S)] = true; |
duke@435 | 2017 | } |
duke@435 | 2018 | #endif /* ASSERT */ |
duke@435 | 2019 | |
duke@435 | 2020 | switch (in_sig_bt[i]) { |
duke@435 | 2021 | case T_ARRAY: |
duke@435 | 2022 | case T_OBJECT: |
duke@435 | 2023 | object_move(masm, map, oop_handle_offset, stack_slots, in_regs[i], out_regs[c_arg], |
duke@435 | 2024 | ((i == 0) && (!is_static)), |
duke@435 | 2025 | &receiver_offset); |
duke@435 | 2026 | break; |
duke@435 | 2027 | case T_VOID: |
duke@435 | 2028 | break; |
duke@435 | 2029 | |
duke@435 | 2030 | case T_FLOAT: |
duke@435 | 2031 | float_move(masm, in_regs[i], out_regs[c_arg]); |
duke@435 | 2032 | break; |
duke@435 | 2033 | |
duke@435 | 2034 | case T_DOUBLE: |
duke@435 | 2035 | assert( i + 1 < total_in_args && |
duke@435 | 2036 | in_sig_bt[i + 1] == T_VOID && |
duke@435 | 2037 | out_sig_bt[c_arg+1] == T_VOID, "bad arg list"); |
duke@435 | 2038 | double_move(masm, in_regs[i], out_regs[c_arg]); |
duke@435 | 2039 | break; |
duke@435 | 2040 | |
duke@435 | 2041 | case T_LONG : |
duke@435 | 2042 | long_move(masm, in_regs[i], out_regs[c_arg]); |
duke@435 | 2043 | break; |
duke@435 | 2044 | |
duke@435 | 2045 | case T_ADDRESS: assert(false, "found T_ADDRESS in java args"); |
duke@435 | 2046 | |
duke@435 | 2047 | default: |
duke@435 | 2048 | move32_64(masm, in_regs[i], out_regs[c_arg]); |
duke@435 | 2049 | } |
duke@435 | 2050 | } |
duke@435 | 2051 | |
duke@435 | 2052 | // Pre-load a static method's oop into O1. Used both by locking code and |
duke@435 | 2053 | // the normal JNI call code. |
duke@435 | 2054 | if (method->is_static()) { |
duke@435 | 2055 | __ set_oop_constant(JNIHandles::make_local(Klass::cast(method->method_holder())->java_mirror()), O1); |
duke@435 | 2056 | |
duke@435 | 2057 | // Now handlize the static class mirror in O1. It's known not-null. |
duke@435 | 2058 | __ st_ptr(O1, SP, klass_offset + STACK_BIAS); |
duke@435 | 2059 | map->set_oop(VMRegImpl::stack2reg(klass_slot_offset)); |
duke@435 | 2060 | __ add(SP, klass_offset + STACK_BIAS, O1); |
duke@435 | 2061 | } |
duke@435 | 2062 | |
duke@435 | 2063 | |
duke@435 | 2064 | const Register L6_handle = L6; |
duke@435 | 2065 | |
duke@435 | 2066 | if (method->is_synchronized()) { |
duke@435 | 2067 | __ mov(O1, L6_handle); |
duke@435 | 2068 | } |
duke@435 | 2069 | |
duke@435 | 2070 | // We have all of the arguments setup at this point. We MUST NOT touch any Oregs |
duke@435 | 2071 | // except O6/O7. So if we must call out we must push a new frame. We immediately |
duke@435 | 2072 | // push a new frame and flush the windows. |
duke@435 | 2073 | |
duke@435 | 2074 | #ifdef _LP64 |
duke@435 | 2075 | intptr_t thepc = (intptr_t) __ pc(); |
duke@435 | 2076 | { |
duke@435 | 2077 | address here = __ pc(); |
duke@435 | 2078 | // Call the next instruction |
duke@435 | 2079 | __ call(here + 8, relocInfo::none); |
duke@435 | 2080 | __ delayed()->nop(); |
duke@435 | 2081 | } |
duke@435 | 2082 | #else |
duke@435 | 2083 | intptr_t thepc = __ load_pc_address(O7, 0); |
duke@435 | 2084 | #endif /* _LP64 */ |
duke@435 | 2085 | |
duke@435 | 2086 | // We use the same pc/oopMap repeatedly when we call out |
duke@435 | 2087 | oop_maps->add_gc_map(thepc - start, map); |
duke@435 | 2088 | |
duke@435 | 2089 | // O7 now has the pc loaded that we will use when we finally call to native. |
duke@435 | 2090 | |
duke@435 | 2091 | // Save thread in L7; it crosses a bunch of VM calls below |
duke@435 | 2092 | // Don't use save_thread because it smashes G2 and we merely |
duke@435 | 2093 | // want to save a copy |
duke@435 | 2094 | __ mov(G2_thread, L7_thread_cache); |
duke@435 | 2095 | |
duke@435 | 2096 | |
duke@435 | 2097 | // If we create an inner frame once is plenty |
duke@435 | 2098 | // when we create it we must also save G2_thread |
duke@435 | 2099 | bool inner_frame_created = false; |
duke@435 | 2100 | |
duke@435 | 2101 | // dtrace method entry support |
duke@435 | 2102 | { |
duke@435 | 2103 | SkipIfEqual skip_if( |
duke@435 | 2104 | masm, G3_scratch, &DTraceMethodProbes, Assembler::zero); |
duke@435 | 2105 | // create inner frame |
duke@435 | 2106 | __ save_frame(0); |
duke@435 | 2107 | __ mov(G2_thread, L7_thread_cache); |
duke@435 | 2108 | __ set_oop_constant(JNIHandles::make_local(method()), O1); |
duke@435 | 2109 | __ call_VM_leaf(L7_thread_cache, |
duke@435 | 2110 | CAST_FROM_FN_PTR(address, SharedRuntime::dtrace_method_entry), |
duke@435 | 2111 | G2_thread, O1); |
duke@435 | 2112 | __ restore(); |
duke@435 | 2113 | } |
duke@435 | 2114 | |
dcubed@1045 | 2115 | // RedefineClasses() tracing support for obsolete method entry |
dcubed@1045 | 2116 | if (RC_TRACE_IN_RANGE(0x00001000, 0x00002000)) { |
dcubed@1045 | 2117 | // create inner frame |
dcubed@1045 | 2118 | __ save_frame(0); |
dcubed@1045 | 2119 | __ mov(G2_thread, L7_thread_cache); |
dcubed@1045 | 2120 | __ set_oop_constant(JNIHandles::make_local(method()), O1); |
dcubed@1045 | 2121 | __ call_VM_leaf(L7_thread_cache, |
dcubed@1045 | 2122 | CAST_FROM_FN_PTR(address, SharedRuntime::rc_trace_method_entry), |
dcubed@1045 | 2123 | G2_thread, O1); |
dcubed@1045 | 2124 | __ restore(); |
dcubed@1045 | 2125 | } |
dcubed@1045 | 2126 | |
duke@435 | 2127 | // We are in the jni frame unless saved_frame is true in which case |
duke@435 | 2128 | // we are in one frame deeper (the "inner" frame). If we are in the |
duke@435 | 2129 | // "inner" frames the args are in the Iregs and if the jni frame then |
duke@435 | 2130 | // they are in the Oregs. |
duke@435 | 2131 | // If we ever need to go to the VM (for locking, jvmti) then |
duke@435 | 2132 | // we will always be in the "inner" frame. |
duke@435 | 2133 | |
duke@435 | 2134 | // Lock a synchronized method |
duke@435 | 2135 | int lock_offset = -1; // Set if locked |
duke@435 | 2136 | if (method->is_synchronized()) { |
duke@435 | 2137 | Register Roop = O1; |
duke@435 | 2138 | const Register L3_box = L3; |
duke@435 | 2139 | |
duke@435 | 2140 | create_inner_frame(masm, &inner_frame_created); |
duke@435 | 2141 | |
duke@435 | 2142 | __ ld_ptr(I1, 0, O1); |
duke@435 | 2143 | Label done; |
duke@435 | 2144 | |
duke@435 | 2145 | lock_offset = (lock_slot_offset * VMRegImpl::stack_slot_size); |
duke@435 | 2146 | __ add(FP, lock_offset+STACK_BIAS, L3_box); |
duke@435 | 2147 | #ifdef ASSERT |
duke@435 | 2148 | if (UseBiasedLocking) { |
duke@435 | 2149 | // making the box point to itself will make it clear it went unused |
duke@435 | 2150 | // but also be obviously invalid |
duke@435 | 2151 | __ st_ptr(L3_box, L3_box, 0); |
duke@435 | 2152 | } |
duke@435 | 2153 | #endif // ASSERT |
duke@435 | 2154 | // |
duke@435 | 2155 | // Compiler_lock_object (Roop, Rmark, Rbox, Rscratch) -- kills Rmark, Rbox, Rscratch |
duke@435 | 2156 | // |
duke@435 | 2157 | __ compiler_lock_object(Roop, L1, L3_box, L2); |
duke@435 | 2158 | __ br(Assembler::equal, false, Assembler::pt, done); |
duke@435 | 2159 | __ delayed() -> add(FP, lock_offset+STACK_BIAS, L3_box); |
duke@435 | 2160 | |
duke@435 | 2161 | |
duke@435 | 2162 | // None of the above fast optimizations worked so we have to get into the |
duke@435 | 2163 | // slow case of monitor enter. Inline a special case of call_VM that |
duke@435 | 2164 | // disallows any pending_exception. |
duke@435 | 2165 | __ mov(Roop, O0); // Need oop in O0 |
duke@435 | 2166 | __ mov(L3_box, O1); |
duke@435 | 2167 | |
duke@435 | 2168 | // Record last_Java_sp, in case the VM code releases the JVM lock. |
duke@435 | 2169 | |
duke@435 | 2170 | __ set_last_Java_frame(FP, I7); |
duke@435 | 2171 | |
duke@435 | 2172 | // do the call |
duke@435 | 2173 | __ call(CAST_FROM_FN_PTR(address, SharedRuntime::complete_monitor_locking_C), relocInfo::runtime_call_type); |
duke@435 | 2174 | __ delayed()->mov(L7_thread_cache, O2); |
duke@435 | 2175 | |
duke@435 | 2176 | __ restore_thread(L7_thread_cache); // restore G2_thread |
duke@435 | 2177 | __ reset_last_Java_frame(); |
duke@435 | 2178 | |
duke@435 | 2179 | #ifdef ASSERT |
duke@435 | 2180 | { Label L; |
duke@435 | 2181 | __ ld_ptr(G2_thread, in_bytes(Thread::pending_exception_offset()), O0); |
kvn@3037 | 2182 | __ br_null_short(O0, Assembler::pt, L); |
duke@435 | 2183 | __ stop("no pending exception allowed on exit from IR::monitorenter"); |
duke@435 | 2184 | __ bind(L); |
duke@435 | 2185 | } |
duke@435 | 2186 | #endif |
duke@435 | 2187 | __ bind(done); |
duke@435 | 2188 | } |
duke@435 | 2189 | |
duke@435 | 2190 | |
duke@435 | 2191 | // Finally just about ready to make the JNI call |
duke@435 | 2192 | |
duke@435 | 2193 | __ flush_windows(); |
duke@435 | 2194 | if (inner_frame_created) { |
duke@435 | 2195 | __ restore(); |
duke@435 | 2196 | } else { |
duke@435 | 2197 | // Store only what we need from this frame |
duke@435 | 2198 | // QQQ I think that non-v9 (like we care) we don't need these saves |
duke@435 | 2199 | // either as the flush traps and the current window goes too. |
duke@435 | 2200 | __ st_ptr(FP, SP, FP->sp_offset_in_saved_window()*wordSize + STACK_BIAS); |
duke@435 | 2201 | __ st_ptr(I7, SP, I7->sp_offset_in_saved_window()*wordSize + STACK_BIAS); |
duke@435 | 2202 | } |
duke@435 | 2203 | |
duke@435 | 2204 | // get JNIEnv* which is first argument to native |
duke@435 | 2205 | |
duke@435 | 2206 | __ add(G2_thread, in_bytes(JavaThread::jni_environment_offset()), O0); |
duke@435 | 2207 | |
duke@435 | 2208 | // Use that pc we placed in O7 a while back as the current frame anchor |
duke@435 | 2209 | |
duke@435 | 2210 | __ set_last_Java_frame(SP, O7); |
duke@435 | 2211 | |
duke@435 | 2212 | // Transition from _thread_in_Java to _thread_in_native. |
duke@435 | 2213 | __ set(_thread_in_native, G3_scratch); |
twisti@1162 | 2214 | __ st(G3_scratch, G2_thread, JavaThread::thread_state_offset()); |
duke@435 | 2215 | |
duke@435 | 2216 | // We flushed the windows ages ago now mark them as flushed |
duke@435 | 2217 | |
duke@435 | 2218 | // mark windows as flushed |
duke@435 | 2219 | __ set(JavaFrameAnchor::flushed, G3_scratch); |
duke@435 | 2220 | |
twisti@1162 | 2221 | Address flags(G2_thread, JavaThread::frame_anchor_offset() + JavaFrameAnchor::flags_offset()); |
duke@435 | 2222 | |
duke@435 | 2223 | #ifdef _LP64 |
twisti@1162 | 2224 | AddressLiteral dest(method->native_function()); |
duke@435 | 2225 | __ relocate(relocInfo::runtime_call_type); |
twisti@1162 | 2226 | __ jumpl_to(dest, O7, O7); |
duke@435 | 2227 | #else |
duke@435 | 2228 | __ call(method->native_function(), relocInfo::runtime_call_type); |
duke@435 | 2229 | #endif |
duke@435 | 2230 | __ delayed()->st(G3_scratch, flags); |
duke@435 | 2231 | |
duke@435 | 2232 | __ restore_thread(L7_thread_cache); // restore G2_thread |
duke@435 | 2233 | |
duke@435 | 2234 | // Unpack native results. For int-types, we do any needed sign-extension |
duke@435 | 2235 | // and move things into I0. The return value there will survive any VM |
duke@435 | 2236 | // calls for blocking or unlocking. An FP or OOP result (handle) is done |
duke@435 | 2237 | // specially in the slow-path code. |
duke@435 | 2238 | switch (ret_type) { |
duke@435 | 2239 | case T_VOID: break; // Nothing to do! |
duke@435 | 2240 | case T_FLOAT: break; // Got it where we want it (unless slow-path) |
duke@435 | 2241 | case T_DOUBLE: break; // Got it where we want it (unless slow-path) |
duke@435 | 2242 | // In 64 bits build result is in O0, in O0, O1 in 32bit build |
duke@435 | 2243 | case T_LONG: |
duke@435 | 2244 | #ifndef _LP64 |
duke@435 | 2245 | __ mov(O1, I1); |
duke@435 | 2246 | #endif |
duke@435 | 2247 | // Fall thru |
duke@435 | 2248 | case T_OBJECT: // Really a handle |
duke@435 | 2249 | case T_ARRAY: |
duke@435 | 2250 | case T_INT: |
duke@435 | 2251 | __ mov(O0, I0); |
duke@435 | 2252 | break; |
duke@435 | 2253 | case T_BOOLEAN: __ subcc(G0, O0, G0); __ addc(G0, 0, I0); break; // !0 => true; 0 => false |
duke@435 | 2254 | case T_BYTE : __ sll(O0, 24, O0); __ sra(O0, 24, I0); break; |
duke@435 | 2255 | case T_CHAR : __ sll(O0, 16, O0); __ srl(O0, 16, I0); break; // cannot use and3, 0xFFFF too big as immediate value! |
duke@435 | 2256 | case T_SHORT : __ sll(O0, 16, O0); __ sra(O0, 16, I0); break; |
duke@435 | 2257 | break; // Cannot de-handlize until after reclaiming jvm_lock |
duke@435 | 2258 | default: |
duke@435 | 2259 | ShouldNotReachHere(); |
duke@435 | 2260 | } |
duke@435 | 2261 | |
duke@435 | 2262 | // must we block? |
duke@435 | 2263 | |
duke@435 | 2264 | // Block, if necessary, before resuming in _thread_in_Java state. |
duke@435 | 2265 | // In order for GC to work, don't clear the last_Java_sp until after blocking. |
duke@435 | 2266 | { Label no_block; |
twisti@1162 | 2267 | AddressLiteral sync_state(SafepointSynchronize::address_of_state()); |
duke@435 | 2268 | |
duke@435 | 2269 | // Switch thread to "native transition" state before reading the synchronization state. |
duke@435 | 2270 | // This additional state is necessary because reading and testing the synchronization |
duke@435 | 2271 | // state is not atomic w.r.t. GC, as this scenario demonstrates: |
duke@435 | 2272 | // Java thread A, in _thread_in_native state, loads _not_synchronized and is preempted. |
duke@435 | 2273 | // VM thread changes sync state to synchronizing and suspends threads for GC. |
duke@435 | 2274 | // Thread A is resumed to finish this native method, but doesn't block here since it |
duke@435 | 2275 | // didn't see any synchronization is progress, and escapes. |
duke@435 | 2276 | __ set(_thread_in_native_trans, G3_scratch); |
twisti@1162 | 2277 | __ st(G3_scratch, G2_thread, JavaThread::thread_state_offset()); |
duke@435 | 2278 | if(os::is_MP()) { |
duke@435 | 2279 | if (UseMembar) { |
duke@435 | 2280 | // Force this write out before the read below |
duke@435 | 2281 | __ membar(Assembler::StoreLoad); |
duke@435 | 2282 | } else { |
duke@435 | 2283 | // Write serialization page so VM thread can do a pseudo remote membar. |
duke@435 | 2284 | // We use the current thread pointer to calculate a thread specific |
duke@435 | 2285 | // offset to write to within the page. This minimizes bus traffic |
duke@435 | 2286 | // due to cache line collision. |
duke@435 | 2287 | __ serialize_memory(G2_thread, G1_scratch, G3_scratch); |
duke@435 | 2288 | } |
duke@435 | 2289 | } |
duke@435 | 2290 | __ load_contents(sync_state, G3_scratch); |
duke@435 | 2291 | __ cmp(G3_scratch, SafepointSynchronize::_not_synchronized); |
duke@435 | 2292 | |
duke@435 | 2293 | Label L; |
twisti@1162 | 2294 | Address suspend_state(G2_thread, JavaThread::suspend_flags_offset()); |
duke@435 | 2295 | __ br(Assembler::notEqual, false, Assembler::pn, L); |
twisti@1162 | 2296 | __ delayed()->ld(suspend_state, G3_scratch); |
kvn@3037 | 2297 | __ cmp_and_br_short(G3_scratch, 0, Assembler::equal, Assembler::pt, no_block); |
duke@435 | 2298 | __ bind(L); |
duke@435 | 2299 | |
duke@435 | 2300 | // Block. Save any potential method result value before the operation and |
duke@435 | 2301 | // use a leaf call to leave the last_Java_frame setup undisturbed. Doing this |
duke@435 | 2302 | // lets us share the oopMap we used when we went native rather the create |
duke@435 | 2303 | // a distinct one for this pc |
duke@435 | 2304 | // |
duke@435 | 2305 | save_native_result(masm, ret_type, stack_slots); |
duke@435 | 2306 | __ call_VM_leaf(L7_thread_cache, |
duke@435 | 2307 | CAST_FROM_FN_PTR(address, JavaThread::check_special_condition_for_native_trans), |
duke@435 | 2308 | G2_thread); |
duke@435 | 2309 | |
duke@435 | 2310 | // Restore any method result value |
duke@435 | 2311 | restore_native_result(masm, ret_type, stack_slots); |
duke@435 | 2312 | __ bind(no_block); |
duke@435 | 2313 | } |
duke@435 | 2314 | |
duke@435 | 2315 | // thread state is thread_in_native_trans. Any safepoint blocking has already |
duke@435 | 2316 | // happened so we can now change state to _thread_in_Java. |
duke@435 | 2317 | |
duke@435 | 2318 | |
duke@435 | 2319 | __ set(_thread_in_Java, G3_scratch); |
twisti@1162 | 2320 | __ st(G3_scratch, G2_thread, JavaThread::thread_state_offset()); |
duke@435 | 2321 | |
duke@435 | 2322 | |
duke@435 | 2323 | Label no_reguard; |
twisti@1162 | 2324 | __ ld(G2_thread, JavaThread::stack_guard_state_offset(), G3_scratch); |
kvn@3037 | 2325 | __ cmp_and_br_short(G3_scratch, JavaThread::stack_guard_yellow_disabled, Assembler::notEqual, Assembler::pt, no_reguard); |
duke@435 | 2326 | |
duke@435 | 2327 | save_native_result(masm, ret_type, stack_slots); |
duke@435 | 2328 | __ call(CAST_FROM_FN_PTR(address, SharedRuntime::reguard_yellow_pages)); |
duke@435 | 2329 | __ delayed()->nop(); |
duke@435 | 2330 | |
duke@435 | 2331 | __ restore_thread(L7_thread_cache); // restore G2_thread |
duke@435 | 2332 | restore_native_result(masm, ret_type, stack_slots); |
duke@435 | 2333 | |
duke@435 | 2334 | __ bind(no_reguard); |
duke@435 | 2335 | |
duke@435 | 2336 | // Handle possible exception (will unlock if necessary) |
duke@435 | 2337 | |
duke@435 | 2338 | // native result if any is live in freg or I0 (and I1 if long and 32bit vm) |
duke@435 | 2339 | |
duke@435 | 2340 | // Unlock |
duke@435 | 2341 | if (method->is_synchronized()) { |
duke@435 | 2342 | Label done; |
duke@435 | 2343 | Register I2_ex_oop = I2; |
duke@435 | 2344 | const Register L3_box = L3; |
duke@435 | 2345 | // Get locked oop from the handle we passed to jni |
duke@435 | 2346 | __ ld_ptr(L6_handle, 0, L4); |
duke@435 | 2347 | __ add(SP, lock_offset+STACK_BIAS, L3_box); |
duke@435 | 2348 | // Must save pending exception around the slow-path VM call. Since it's a |
duke@435 | 2349 | // leaf call, the pending exception (if any) can be kept in a register. |
duke@435 | 2350 | __ ld_ptr(G2_thread, in_bytes(Thread::pending_exception_offset()), I2_ex_oop); |
duke@435 | 2351 | // Now unlock |
duke@435 | 2352 | // (Roop, Rmark, Rbox, Rscratch) |
duke@435 | 2353 | __ compiler_unlock_object(L4, L1, L3_box, L2); |
duke@435 | 2354 | __ br(Assembler::equal, false, Assembler::pt, done); |
duke@435 | 2355 | __ delayed()-> add(SP, lock_offset+STACK_BIAS, L3_box); |
duke@435 | 2356 | |
duke@435 | 2357 | // save and restore any potential method result value around the unlocking |
duke@435 | 2358 | // operation. Will save in I0 (or stack for FP returns). |
duke@435 | 2359 | save_native_result(masm, ret_type, stack_slots); |
duke@435 | 2360 | |
duke@435 | 2361 | // Must clear pending-exception before re-entering the VM. Since this is |
duke@435 | 2362 | // a leaf call, pending-exception-oop can be safely kept in a register. |
duke@435 | 2363 | __ st_ptr(G0, G2_thread, in_bytes(Thread::pending_exception_offset())); |
duke@435 | 2364 | |
duke@435 | 2365 | // slow case of monitor enter. Inline a special case of call_VM that |
duke@435 | 2366 | // disallows any pending_exception. |
duke@435 | 2367 | __ mov(L3_box, O1); |
duke@435 | 2368 | |
duke@435 | 2369 | __ call(CAST_FROM_FN_PTR(address, SharedRuntime::complete_monitor_unlocking_C), relocInfo::runtime_call_type); |
duke@435 | 2370 | __ delayed()->mov(L4, O0); // Need oop in O0 |
duke@435 | 2371 | |
duke@435 | 2372 | __ restore_thread(L7_thread_cache); // restore G2_thread |
duke@435 | 2373 | |
duke@435 | 2374 | #ifdef ASSERT |
duke@435 | 2375 | { Label L; |
duke@435 | 2376 | __ ld_ptr(G2_thread, in_bytes(Thread::pending_exception_offset()), O0); |
kvn@3037 | 2377 | __ br_null_short(O0, Assembler::pt, L); |
duke@435 | 2378 | __ stop("no pending exception allowed on exit from IR::monitorexit"); |
duke@435 | 2379 | __ bind(L); |
duke@435 | 2380 | } |
duke@435 | 2381 | #endif |
duke@435 | 2382 | restore_native_result(masm, ret_type, stack_slots); |
duke@435 | 2383 | // check_forward_pending_exception jump to forward_exception if any pending |
duke@435 | 2384 | // exception is set. The forward_exception routine expects to see the |
duke@435 | 2385 | // exception in pending_exception and not in a register. Kind of clumsy, |
duke@435 | 2386 | // since all folks who branch to forward_exception must have tested |
duke@435 | 2387 | // pending_exception first and hence have it in a register already. |
duke@435 | 2388 | __ st_ptr(I2_ex_oop, G2_thread, in_bytes(Thread::pending_exception_offset())); |
duke@435 | 2389 | __ bind(done); |
duke@435 | 2390 | } |
duke@435 | 2391 | |
duke@435 | 2392 | // Tell dtrace about this method exit |
duke@435 | 2393 | { |
duke@435 | 2394 | SkipIfEqual skip_if( |
duke@435 | 2395 | masm, G3_scratch, &DTraceMethodProbes, Assembler::zero); |
duke@435 | 2396 | save_native_result(masm, ret_type, stack_slots); |
duke@435 | 2397 | __ set_oop_constant(JNIHandles::make_local(method()), O1); |
duke@435 | 2398 | __ call_VM_leaf(L7_thread_cache, |
duke@435 | 2399 | CAST_FROM_FN_PTR(address, SharedRuntime::dtrace_method_exit), |
duke@435 | 2400 | G2_thread, O1); |
duke@435 | 2401 | restore_native_result(masm, ret_type, stack_slots); |
duke@435 | 2402 | } |
duke@435 | 2403 | |
duke@435 | 2404 | // Clear "last Java frame" SP and PC. |
duke@435 | 2405 | __ verify_thread(); // G2_thread must be correct |
duke@435 | 2406 | __ reset_last_Java_frame(); |
duke@435 | 2407 | |
duke@435 | 2408 | // Unpack oop result |
duke@435 | 2409 | if (ret_type == T_OBJECT || ret_type == T_ARRAY) { |
duke@435 | 2410 | Label L; |
duke@435 | 2411 | __ addcc(G0, I0, G0); |
duke@435 | 2412 | __ brx(Assembler::notZero, true, Assembler::pt, L); |
duke@435 | 2413 | __ delayed()->ld_ptr(I0, 0, I0); |
duke@435 | 2414 | __ mov(G0, I0); |
duke@435 | 2415 | __ bind(L); |
duke@435 | 2416 | __ verify_oop(I0); |
duke@435 | 2417 | } |
duke@435 | 2418 | |
duke@435 | 2419 | // reset handle block |
duke@435 | 2420 | __ ld_ptr(G2_thread, in_bytes(JavaThread::active_handles_offset()), L5); |
duke@435 | 2421 | __ st_ptr(G0, L5, JNIHandleBlock::top_offset_in_bytes()); |
duke@435 | 2422 | |
duke@435 | 2423 | __ ld_ptr(G2_thread, in_bytes(Thread::pending_exception_offset()), G3_scratch); |
duke@435 | 2424 | check_forward_pending_exception(masm, G3_scratch); |
duke@435 | 2425 | |
duke@435 | 2426 | |
duke@435 | 2427 | // Return |
duke@435 | 2428 | |
duke@435 | 2429 | #ifndef _LP64 |
duke@435 | 2430 | if (ret_type == T_LONG) { |
duke@435 | 2431 | |
duke@435 | 2432 | // Must leave proper result in O0,O1 and G1 (c2/tiered only) |
duke@435 | 2433 | __ sllx(I0, 32, G1); // Shift bits into high G1 |
duke@435 | 2434 | __ srl (I1, 0, I1); // Zero extend O1 (harmless?) |
duke@435 | 2435 | __ or3 (I1, G1, G1); // OR 64 bits into G1 |
duke@435 | 2436 | } |
duke@435 | 2437 | #endif |
duke@435 | 2438 | |
duke@435 | 2439 | __ ret(); |
duke@435 | 2440 | __ delayed()->restore(); |
duke@435 | 2441 | |
duke@435 | 2442 | __ flush(); |
duke@435 | 2443 | |
duke@435 | 2444 | nmethod *nm = nmethod::new_native_nmethod(method, |
twisti@2687 | 2445 | compile_id, |
duke@435 | 2446 | masm->code(), |
duke@435 | 2447 | vep_offset, |
duke@435 | 2448 | frame_complete, |
duke@435 | 2449 | stack_slots / VMRegImpl::slots_per_word, |
duke@435 | 2450 | (is_static ? in_ByteSize(klass_offset) : in_ByteSize(receiver_offset)), |
duke@435 | 2451 | in_ByteSize(lock_offset), |
duke@435 | 2452 | oop_maps); |
duke@435 | 2453 | return nm; |
duke@435 | 2454 | |
duke@435 | 2455 | } |
duke@435 | 2456 | |
kamg@551 | 2457 | #ifdef HAVE_DTRACE_H |
kamg@551 | 2458 | // --------------------------------------------------------------------------- |
kamg@551 | 2459 | // Generate a dtrace nmethod for a given signature. The method takes arguments |
kamg@551 | 2460 | // in the Java compiled code convention, marshals them to the native |
kamg@551 | 2461 | // abi and then leaves nops at the position you would expect to call a native |
kamg@551 | 2462 | // function. When the probe is enabled the nops are replaced with a trap |
kamg@551 | 2463 | // instruction that dtrace inserts and the trace will cause a notification |
kamg@551 | 2464 | // to dtrace. |
kamg@551 | 2465 | // |
kamg@551 | 2466 | // The probes are only able to take primitive types and java/lang/String as |
kamg@551 | 2467 | // arguments. No other java types are allowed. Strings are converted to utf8 |
kamg@551 | 2468 | // strings so that from dtrace point of view java strings are converted to C |
kamg@551 | 2469 | // strings. There is an arbitrary fixed limit on the total space that a method |
kamg@551 | 2470 | // can use for converting the strings. (256 chars per string in the signature). |
kamg@551 | 2471 | // So any java string larger then this is truncated. |
kamg@551 | 2472 | |
kamg@551 | 2473 | static int fp_offset[ConcreteRegisterImpl::number_of_registers] = { 0 }; |
kamg@551 | 2474 | static bool offsets_initialized = false; |
kamg@551 | 2475 | |
kamg@551 | 2476 | static VMRegPair reg64_to_VMRegPair(Register r) { |
kamg@551 | 2477 | VMRegPair ret; |
kamg@551 | 2478 | if (wordSize == 8) { |
kamg@551 | 2479 | ret.set2(r->as_VMReg()); |
kamg@551 | 2480 | } else { |
kamg@551 | 2481 | ret.set_pair(r->successor()->as_VMReg(), r->as_VMReg()); |
kamg@551 | 2482 | } |
kamg@551 | 2483 | return ret; |
kamg@551 | 2484 | } |
kamg@551 | 2485 | |
kamg@551 | 2486 | |
kamg@551 | 2487 | nmethod *SharedRuntime::generate_dtrace_nmethod( |
kamg@551 | 2488 | MacroAssembler *masm, methodHandle method) { |
kamg@551 | 2489 | |
kamg@551 | 2490 | |
kamg@551 | 2491 | // generate_dtrace_nmethod is guarded by a mutex so we are sure to |
kamg@551 | 2492 | // be single threaded in this method. |
kamg@551 | 2493 | assert(AdapterHandlerLibrary_lock->owned_by_self(), "must be"); |
kamg@551 | 2494 | |
kamg@551 | 2495 | // Fill in the signature array, for the calling-convention call. |
kamg@551 | 2496 | int total_args_passed = method->size_of_parameters(); |
kamg@551 | 2497 | |
kamg@551 | 2498 | BasicType* in_sig_bt = NEW_RESOURCE_ARRAY(BasicType, total_args_passed); |
kamg@551 | 2499 | VMRegPair *in_regs = NEW_RESOURCE_ARRAY(VMRegPair, total_args_passed); |
kamg@551 | 2500 | |
kamg@551 | 2501 | // The signature we are going to use for the trap that dtrace will see |
kamg@551 | 2502 | // java/lang/String is converted. We drop "this" and any other object |
kamg@551 | 2503 | // is converted to NULL. (A one-slot java/lang/Long object reference |
kamg@551 | 2504 | // is converted to a two-slot long, which is why we double the allocation). |
kamg@551 | 2505 | BasicType* out_sig_bt = NEW_RESOURCE_ARRAY(BasicType, total_args_passed * 2); |
kamg@551 | 2506 | VMRegPair* out_regs = NEW_RESOURCE_ARRAY(VMRegPair, total_args_passed * 2); |
kamg@551 | 2507 | |
kamg@551 | 2508 | int i=0; |
kamg@551 | 2509 | int total_strings = 0; |
kamg@551 | 2510 | int first_arg_to_pass = 0; |
kamg@551 | 2511 | int total_c_args = 0; |
kamg@551 | 2512 | |
kamg@551 | 2513 | // Skip the receiver as dtrace doesn't want to see it |
kamg@551 | 2514 | if( !method->is_static() ) { |
kamg@551 | 2515 | in_sig_bt[i++] = T_OBJECT; |
kamg@551 | 2516 | first_arg_to_pass = 1; |
kamg@551 | 2517 | } |
kamg@551 | 2518 | |
kamg@551 | 2519 | SignatureStream ss(method->signature()); |
kamg@551 | 2520 | for ( ; !ss.at_return_type(); ss.next()) { |
kamg@551 | 2521 | BasicType bt = ss.type(); |
kamg@551 | 2522 | in_sig_bt[i++] = bt; // Collect remaining bits of signature |
kamg@551 | 2523 | out_sig_bt[total_c_args++] = bt; |
kamg@551 | 2524 | if( bt == T_OBJECT) { |
coleenp@2497 | 2525 | Symbol* s = ss.as_symbol_or_null(); |
kamg@551 | 2526 | if (s == vmSymbols::java_lang_String()) { |
kamg@551 | 2527 | total_strings++; |
kamg@551 | 2528 | out_sig_bt[total_c_args-1] = T_ADDRESS; |
kamg@551 | 2529 | } else if (s == vmSymbols::java_lang_Boolean() || |
kamg@551 | 2530 | s == vmSymbols::java_lang_Byte()) { |
kamg@551 | 2531 | out_sig_bt[total_c_args-1] = T_BYTE; |
kamg@551 | 2532 | } else if (s == vmSymbols::java_lang_Character() || |
kamg@551 | 2533 | s == vmSymbols::java_lang_Short()) { |
kamg@551 | 2534 | out_sig_bt[total_c_args-1] = T_SHORT; |
kamg@551 | 2535 | } else if (s == vmSymbols::java_lang_Integer() || |
kamg@551 | 2536 | s == vmSymbols::java_lang_Float()) { |
kamg@551 | 2537 | out_sig_bt[total_c_args-1] = T_INT; |
kamg@551 | 2538 | } else if (s == vmSymbols::java_lang_Long() || |
kamg@551 | 2539 | s == vmSymbols::java_lang_Double()) { |
kamg@551 | 2540 | out_sig_bt[total_c_args-1] = T_LONG; |
kamg@551 | 2541 | out_sig_bt[total_c_args++] = T_VOID; |
kamg@551 | 2542 | } |
kamg@551 | 2543 | } else if ( bt == T_LONG || bt == T_DOUBLE ) { |
kamg@551 | 2544 | in_sig_bt[i++] = T_VOID; // Longs & doubles take 2 Java slots |
kamg@551 | 2545 | // We convert double to long |
kamg@551 | 2546 | out_sig_bt[total_c_args-1] = T_LONG; |
kamg@551 | 2547 | out_sig_bt[total_c_args++] = T_VOID; |
kamg@551 | 2548 | } else if ( bt == T_FLOAT) { |
kamg@551 | 2549 | // We convert float to int |
kamg@551 | 2550 | out_sig_bt[total_c_args-1] = T_INT; |
kamg@551 | 2551 | } |
kamg@551 | 2552 | } |
kamg@551 | 2553 | |
kamg@551 | 2554 | assert(i==total_args_passed, "validly parsed signature"); |
kamg@551 | 2555 | |
kamg@551 | 2556 | // Now get the compiled-Java layout as input arguments |
kamg@551 | 2557 | int comp_args_on_stack; |
kamg@551 | 2558 | comp_args_on_stack = SharedRuntime::java_calling_convention( |
kamg@551 | 2559 | in_sig_bt, in_regs, total_args_passed, false); |
kamg@551 | 2560 | |
kamg@551 | 2561 | // We have received a description of where all the java arg are located |
kamg@551 | 2562 | // on entry to the wrapper. We need to convert these args to where |
kamg@551 | 2563 | // the a native (non-jni) function would expect them. To figure out |
kamg@551 | 2564 | // where they go we convert the java signature to a C signature and remove |
kamg@551 | 2565 | // T_VOID for any long/double we might have received. |
kamg@551 | 2566 | |
kamg@551 | 2567 | |
kamg@551 | 2568 | // Now figure out where the args must be stored and how much stack space |
kamg@551 | 2569 | // they require (neglecting out_preserve_stack_slots but space for storing |
kamg@551 | 2570 | // the 1st six register arguments). It's weird see int_stk_helper. |
kamg@551 | 2571 | // |
kamg@551 | 2572 | int out_arg_slots; |
kamg@551 | 2573 | out_arg_slots = c_calling_convention(out_sig_bt, out_regs, total_c_args); |
kamg@551 | 2574 | |
kamg@551 | 2575 | // Calculate the total number of stack slots we will need. |
kamg@551 | 2576 | |
kamg@551 | 2577 | // First count the abi requirement plus all of the outgoing args |
kamg@551 | 2578 | int stack_slots = SharedRuntime::out_preserve_stack_slots() + out_arg_slots; |
kamg@551 | 2579 | |
kamg@551 | 2580 | // Plus a temp for possible converion of float/double/long register args |
kamg@551 | 2581 | |
kamg@551 | 2582 | int conversion_temp = stack_slots; |
kamg@551 | 2583 | stack_slots += 2; |
kamg@551 | 2584 | |
kamg@551 | 2585 | |
kamg@551 | 2586 | // Now space for the string(s) we must convert |
kamg@551 | 2587 | |
kamg@551 | 2588 | int string_locs = stack_slots; |
kamg@551 | 2589 | stack_slots += total_strings * |
kamg@551 | 2590 | (max_dtrace_string_size / VMRegImpl::stack_slot_size); |
kamg@551 | 2591 | |
kamg@551 | 2592 | // Ok The space we have allocated will look like: |
kamg@551 | 2593 | // |
kamg@551 | 2594 | // |
kamg@551 | 2595 | // FP-> | | |
kamg@551 | 2596 | // |---------------------| |
kamg@551 | 2597 | // | string[n] | |
kamg@551 | 2598 | // |---------------------| <- string_locs[n] |
kamg@551 | 2599 | // | string[n-1] | |
kamg@551 | 2600 | // |---------------------| <- string_locs[n-1] |
kamg@551 | 2601 | // | ... | |
kamg@551 | 2602 | // | ... | |
kamg@551 | 2603 | // |---------------------| <- string_locs[1] |
kamg@551 | 2604 | // | string[0] | |
kamg@551 | 2605 | // |---------------------| <- string_locs[0] |
kamg@551 | 2606 | // | temp | |
kamg@551 | 2607 | // |---------------------| <- conversion_temp |
kamg@551 | 2608 | // | outbound memory | |
kamg@551 | 2609 | // | based arguments | |
kamg@551 | 2610 | // | | |
kamg@551 | 2611 | // |---------------------| |
kamg@551 | 2612 | // | | |
kamg@551 | 2613 | // SP-> | out_preserved_slots | |
kamg@551 | 2614 | // |
kamg@551 | 2615 | // |
kamg@551 | 2616 | |
kamg@551 | 2617 | // Now compute actual number of stack words we need rounding to make |
kamg@551 | 2618 | // stack properly aligned. |
kamg@551 | 2619 | stack_slots = round_to(stack_slots, 4 * VMRegImpl::slots_per_word); |
kamg@551 | 2620 | |
kamg@551 | 2621 | int stack_size = stack_slots * VMRegImpl::stack_slot_size; |
kamg@551 | 2622 | |
kamg@551 | 2623 | intptr_t start = (intptr_t)__ pc(); |
kamg@551 | 2624 | |
kamg@551 | 2625 | // First thing make an ic check to see if we should even be here |
kamg@551 | 2626 | |
kamg@551 | 2627 | { |
kamg@551 | 2628 | Label L; |
kamg@551 | 2629 | const Register temp_reg = G3_scratch; |
twisti@1162 | 2630 | AddressLiteral ic_miss(SharedRuntime::get_ic_miss_stub()); |
kamg@551 | 2631 | __ verify_oop(O0); |
kamg@551 | 2632 | __ ld_ptr(O0, oopDesc::klass_offset_in_bytes(), temp_reg); |
kvn@3037 | 2633 | __ cmp_and_brx_short(temp_reg, G5_inline_cache_reg, Assembler::equal, Assembler::pt, L); |
kamg@551 | 2634 | |
twisti@1162 | 2635 | __ jump_to(ic_miss, temp_reg); |
kamg@551 | 2636 | __ delayed()->nop(); |
kamg@551 | 2637 | __ align(CodeEntryAlignment); |
kamg@551 | 2638 | __ bind(L); |
kamg@551 | 2639 | } |
kamg@551 | 2640 | |
kamg@551 | 2641 | int vep_offset = ((intptr_t)__ pc()) - start; |
kamg@551 | 2642 | |
kamg@551 | 2643 | |
kamg@551 | 2644 | // The instruction at the verified entry point must be 5 bytes or longer |
kamg@551 | 2645 | // because it can be patched on the fly by make_non_entrant. The stack bang |
kamg@551 | 2646 | // instruction fits that requirement. |
kamg@551 | 2647 | |
kamg@551 | 2648 | // Generate stack overflow check before creating frame |
kamg@551 | 2649 | __ generate_stack_overflow_check(stack_size); |
kamg@551 | 2650 | |
kamg@551 | 2651 | assert(((intptr_t)__ pc() - start - vep_offset) >= 5, |
kamg@551 | 2652 | "valid size for make_non_entrant"); |
kamg@551 | 2653 | |
kamg@551 | 2654 | // Generate a new frame for the wrapper. |
kamg@551 | 2655 | __ save(SP, -stack_size, SP); |
kamg@551 | 2656 | |
kamg@551 | 2657 | // Frame is now completed as far a size and linkage. |
kamg@551 | 2658 | |
kamg@551 | 2659 | int frame_complete = ((intptr_t)__ pc()) - start; |
kamg@551 | 2660 | |
kamg@551 | 2661 | #ifdef ASSERT |
kamg@551 | 2662 | bool reg_destroyed[RegisterImpl::number_of_registers]; |
kamg@551 | 2663 | bool freg_destroyed[FloatRegisterImpl::number_of_registers]; |
kamg@551 | 2664 | for ( int r = 0 ; r < RegisterImpl::number_of_registers ; r++ ) { |
kamg@551 | 2665 | reg_destroyed[r] = false; |
kamg@551 | 2666 | } |
kamg@551 | 2667 | for ( int f = 0 ; f < FloatRegisterImpl::number_of_registers ; f++ ) { |
kamg@551 | 2668 | freg_destroyed[f] = false; |
kamg@551 | 2669 | } |
kamg@551 | 2670 | |
kamg@551 | 2671 | #endif /* ASSERT */ |
kamg@551 | 2672 | |
kamg@551 | 2673 | VMRegPair zero; |
kamg@611 | 2674 | const Register g0 = G0; // without this we get a compiler warning (why??) |
kamg@611 | 2675 | zero.set2(g0->as_VMReg()); |
kamg@551 | 2676 | |
kamg@551 | 2677 | int c_arg, j_arg; |
kamg@551 | 2678 | |
kamg@551 | 2679 | Register conversion_off = noreg; |
kamg@551 | 2680 | |
kamg@551 | 2681 | for (j_arg = first_arg_to_pass, c_arg = 0 ; |
kamg@551 | 2682 | j_arg < total_args_passed ; j_arg++, c_arg++ ) { |
kamg@551 | 2683 | |
kamg@551 | 2684 | VMRegPair src = in_regs[j_arg]; |
kamg@551 | 2685 | VMRegPair dst = out_regs[c_arg]; |
kamg@551 | 2686 | |
kamg@551 | 2687 | #ifdef ASSERT |
kamg@551 | 2688 | if (src.first()->is_Register()) { |
kamg@551 | 2689 | assert(!reg_destroyed[src.first()->as_Register()->encoding()], "ack!"); |
kamg@551 | 2690 | } else if (src.first()->is_FloatRegister()) { |
kamg@551 | 2691 | assert(!freg_destroyed[src.first()->as_FloatRegister()->encoding( |
kamg@551 | 2692 | FloatRegisterImpl::S)], "ack!"); |
kamg@551 | 2693 | } |
kamg@551 | 2694 | if (dst.first()->is_Register()) { |
kamg@551 | 2695 | reg_destroyed[dst.first()->as_Register()->encoding()] = true; |
kamg@551 | 2696 | } else if (dst.first()->is_FloatRegister()) { |
kamg@551 | 2697 | freg_destroyed[dst.first()->as_FloatRegister()->encoding( |
kamg@551 | 2698 | FloatRegisterImpl::S)] = true; |
kamg@551 | 2699 | } |
kamg@551 | 2700 | #endif /* ASSERT */ |
kamg@551 | 2701 | |
kamg@551 | 2702 | switch (in_sig_bt[j_arg]) { |
kamg@551 | 2703 | case T_ARRAY: |
kamg@551 | 2704 | case T_OBJECT: |
kamg@551 | 2705 | { |
kamg@551 | 2706 | if (out_sig_bt[c_arg] == T_BYTE || out_sig_bt[c_arg] == T_SHORT || |
kamg@551 | 2707 | out_sig_bt[c_arg] == T_INT || out_sig_bt[c_arg] == T_LONG) { |
kamg@551 | 2708 | // need to unbox a one-slot value |
kamg@551 | 2709 | Register in_reg = L0; |
kamg@551 | 2710 | Register tmp = L2; |
kamg@551 | 2711 | if ( src.first()->is_reg() ) { |
kamg@551 | 2712 | in_reg = src.first()->as_Register(); |
kamg@551 | 2713 | } else { |
kamg@551 | 2714 | assert(Assembler::is_simm13(reg2offset(src.first()) + STACK_BIAS), |
kamg@551 | 2715 | "must be"); |
kamg@551 | 2716 | __ ld_ptr(FP, reg2offset(src.first()) + STACK_BIAS, in_reg); |
kamg@551 | 2717 | } |
kamg@551 | 2718 | // If the final destination is an acceptable register |
kamg@551 | 2719 | if ( dst.first()->is_reg() ) { |
kamg@551 | 2720 | if ( dst.is_single_phys_reg() || out_sig_bt[c_arg] != T_LONG ) { |
kamg@551 | 2721 | tmp = dst.first()->as_Register(); |
kamg@551 | 2722 | } |
kamg@551 | 2723 | } |
kamg@551 | 2724 | |
kamg@551 | 2725 | Label skipUnbox; |
kamg@551 | 2726 | if ( wordSize == 4 && out_sig_bt[c_arg] == T_LONG ) { |
kamg@551 | 2727 | __ mov(G0, tmp->successor()); |
kamg@551 | 2728 | } |
kamg@551 | 2729 | __ br_null(in_reg, true, Assembler::pn, skipUnbox); |
kamg@551 | 2730 | __ delayed()->mov(G0, tmp); |
kamg@551 | 2731 | |
kvn@600 | 2732 | BasicType bt = out_sig_bt[c_arg]; |
kvn@600 | 2733 | int box_offset = java_lang_boxing_object::value_offset_in_bytes(bt); |
kvn@600 | 2734 | switch (bt) { |
kamg@551 | 2735 | case T_BYTE: |
kamg@551 | 2736 | __ ldub(in_reg, box_offset, tmp); break; |
kamg@551 | 2737 | case T_SHORT: |
kamg@551 | 2738 | __ lduh(in_reg, box_offset, tmp); break; |
kamg@551 | 2739 | case T_INT: |
kamg@551 | 2740 | __ ld(in_reg, box_offset, tmp); break; |
kamg@551 | 2741 | case T_LONG: |
kamg@551 | 2742 | __ ld_long(in_reg, box_offset, tmp); break; |
kamg@551 | 2743 | default: ShouldNotReachHere(); |
kamg@551 | 2744 | } |
kamg@551 | 2745 | |
kamg@551 | 2746 | __ bind(skipUnbox); |
kamg@551 | 2747 | // If tmp wasn't final destination copy to final destination |
kamg@551 | 2748 | if (tmp == L2) { |
kamg@551 | 2749 | VMRegPair tmp_as_VM = reg64_to_VMRegPair(L2); |
kamg@551 | 2750 | if (out_sig_bt[c_arg] == T_LONG) { |
kamg@551 | 2751 | long_move(masm, tmp_as_VM, dst); |
kamg@551 | 2752 | } else { |
kamg@551 | 2753 | move32_64(masm, tmp_as_VM, out_regs[c_arg]); |
kamg@551 | 2754 | } |
kamg@551 | 2755 | } |
kamg@551 | 2756 | if (out_sig_bt[c_arg] == T_LONG) { |
kamg@551 | 2757 | assert(out_sig_bt[c_arg+1] == T_VOID, "must be"); |
kamg@551 | 2758 | ++c_arg; // move over the T_VOID to keep the loop indices in sync |
kamg@551 | 2759 | } |
kamg@551 | 2760 | } else if (out_sig_bt[c_arg] == T_ADDRESS) { |
kamg@551 | 2761 | Register s = |
kamg@551 | 2762 | src.first()->is_reg() ? src.first()->as_Register() : L2; |
kamg@551 | 2763 | Register d = |
kamg@551 | 2764 | dst.first()->is_reg() ? dst.first()->as_Register() : L2; |
kamg@551 | 2765 | |
kamg@551 | 2766 | // We store the oop now so that the conversion pass can reach |
kamg@551 | 2767 | // while in the inner frame. This will be the only store if |
kamg@551 | 2768 | // the oop is NULL. |
kamg@551 | 2769 | if (s != L2) { |
kamg@551 | 2770 | // src is register |
kamg@551 | 2771 | if (d != L2) { |
kamg@551 | 2772 | // dst is register |
kamg@551 | 2773 | __ mov(s, d); |
kamg@551 | 2774 | } else { |
kamg@551 | 2775 | assert(Assembler::is_simm13(reg2offset(dst.first()) + |
kamg@551 | 2776 | STACK_BIAS), "must be"); |
kamg@551 | 2777 | __ st_ptr(s, SP, reg2offset(dst.first()) + STACK_BIAS); |
kamg@551 | 2778 | } |
kamg@551 | 2779 | } else { |
kamg@551 | 2780 | // src not a register |
kamg@551 | 2781 | assert(Assembler::is_simm13(reg2offset(src.first()) + |
kamg@551 | 2782 | STACK_BIAS), "must be"); |
kamg@551 | 2783 | __ ld_ptr(FP, reg2offset(src.first()) + STACK_BIAS, d); |
kamg@551 | 2784 | if (d == L2) { |
kamg@551 | 2785 | assert(Assembler::is_simm13(reg2offset(dst.first()) + |
kamg@551 | 2786 | STACK_BIAS), "must be"); |
kamg@551 | 2787 | __ st_ptr(d, SP, reg2offset(dst.first()) + STACK_BIAS); |
kamg@551 | 2788 | } |
kamg@551 | 2789 | } |
kamg@551 | 2790 | } else if (out_sig_bt[c_arg] != T_VOID) { |
kamg@551 | 2791 | // Convert the arg to NULL |
kamg@551 | 2792 | if (dst.first()->is_reg()) { |
kamg@551 | 2793 | __ mov(G0, dst.first()->as_Register()); |
kamg@551 | 2794 | } else { |
kamg@551 | 2795 | assert(Assembler::is_simm13(reg2offset(dst.first()) + |
kamg@551 | 2796 | STACK_BIAS), "must be"); |
kamg@551 | 2797 | __ st_ptr(G0, SP, reg2offset(dst.first()) + STACK_BIAS); |
kamg@551 | 2798 | } |
kamg@551 | 2799 | } |
kamg@551 | 2800 | } |
kamg@551 | 2801 | break; |
kamg@551 | 2802 | case T_VOID: |
kamg@551 | 2803 | break; |
kamg@551 | 2804 | |
kamg@551 | 2805 | case T_FLOAT: |
kamg@551 | 2806 | if (src.first()->is_stack()) { |
kamg@551 | 2807 | // Stack to stack/reg is simple |
kamg@551 | 2808 | move32_64(masm, src, dst); |
kamg@551 | 2809 | } else { |
kamg@551 | 2810 | if (dst.first()->is_reg()) { |
kamg@551 | 2811 | // freg -> reg |
kamg@551 | 2812 | int off = |
kamg@551 | 2813 | STACK_BIAS + conversion_temp * VMRegImpl::stack_slot_size; |
kamg@551 | 2814 | Register d = dst.first()->as_Register(); |
kamg@551 | 2815 | if (Assembler::is_simm13(off)) { |
kamg@551 | 2816 | __ stf(FloatRegisterImpl::S, src.first()->as_FloatRegister(), |
kamg@551 | 2817 | SP, off); |
kamg@551 | 2818 | __ ld(SP, off, d); |
kamg@551 | 2819 | } else { |
kamg@551 | 2820 | if (conversion_off == noreg) { |
kamg@551 | 2821 | __ set(off, L6); |
kamg@551 | 2822 | conversion_off = L6; |
kamg@551 | 2823 | } |
kamg@551 | 2824 | __ stf(FloatRegisterImpl::S, src.first()->as_FloatRegister(), |
kamg@551 | 2825 | SP, conversion_off); |
kamg@551 | 2826 | __ ld(SP, conversion_off , d); |
kamg@551 | 2827 | } |
kamg@551 | 2828 | } else { |
kamg@551 | 2829 | // freg -> mem |
kamg@551 | 2830 | int off = STACK_BIAS + reg2offset(dst.first()); |
kamg@551 | 2831 | if (Assembler::is_simm13(off)) { |
kamg@551 | 2832 | __ stf(FloatRegisterImpl::S, src.first()->as_FloatRegister(), |
kamg@551 | 2833 | SP, off); |
kamg@551 | 2834 | } else { |
kamg@551 | 2835 | if (conversion_off == noreg) { |
kamg@551 | 2836 | __ set(off, L6); |
kamg@551 | 2837 | conversion_off = L6; |
kamg@551 | 2838 | } |
kamg@551 | 2839 | __ stf(FloatRegisterImpl::S, src.first()->as_FloatRegister(), |
kamg@551 | 2840 | SP, conversion_off); |
kamg@551 | 2841 | } |
kamg@551 | 2842 | } |
kamg@551 | 2843 | } |
kamg@551 | 2844 | break; |
kamg@551 | 2845 | |
kamg@551 | 2846 | case T_DOUBLE: |
kamg@551 | 2847 | assert( j_arg + 1 < total_args_passed && |
kamg@551 | 2848 | in_sig_bt[j_arg + 1] == T_VOID && |
kamg@551 | 2849 | out_sig_bt[c_arg+1] == T_VOID, "bad arg list"); |
kamg@551 | 2850 | if (src.first()->is_stack()) { |
kamg@551 | 2851 | // Stack to stack/reg is simple |
kamg@551 | 2852 | long_move(masm, src, dst); |
kamg@551 | 2853 | } else { |
kamg@551 | 2854 | Register d = dst.first()->is_reg() ? dst.first()->as_Register() : L2; |
kamg@551 | 2855 | |
kamg@551 | 2856 | // Destination could be an odd reg on 32bit in which case |
kamg@551 | 2857 | // we can't load direct to the destination. |
kamg@551 | 2858 | |
kamg@551 | 2859 | if (!d->is_even() && wordSize == 4) { |
kamg@551 | 2860 | d = L2; |
kamg@551 | 2861 | } |
kamg@551 | 2862 | int off = STACK_BIAS + conversion_temp * VMRegImpl::stack_slot_size; |
kamg@551 | 2863 | if (Assembler::is_simm13(off)) { |
kamg@551 | 2864 | __ stf(FloatRegisterImpl::D, src.first()->as_FloatRegister(), |
kamg@551 | 2865 | SP, off); |
kamg@551 | 2866 | __ ld_long(SP, off, d); |
kamg@551 | 2867 | } else { |
kamg@551 | 2868 | if (conversion_off == noreg) { |
kamg@551 | 2869 | __ set(off, L6); |
kamg@551 | 2870 | conversion_off = L6; |
kamg@551 | 2871 | } |
kamg@551 | 2872 | __ stf(FloatRegisterImpl::D, src.first()->as_FloatRegister(), |
kamg@551 | 2873 | SP, conversion_off); |
kamg@551 | 2874 | __ ld_long(SP, conversion_off, d); |
kamg@551 | 2875 | } |
kamg@551 | 2876 | if (d == L2) { |
kamg@551 | 2877 | long_move(masm, reg64_to_VMRegPair(L2), dst); |
kamg@551 | 2878 | } |
kamg@551 | 2879 | } |
kamg@551 | 2880 | break; |
kamg@551 | 2881 | |
kamg@551 | 2882 | case T_LONG : |
kamg@551 | 2883 | // 32bit can't do a split move of something like g1 -> O0, O1 |
kamg@551 | 2884 | // so use a memory temp |
kamg@551 | 2885 | if (src.is_single_phys_reg() && wordSize == 4) { |
kamg@551 | 2886 | Register tmp = L2; |
kamg@551 | 2887 | if (dst.first()->is_reg() && |
kamg@551 | 2888 | (wordSize == 8 || dst.first()->as_Register()->is_even())) { |
kamg@551 | 2889 | tmp = dst.first()->as_Register(); |
kamg@551 | 2890 | } |
kamg@551 | 2891 | |
kamg@551 | 2892 | int off = STACK_BIAS + conversion_temp * VMRegImpl::stack_slot_size; |
kamg@551 | 2893 | if (Assembler::is_simm13(off)) { |
kamg@551 | 2894 | __ stx(src.first()->as_Register(), SP, off); |
kamg@551 | 2895 | __ ld_long(SP, off, tmp); |
kamg@551 | 2896 | } else { |
kamg@551 | 2897 | if (conversion_off == noreg) { |
kamg@551 | 2898 | __ set(off, L6); |
kamg@551 | 2899 | conversion_off = L6; |
kamg@551 | 2900 | } |
kamg@551 | 2901 | __ stx(src.first()->as_Register(), SP, conversion_off); |
kamg@551 | 2902 | __ ld_long(SP, conversion_off, tmp); |
kamg@551 | 2903 | } |
kamg@551 | 2904 | |
kamg@551 | 2905 | if (tmp == L2) { |
kamg@551 | 2906 | long_move(masm, reg64_to_VMRegPair(L2), dst); |
kamg@551 | 2907 | } |
kamg@551 | 2908 | } else { |
kamg@551 | 2909 | long_move(masm, src, dst); |
kamg@551 | 2910 | } |
kamg@551 | 2911 | break; |
kamg@551 | 2912 | |
kamg@551 | 2913 | case T_ADDRESS: assert(false, "found T_ADDRESS in java args"); |
kamg@551 | 2914 | |
kamg@551 | 2915 | default: |
kamg@551 | 2916 | move32_64(masm, src, dst); |
kamg@551 | 2917 | } |
kamg@551 | 2918 | } |
kamg@551 | 2919 | |
kamg@551 | 2920 | |
kamg@551 | 2921 | // If we have any strings we must store any register based arg to the stack |
kamg@551 | 2922 | // This includes any still live xmm registers too. |
kamg@551 | 2923 | |
kamg@551 | 2924 | if (total_strings > 0 ) { |
kamg@551 | 2925 | |
kamg@551 | 2926 | // protect all the arg registers |
kamg@551 | 2927 | __ save_frame(0); |
kamg@551 | 2928 | __ mov(G2_thread, L7_thread_cache); |
kamg@551 | 2929 | const Register L2_string_off = L2; |
kamg@551 | 2930 | |
kamg@551 | 2931 | // Get first string offset |
kamg@551 | 2932 | __ set(string_locs * VMRegImpl::stack_slot_size, L2_string_off); |
kamg@551 | 2933 | |
kamg@551 | 2934 | for (c_arg = 0 ; c_arg < total_c_args ; c_arg++ ) { |
kamg@551 | 2935 | if (out_sig_bt[c_arg] == T_ADDRESS) { |
kamg@551 | 2936 | |
kamg@551 | 2937 | VMRegPair dst = out_regs[c_arg]; |
kamg@551 | 2938 | const Register d = dst.first()->is_reg() ? |
kamg@551 | 2939 | dst.first()->as_Register()->after_save() : noreg; |
kamg@551 | 2940 | |
kamg@551 | 2941 | // It's a string the oop and it was already copied to the out arg |
kamg@551 | 2942 | // position |
kamg@551 | 2943 | if (d != noreg) { |
kamg@551 | 2944 | __ mov(d, O0); |
kamg@551 | 2945 | } else { |
kamg@551 | 2946 | assert(Assembler::is_simm13(reg2offset(dst.first()) + STACK_BIAS), |
kamg@551 | 2947 | "must be"); |
kamg@551 | 2948 | __ ld_ptr(FP, reg2offset(dst.first()) + STACK_BIAS, O0); |
kamg@551 | 2949 | } |
kamg@551 | 2950 | Label skip; |
kamg@551 | 2951 | |
kamg@551 | 2952 | __ br_null(O0, false, Assembler::pn, skip); |
kamg@551 | 2953 | __ delayed()->add(FP, L2_string_off, O1); |
kamg@551 | 2954 | |
kamg@551 | 2955 | if (d != noreg) { |
kamg@551 | 2956 | __ mov(O1, d); |
kamg@551 | 2957 | } else { |
kamg@551 | 2958 | assert(Assembler::is_simm13(reg2offset(dst.first()) + STACK_BIAS), |
kamg@551 | 2959 | "must be"); |
kamg@551 | 2960 | __ st_ptr(O1, FP, reg2offset(dst.first()) + STACK_BIAS); |
kamg@551 | 2961 | } |
kamg@551 | 2962 | |
kamg@551 | 2963 | __ call(CAST_FROM_FN_PTR(address, SharedRuntime::get_utf), |
kamg@551 | 2964 | relocInfo::runtime_call_type); |
kamg@551 | 2965 | __ delayed()->add(L2_string_off, max_dtrace_string_size, L2_string_off); |
kamg@551 | 2966 | |
kamg@551 | 2967 | __ bind(skip); |
kamg@551 | 2968 | |
kamg@551 | 2969 | } |
kamg@551 | 2970 | |
kamg@551 | 2971 | } |
kamg@551 | 2972 | __ mov(L7_thread_cache, G2_thread); |
kamg@551 | 2973 | __ restore(); |
kamg@551 | 2974 | |
kamg@551 | 2975 | } |
kamg@551 | 2976 | |
kamg@551 | 2977 | |
kamg@551 | 2978 | // Ok now we are done. Need to place the nop that dtrace wants in order to |
kamg@551 | 2979 | // patch in the trap |
kamg@551 | 2980 | |
kamg@551 | 2981 | int patch_offset = ((intptr_t)__ pc()) - start; |
kamg@551 | 2982 | |
kamg@551 | 2983 | __ nop(); |
kamg@551 | 2984 | |
kamg@551 | 2985 | |
kamg@551 | 2986 | // Return |
kamg@551 | 2987 | |
kamg@551 | 2988 | __ ret(); |
kamg@551 | 2989 | __ delayed()->restore(); |
kamg@551 | 2990 | |
kamg@551 | 2991 | __ flush(); |
kamg@551 | 2992 | |
kamg@551 | 2993 | nmethod *nm = nmethod::new_dtrace_nmethod( |
kamg@551 | 2994 | method, masm->code(), vep_offset, patch_offset, frame_complete, |
kamg@551 | 2995 | stack_slots / VMRegImpl::slots_per_word); |
kamg@551 | 2996 | return nm; |
kamg@551 | 2997 | |
kamg@551 | 2998 | } |
kamg@551 | 2999 | |
kamg@551 | 3000 | #endif // HAVE_DTRACE_H |
kamg@551 | 3001 | |
duke@435 | 3002 | // this function returns the adjust size (in number of words) to a c2i adapter |
duke@435 | 3003 | // activation for use during deoptimization |
duke@435 | 3004 | int Deoptimization::last_frame_adjust(int callee_parameters, int callee_locals) { |
duke@435 | 3005 | assert(callee_locals >= callee_parameters, |
duke@435 | 3006 | "test and remove; got more parms than locals"); |
duke@435 | 3007 | if (callee_locals < callee_parameters) |
duke@435 | 3008 | return 0; // No adjustment for negative locals |
twisti@1861 | 3009 | int diff = (callee_locals - callee_parameters) * Interpreter::stackElementWords; |
duke@435 | 3010 | return round_to(diff, WordsPerLong); |
duke@435 | 3011 | } |
duke@435 | 3012 | |
duke@435 | 3013 | // "Top of Stack" slots that may be unused by the calling convention but must |
duke@435 | 3014 | // otherwise be preserved. |
duke@435 | 3015 | // On Intel these are not necessary and the value can be zero. |
duke@435 | 3016 | // On Sparc this describes the words reserved for storing a register window |
duke@435 | 3017 | // when an interrupt occurs. |
duke@435 | 3018 | uint SharedRuntime::out_preserve_stack_slots() { |
duke@435 | 3019 | return frame::register_save_words * VMRegImpl::slots_per_word; |
duke@435 | 3020 | } |
duke@435 | 3021 | |
duke@435 | 3022 | static void gen_new_frame(MacroAssembler* masm, bool deopt) { |
duke@435 | 3023 | // |
duke@435 | 3024 | // Common out the new frame generation for deopt and uncommon trap |
duke@435 | 3025 | // |
duke@435 | 3026 | Register G3pcs = G3_scratch; // Array of new pcs (input) |
duke@435 | 3027 | Register Oreturn0 = O0; |
duke@435 | 3028 | Register Oreturn1 = O1; |
duke@435 | 3029 | Register O2UnrollBlock = O2; |
duke@435 | 3030 | Register O3array = O3; // Array of frame sizes (input) |
duke@435 | 3031 | Register O4array_size = O4; // number of frames (input) |
duke@435 | 3032 | Register O7frame_size = O7; // number of frames (input) |
duke@435 | 3033 | |
duke@435 | 3034 | __ ld_ptr(O3array, 0, O7frame_size); |
duke@435 | 3035 | __ sub(G0, O7frame_size, O7frame_size); |
duke@435 | 3036 | __ save(SP, O7frame_size, SP); |
duke@435 | 3037 | __ ld_ptr(G3pcs, 0, I7); // load frame's new pc |
duke@435 | 3038 | |
duke@435 | 3039 | #ifdef ASSERT |
duke@435 | 3040 | // make sure that the frames are aligned properly |
duke@435 | 3041 | #ifndef _LP64 |
duke@435 | 3042 | __ btst(wordSize*2-1, SP); |
duke@435 | 3043 | __ breakpoint_trap(Assembler::notZero); |
duke@435 | 3044 | #endif |
duke@435 | 3045 | #endif |
duke@435 | 3046 | |
duke@435 | 3047 | // Deopt needs to pass some extra live values from frame to frame |
duke@435 | 3048 | |
duke@435 | 3049 | if (deopt) { |
duke@435 | 3050 | __ mov(Oreturn0->after_save(), Oreturn0); |
duke@435 | 3051 | __ mov(Oreturn1->after_save(), Oreturn1); |
duke@435 | 3052 | } |
duke@435 | 3053 | |
duke@435 | 3054 | __ mov(O4array_size->after_save(), O4array_size); |
duke@435 | 3055 | __ sub(O4array_size, 1, O4array_size); |
duke@435 | 3056 | __ mov(O3array->after_save(), O3array); |
duke@435 | 3057 | __ mov(O2UnrollBlock->after_save(), O2UnrollBlock); |
duke@435 | 3058 | __ add(G3pcs, wordSize, G3pcs); // point to next pc value |
duke@435 | 3059 | |
duke@435 | 3060 | #ifdef ASSERT |
duke@435 | 3061 | // trash registers to show a clear pattern in backtraces |
duke@435 | 3062 | __ set(0xDEAD0000, I0); |
duke@435 | 3063 | __ add(I0, 2, I1); |
duke@435 | 3064 | __ add(I0, 4, I2); |
duke@435 | 3065 | __ add(I0, 6, I3); |
duke@435 | 3066 | __ add(I0, 8, I4); |
duke@435 | 3067 | // Don't touch I5 could have valuable savedSP |
duke@435 | 3068 | __ set(0xDEADBEEF, L0); |
duke@435 | 3069 | __ mov(L0, L1); |
duke@435 | 3070 | __ mov(L0, L2); |
duke@435 | 3071 | __ mov(L0, L3); |
duke@435 | 3072 | __ mov(L0, L4); |
duke@435 | 3073 | __ mov(L0, L5); |
duke@435 | 3074 | |
duke@435 | 3075 | // trash the return value as there is nothing to return yet |
duke@435 | 3076 | __ set(0xDEAD0001, O7); |
duke@435 | 3077 | #endif |
duke@435 | 3078 | |
duke@435 | 3079 | __ mov(SP, O5_savedSP); |
duke@435 | 3080 | } |
duke@435 | 3081 | |
duke@435 | 3082 | |
duke@435 | 3083 | static void make_new_frames(MacroAssembler* masm, bool deopt) { |
duke@435 | 3084 | // |
duke@435 | 3085 | // loop through the UnrollBlock info and create new frames |
duke@435 | 3086 | // |
duke@435 | 3087 | Register G3pcs = G3_scratch; |
duke@435 | 3088 | Register Oreturn0 = O0; |
duke@435 | 3089 | Register Oreturn1 = O1; |
duke@435 | 3090 | Register O2UnrollBlock = O2; |
duke@435 | 3091 | Register O3array = O3; |
duke@435 | 3092 | Register O4array_size = O4; |
duke@435 | 3093 | Label loop; |
duke@435 | 3094 | |
duke@435 | 3095 | // Before we make new frames, check to see if stack is available. |
duke@435 | 3096 | // Do this after the caller's return address is on top of stack |
duke@435 | 3097 | if (UseStackBanging) { |
duke@435 | 3098 | // Get total frame size for interpreted frames |
twisti@1162 | 3099 | __ ld(O2UnrollBlock, Deoptimization::UnrollBlock::total_frame_sizes_offset_in_bytes(), O4); |
duke@435 | 3100 | __ bang_stack_size(O4, O3, G3_scratch); |
duke@435 | 3101 | } |
duke@435 | 3102 | |
twisti@1162 | 3103 | __ ld(O2UnrollBlock, Deoptimization::UnrollBlock::number_of_frames_offset_in_bytes(), O4array_size); |
twisti@1162 | 3104 | __ ld_ptr(O2UnrollBlock, Deoptimization::UnrollBlock::frame_pcs_offset_in_bytes(), G3pcs); |
twisti@1162 | 3105 | __ ld_ptr(O2UnrollBlock, Deoptimization::UnrollBlock::frame_sizes_offset_in_bytes(), O3array); |
duke@435 | 3106 | |
duke@435 | 3107 | // Adjust old interpreter frame to make space for new frame's extra java locals |
duke@435 | 3108 | // |
duke@435 | 3109 | // We capture the original sp for the transition frame only because it is needed in |
duke@435 | 3110 | // order to properly calculate interpreter_sp_adjustment. Even though in real life |
duke@435 | 3111 | // every interpreter frame captures a savedSP it is only needed at the transition |
duke@435 | 3112 | // (fortunately). If we had to have it correct everywhere then we would need to |
duke@435 | 3113 | // be told the sp_adjustment for each frame we create. If the frame size array |
duke@435 | 3114 | // were to have twice the frame count entries then we could have pairs [sp_adjustment, frame_size] |
duke@435 | 3115 | // for each frame we create and keep up the illusion every where. |
duke@435 | 3116 | // |
duke@435 | 3117 | |
twisti@1162 | 3118 | __ ld(O2UnrollBlock, Deoptimization::UnrollBlock::caller_adjustment_offset_in_bytes(), O7); |
duke@435 | 3119 | __ mov(SP, O5_savedSP); // remember initial sender's original sp before adjustment |
duke@435 | 3120 | __ sub(SP, O7, SP); |
duke@435 | 3121 | |
duke@435 | 3122 | #ifdef ASSERT |
duke@435 | 3123 | // make sure that there is at least one entry in the array |
duke@435 | 3124 | __ tst(O4array_size); |
duke@435 | 3125 | __ breakpoint_trap(Assembler::zero); |
duke@435 | 3126 | #endif |
duke@435 | 3127 | |
duke@435 | 3128 | // Now push the new interpreter frames |
duke@435 | 3129 | __ bind(loop); |
duke@435 | 3130 | |
duke@435 | 3131 | // allocate a new frame, filling the registers |
duke@435 | 3132 | |
duke@435 | 3133 | gen_new_frame(masm, deopt); // allocate an interpreter frame |
duke@435 | 3134 | |
kvn@3037 | 3135 | __ cmp_zero_and_br(Assembler::notZero, O4array_size, loop); |
duke@435 | 3136 | __ delayed()->add(O3array, wordSize, O3array); |
duke@435 | 3137 | __ ld_ptr(G3pcs, 0, O7); // load final frame new pc |
duke@435 | 3138 | |
duke@435 | 3139 | } |
duke@435 | 3140 | |
duke@435 | 3141 | //------------------------------generate_deopt_blob---------------------------- |
duke@435 | 3142 | // Ought to generate an ideal graph & compile, but here's some SPARC ASM |
duke@435 | 3143 | // instead. |
duke@435 | 3144 | void SharedRuntime::generate_deopt_blob() { |
duke@435 | 3145 | // allocate space for the code |
duke@435 | 3146 | ResourceMark rm; |
duke@435 | 3147 | // setup code generation tools |
duke@435 | 3148 | int pad = VerifyThread ? 512 : 0;// Extra slop space for more verify code |
duke@435 | 3149 | #ifdef _LP64 |
duke@435 | 3150 | CodeBuffer buffer("deopt_blob", 2100+pad, 512); |
duke@435 | 3151 | #else |
duke@435 | 3152 | // Measured 8/7/03 at 1212 in 32bit debug build (no VerifyThread) |
duke@435 | 3153 | // Measured 8/7/03 at 1396 in 32bit debug build (VerifyThread) |
duke@435 | 3154 | CodeBuffer buffer("deopt_blob", 1600+pad, 512); |
duke@435 | 3155 | #endif /* _LP64 */ |
duke@435 | 3156 | MacroAssembler* masm = new MacroAssembler(&buffer); |
duke@435 | 3157 | FloatRegister Freturn0 = F0; |
duke@435 | 3158 | Register Greturn1 = G1; |
duke@435 | 3159 | Register Oreturn0 = O0; |
duke@435 | 3160 | Register Oreturn1 = O1; |
duke@435 | 3161 | Register O2UnrollBlock = O2; |
never@1472 | 3162 | Register L0deopt_mode = L0; |
never@1472 | 3163 | Register G4deopt_mode = G4_scratch; |
duke@435 | 3164 | int frame_size_words; |
twisti@1162 | 3165 | Address saved_Freturn0_addr(FP, -sizeof(double) + STACK_BIAS); |
duke@435 | 3166 | #if !defined(_LP64) && defined(COMPILER2) |
twisti@1162 | 3167 | Address saved_Greturn1_addr(FP, -sizeof(double) -sizeof(jlong) + STACK_BIAS); |
duke@435 | 3168 | #endif |
duke@435 | 3169 | Label cont; |
duke@435 | 3170 | |
duke@435 | 3171 | OopMapSet *oop_maps = new OopMapSet(); |
duke@435 | 3172 | |
duke@435 | 3173 | // |
duke@435 | 3174 | // This is the entry point for code which is returning to a de-optimized |
duke@435 | 3175 | // frame. |
duke@435 | 3176 | // The steps taken by this frame are as follows: |
duke@435 | 3177 | // - push a dummy "register_save" and save the return values (O0, O1, F0/F1, G1) |
duke@435 | 3178 | // and all potentially live registers (at a pollpoint many registers can be live). |
duke@435 | 3179 | // |
duke@435 | 3180 | // - call the C routine: Deoptimization::fetch_unroll_info (this function |
duke@435 | 3181 | // returns information about the number and size of interpreter frames |
duke@435 | 3182 | // which are equivalent to the frame which is being deoptimized) |
duke@435 | 3183 | // - deallocate the unpack frame, restoring only results values. Other |
duke@435 | 3184 | // volatile registers will now be captured in the vframeArray as needed. |
duke@435 | 3185 | // - deallocate the deoptimization frame |
duke@435 | 3186 | // - in a loop using the information returned in the previous step |
duke@435 | 3187 | // push new interpreter frames (take care to propagate the return |
duke@435 | 3188 | // values through each new frame pushed) |
duke@435 | 3189 | // - create a dummy "unpack_frame" and save the return values (O0, O1, F0) |
duke@435 | 3190 | // - call the C routine: Deoptimization::unpack_frames (this function |
duke@435 | 3191 | // lays out values on the interpreter frame which was just created) |
duke@435 | 3192 | // - deallocate the dummy unpack_frame |
duke@435 | 3193 | // - ensure that all the return values are correctly set and then do |
duke@435 | 3194 | // a return to the interpreter entry point |
duke@435 | 3195 | // |
duke@435 | 3196 | // Refer to the following methods for more information: |
duke@435 | 3197 | // - Deoptimization::fetch_unroll_info |
duke@435 | 3198 | // - Deoptimization::unpack_frames |
duke@435 | 3199 | |
duke@435 | 3200 | OopMap* map = NULL; |
duke@435 | 3201 | |
duke@435 | 3202 | int start = __ offset(); |
duke@435 | 3203 | |
duke@435 | 3204 | // restore G2, the trampoline destroyed it |
duke@435 | 3205 | __ get_thread(); |
duke@435 | 3206 | |
duke@435 | 3207 | // On entry we have been called by the deoptimized nmethod with a call that |
duke@435 | 3208 | // replaced the original call (or safepoint polling location) so the deoptimizing |
duke@435 | 3209 | // pc is now in O7. Return values are still in the expected places |
duke@435 | 3210 | |
duke@435 | 3211 | map = RegisterSaver::save_live_registers(masm, 0, &frame_size_words); |
kvn@3037 | 3212 | __ ba(cont); |
never@1472 | 3213 | __ delayed()->mov(Deoptimization::Unpack_deopt, L0deopt_mode); |
duke@435 | 3214 | |
duke@435 | 3215 | int exception_offset = __ offset() - start; |
duke@435 | 3216 | |
duke@435 | 3217 | // restore G2, the trampoline destroyed it |
duke@435 | 3218 | __ get_thread(); |
duke@435 | 3219 | |
duke@435 | 3220 | // On entry we have been jumped to by the exception handler (or exception_blob |
duke@435 | 3221 | // for server). O0 contains the exception oop and O7 contains the original |
duke@435 | 3222 | // exception pc. So if we push a frame here it will look to the |
duke@435 | 3223 | // stack walking code (fetch_unroll_info) just like a normal call so |
duke@435 | 3224 | // state will be extracted normally. |
duke@435 | 3225 | |
duke@435 | 3226 | // save exception oop in JavaThread and fall through into the |
duke@435 | 3227 | // exception_in_tls case since they are handled in same way except |
duke@435 | 3228 | // for where the pending exception is kept. |
twisti@1162 | 3229 | __ st_ptr(Oexception, G2_thread, JavaThread::exception_oop_offset()); |
duke@435 | 3230 | |
duke@435 | 3231 | // |
duke@435 | 3232 | // Vanilla deoptimization with an exception pending in exception_oop |
duke@435 | 3233 | // |
duke@435 | 3234 | int exception_in_tls_offset = __ offset() - start; |
duke@435 | 3235 | |
duke@435 | 3236 | // No need to update oop_map as each call to save_live_registers will produce identical oopmap |
duke@435 | 3237 | (void) RegisterSaver::save_live_registers(masm, 0, &frame_size_words); |
duke@435 | 3238 | |
duke@435 | 3239 | // Restore G2_thread |
duke@435 | 3240 | __ get_thread(); |
duke@435 | 3241 | |
duke@435 | 3242 | #ifdef ASSERT |
duke@435 | 3243 | { |
duke@435 | 3244 | // verify that there is really an exception oop in exception_oop |
duke@435 | 3245 | Label has_exception; |
twisti@1162 | 3246 | __ ld_ptr(G2_thread, JavaThread::exception_oop_offset(), Oexception); |
kvn@3037 | 3247 | __ br_notnull_short(Oexception, Assembler::pt, has_exception); |
duke@435 | 3248 | __ stop("no exception in thread"); |
duke@435 | 3249 | __ bind(has_exception); |
duke@435 | 3250 | |
duke@435 | 3251 | // verify that there is no pending exception |
duke@435 | 3252 | Label no_pending_exception; |
twisti@1162 | 3253 | Address exception_addr(G2_thread, Thread::pending_exception_offset()); |
duke@435 | 3254 | __ ld_ptr(exception_addr, Oexception); |
kvn@3037 | 3255 | __ br_null_short(Oexception, Assembler::pt, no_pending_exception); |
duke@435 | 3256 | __ stop("must not have pending exception here"); |
duke@435 | 3257 | __ bind(no_pending_exception); |
duke@435 | 3258 | } |
duke@435 | 3259 | #endif |
duke@435 | 3260 | |
kvn@3037 | 3261 | __ ba(cont); |
never@1472 | 3262 | __ delayed()->mov(Deoptimization::Unpack_exception, L0deopt_mode);; |
duke@435 | 3263 | |
duke@435 | 3264 | // |
duke@435 | 3265 | // Reexecute entry, similar to c2 uncommon trap |
duke@435 | 3266 | // |
duke@435 | 3267 | int reexecute_offset = __ offset() - start; |
duke@435 | 3268 | |
duke@435 | 3269 | // No need to update oop_map as each call to save_live_registers will produce identical oopmap |
duke@435 | 3270 | (void) RegisterSaver::save_live_registers(masm, 0, &frame_size_words); |
duke@435 | 3271 | |
never@1472 | 3272 | __ mov(Deoptimization::Unpack_reexecute, L0deopt_mode); |
duke@435 | 3273 | |
duke@435 | 3274 | __ bind(cont); |
duke@435 | 3275 | |
duke@435 | 3276 | __ set_last_Java_frame(SP, noreg); |
duke@435 | 3277 | |
duke@435 | 3278 | // do the call by hand so we can get the oopmap |
duke@435 | 3279 | |
duke@435 | 3280 | __ mov(G2_thread, L7_thread_cache); |
duke@435 | 3281 | __ call(CAST_FROM_FN_PTR(address, Deoptimization::fetch_unroll_info), relocInfo::runtime_call_type); |
duke@435 | 3282 | __ delayed()->mov(G2_thread, O0); |
duke@435 | 3283 | |
duke@435 | 3284 | // Set an oopmap for the call site this describes all our saved volatile registers |
duke@435 | 3285 | |
duke@435 | 3286 | oop_maps->add_gc_map( __ offset()-start, map); |
duke@435 | 3287 | |
duke@435 | 3288 | __ mov(L7_thread_cache, G2_thread); |
duke@435 | 3289 | |
duke@435 | 3290 | __ reset_last_Java_frame(); |
duke@435 | 3291 | |
duke@435 | 3292 | // NOTE: we know that only O0/O1 will be reloaded by restore_result_registers |
duke@435 | 3293 | // so this move will survive |
duke@435 | 3294 | |
never@1472 | 3295 | __ mov(L0deopt_mode, G4deopt_mode); |
duke@435 | 3296 | |
duke@435 | 3297 | __ mov(O0, O2UnrollBlock->after_save()); |
duke@435 | 3298 | |
duke@435 | 3299 | RegisterSaver::restore_result_registers(masm); |
duke@435 | 3300 | |
duke@435 | 3301 | Label noException; |
kvn@3037 | 3302 | __ cmp_and_br_short(G4deopt_mode, Deoptimization::Unpack_exception, Assembler::notEqual, Assembler::pt, noException); |
duke@435 | 3303 | |
duke@435 | 3304 | // Move the pending exception from exception_oop to Oexception so |
duke@435 | 3305 | // the pending exception will be picked up the interpreter. |
duke@435 | 3306 | __ ld_ptr(G2_thread, in_bytes(JavaThread::exception_oop_offset()), Oexception); |
duke@435 | 3307 | __ st_ptr(G0, G2_thread, in_bytes(JavaThread::exception_oop_offset())); |
duke@435 | 3308 | __ bind(noException); |
duke@435 | 3309 | |
duke@435 | 3310 | // deallocate the deoptimization frame taking care to preserve the return values |
duke@435 | 3311 | __ mov(Oreturn0, Oreturn0->after_save()); |
duke@435 | 3312 | __ mov(Oreturn1, Oreturn1->after_save()); |
duke@435 | 3313 | __ mov(O2UnrollBlock, O2UnrollBlock->after_save()); |
duke@435 | 3314 | __ restore(); |
duke@435 | 3315 | |
duke@435 | 3316 | // Allocate new interpreter frame(s) and possible c2i adapter frame |
duke@435 | 3317 | |
duke@435 | 3318 | make_new_frames(masm, true); |
duke@435 | 3319 | |
duke@435 | 3320 | // push a dummy "unpack_frame" taking care of float return values and |
duke@435 | 3321 | // call Deoptimization::unpack_frames to have the unpacker layout |
duke@435 | 3322 | // information in the interpreter frames just created and then return |
duke@435 | 3323 | // to the interpreter entry point |
duke@435 | 3324 | __ save(SP, -frame_size_words*wordSize, SP); |
duke@435 | 3325 | __ stf(FloatRegisterImpl::D, Freturn0, saved_Freturn0_addr); |
duke@435 | 3326 | #if !defined(_LP64) |
duke@435 | 3327 | #if defined(COMPILER2) |
iveresov@2138 | 3328 | // 32-bit 1-register longs return longs in G1 |
iveresov@2138 | 3329 | __ stx(Greturn1, saved_Greturn1_addr); |
duke@435 | 3330 | #endif |
duke@435 | 3331 | __ set_last_Java_frame(SP, noreg); |
never@1472 | 3332 | __ call_VM_leaf(L7_thread_cache, CAST_FROM_FN_PTR(address, Deoptimization::unpack_frames), G2_thread, G4deopt_mode); |
duke@435 | 3333 | #else |
duke@435 | 3334 | // LP64 uses g4 in set_last_Java_frame |
never@1472 | 3335 | __ mov(G4deopt_mode, O1); |
duke@435 | 3336 | __ set_last_Java_frame(SP, G0); |
duke@435 | 3337 | __ call_VM_leaf(L7_thread_cache, CAST_FROM_FN_PTR(address, Deoptimization::unpack_frames), G2_thread, O1); |
duke@435 | 3338 | #endif |
duke@435 | 3339 | __ reset_last_Java_frame(); |
duke@435 | 3340 | __ ldf(FloatRegisterImpl::D, saved_Freturn0_addr, Freturn0); |
duke@435 | 3341 | |
duke@435 | 3342 | #if !defined(_LP64) && defined(COMPILER2) |
duke@435 | 3343 | // In 32 bit, C2 returns longs in G1 so restore the saved G1 into |
iveresov@2138 | 3344 | // I0/I1 if the return value is long. |
iveresov@2138 | 3345 | Label not_long; |
kvn@3037 | 3346 | __ cmp_and_br_short(O0,T_LONG, Assembler::notEqual, Assembler::pt, not_long); |
iveresov@2138 | 3347 | __ ldd(saved_Greturn1_addr,I0); |
iveresov@2138 | 3348 | __ bind(not_long); |
duke@435 | 3349 | #endif |
duke@435 | 3350 | __ ret(); |
duke@435 | 3351 | __ delayed()->restore(); |
duke@435 | 3352 | |
duke@435 | 3353 | masm->flush(); |
duke@435 | 3354 | _deopt_blob = DeoptimizationBlob::create(&buffer, oop_maps, 0, exception_offset, reexecute_offset, frame_size_words); |
duke@435 | 3355 | _deopt_blob->set_unpack_with_exception_in_tls_offset(exception_in_tls_offset); |
duke@435 | 3356 | } |
duke@435 | 3357 | |
duke@435 | 3358 | #ifdef COMPILER2 |
duke@435 | 3359 | |
duke@435 | 3360 | //------------------------------generate_uncommon_trap_blob-------------------- |
duke@435 | 3361 | // Ought to generate an ideal graph & compile, but here's some SPARC ASM |
duke@435 | 3362 | // instead. |
duke@435 | 3363 | void SharedRuntime::generate_uncommon_trap_blob() { |
duke@435 | 3364 | // allocate space for the code |
duke@435 | 3365 | ResourceMark rm; |
duke@435 | 3366 | // setup code generation tools |
duke@435 | 3367 | int pad = VerifyThread ? 512 : 0; |
duke@435 | 3368 | #ifdef _LP64 |
duke@435 | 3369 | CodeBuffer buffer("uncommon_trap_blob", 2700+pad, 512); |
duke@435 | 3370 | #else |
duke@435 | 3371 | // Measured 8/7/03 at 660 in 32bit debug build (no VerifyThread) |
duke@435 | 3372 | // Measured 8/7/03 at 1028 in 32bit debug build (VerifyThread) |
duke@435 | 3373 | CodeBuffer buffer("uncommon_trap_blob", 2000+pad, 512); |
duke@435 | 3374 | #endif |
duke@435 | 3375 | MacroAssembler* masm = new MacroAssembler(&buffer); |
duke@435 | 3376 | Register O2UnrollBlock = O2; |
duke@435 | 3377 | Register O2klass_index = O2; |
duke@435 | 3378 | |
duke@435 | 3379 | // |
duke@435 | 3380 | // This is the entry point for all traps the compiler takes when it thinks |
duke@435 | 3381 | // it cannot handle further execution of compilation code. The frame is |
duke@435 | 3382 | // deoptimized in these cases and converted into interpreter frames for |
duke@435 | 3383 | // execution |
duke@435 | 3384 | // The steps taken by this frame are as follows: |
duke@435 | 3385 | // - push a fake "unpack_frame" |
duke@435 | 3386 | // - call the C routine Deoptimization::uncommon_trap (this function |
duke@435 | 3387 | // packs the current compiled frame into vframe arrays and returns |
duke@435 | 3388 | // information about the number and size of interpreter frames which |
duke@435 | 3389 | // are equivalent to the frame which is being deoptimized) |
duke@435 | 3390 | // - deallocate the "unpack_frame" |
duke@435 | 3391 | // - deallocate the deoptimization frame |
duke@435 | 3392 | // - in a loop using the information returned in the previous step |
duke@435 | 3393 | // push interpreter frames; |
duke@435 | 3394 | // - create a dummy "unpack_frame" |
duke@435 | 3395 | // - call the C routine: Deoptimization::unpack_frames (this function |
duke@435 | 3396 | // lays out values on the interpreter frame which was just created) |
duke@435 | 3397 | // - deallocate the dummy unpack_frame |
duke@435 | 3398 | // - return to the interpreter entry point |
duke@435 | 3399 | // |
duke@435 | 3400 | // Refer to the following methods for more information: |
duke@435 | 3401 | // - Deoptimization::uncommon_trap |
duke@435 | 3402 | // - Deoptimization::unpack_frame |
duke@435 | 3403 | |
duke@435 | 3404 | // the unloaded class index is in O0 (first parameter to this blob) |
duke@435 | 3405 | |
duke@435 | 3406 | // push a dummy "unpack_frame" |
duke@435 | 3407 | // and call Deoptimization::uncommon_trap to pack the compiled frame into |
duke@435 | 3408 | // vframe array and return the UnrollBlock information |
duke@435 | 3409 | __ save_frame(0); |
duke@435 | 3410 | __ set_last_Java_frame(SP, noreg); |
duke@435 | 3411 | __ mov(I0, O2klass_index); |
duke@435 | 3412 | __ call_VM_leaf(L7_thread_cache, CAST_FROM_FN_PTR(address, Deoptimization::uncommon_trap), G2_thread, O2klass_index); |
duke@435 | 3413 | __ reset_last_Java_frame(); |
duke@435 | 3414 | __ mov(O0, O2UnrollBlock->after_save()); |
duke@435 | 3415 | __ restore(); |
duke@435 | 3416 | |
duke@435 | 3417 | // deallocate the deoptimized frame taking care to preserve the return values |
duke@435 | 3418 | __ mov(O2UnrollBlock, O2UnrollBlock->after_save()); |
duke@435 | 3419 | __ restore(); |
duke@435 | 3420 | |
duke@435 | 3421 | // Allocate new interpreter frame(s) and possible c2i adapter frame |
duke@435 | 3422 | |
duke@435 | 3423 | make_new_frames(masm, false); |
duke@435 | 3424 | |
duke@435 | 3425 | // push a dummy "unpack_frame" taking care of float return values and |
duke@435 | 3426 | // call Deoptimization::unpack_frames to have the unpacker layout |
duke@435 | 3427 | // information in the interpreter frames just created and then return |
duke@435 | 3428 | // to the interpreter entry point |
duke@435 | 3429 | __ save_frame(0); |
duke@435 | 3430 | __ set_last_Java_frame(SP, noreg); |
duke@435 | 3431 | __ mov(Deoptimization::Unpack_uncommon_trap, O3); // indicate it is the uncommon trap case |
duke@435 | 3432 | __ call_VM_leaf(L7_thread_cache, CAST_FROM_FN_PTR(address, Deoptimization::unpack_frames), G2_thread, O3); |
duke@435 | 3433 | __ reset_last_Java_frame(); |
duke@435 | 3434 | __ ret(); |
duke@435 | 3435 | __ delayed()->restore(); |
duke@435 | 3436 | |
duke@435 | 3437 | masm->flush(); |
duke@435 | 3438 | _uncommon_trap_blob = UncommonTrapBlob::create(&buffer, NULL, __ total_frame_size_in_bytes(0)/wordSize); |
duke@435 | 3439 | } |
duke@435 | 3440 | |
duke@435 | 3441 | #endif // COMPILER2 |
duke@435 | 3442 | |
duke@435 | 3443 | //------------------------------generate_handler_blob------------------- |
duke@435 | 3444 | // |
duke@435 | 3445 | // Generate a special Compile2Runtime blob that saves all registers, and sets |
duke@435 | 3446 | // up an OopMap. |
duke@435 | 3447 | // |
duke@435 | 3448 | // This blob is jumped to (via a breakpoint and the signal handler) from a |
duke@435 | 3449 | // safepoint in compiled code. On entry to this blob, O7 contains the |
duke@435 | 3450 | // address in the original nmethod at which we should resume normal execution. |
duke@435 | 3451 | // Thus, this blob looks like a subroutine which must preserve lots of |
duke@435 | 3452 | // registers and return normally. Note that O7 is never register-allocated, |
duke@435 | 3453 | // so it is guaranteed to be free here. |
duke@435 | 3454 | // |
duke@435 | 3455 | |
duke@435 | 3456 | // The hardest part of what this blob must do is to save the 64-bit %o |
duke@435 | 3457 | // registers in the 32-bit build. A simple 'save' turn the %o's to %i's and |
duke@435 | 3458 | // an interrupt will chop off their heads. Making space in the caller's frame |
duke@435 | 3459 | // first will let us save the 64-bit %o's before save'ing, but we cannot hand |
duke@435 | 3460 | // the adjusted FP off to the GC stack-crawler: this will modify the caller's |
duke@435 | 3461 | // SP and mess up HIS OopMaps. So we first adjust the caller's SP, then save |
duke@435 | 3462 | // the 64-bit %o's, then do a save, then fixup the caller's SP (our FP). |
duke@435 | 3463 | // Tricky, tricky, tricky... |
duke@435 | 3464 | |
never@2950 | 3465 | SafepointBlob* SharedRuntime::generate_handler_blob(address call_ptr, bool cause_return) { |
duke@435 | 3466 | assert (StubRoutines::forward_exception_entry() != NULL, "must be generated before"); |
duke@435 | 3467 | |
duke@435 | 3468 | // allocate space for the code |
duke@435 | 3469 | ResourceMark rm; |
duke@435 | 3470 | // setup code generation tools |
duke@435 | 3471 | // Measured 8/7/03 at 896 in 32bit debug build (no VerifyThread) |
duke@435 | 3472 | // Measured 8/7/03 at 1080 in 32bit debug build (VerifyThread) |
duke@435 | 3473 | // even larger with TraceJumps |
duke@435 | 3474 | int pad = TraceJumps ? 512 : 0; |
duke@435 | 3475 | CodeBuffer buffer("handler_blob", 1600 + pad, 512); |
duke@435 | 3476 | MacroAssembler* masm = new MacroAssembler(&buffer); |
duke@435 | 3477 | int frame_size_words; |
duke@435 | 3478 | OopMapSet *oop_maps = new OopMapSet(); |
duke@435 | 3479 | OopMap* map = NULL; |
duke@435 | 3480 | |
duke@435 | 3481 | int start = __ offset(); |
duke@435 | 3482 | |
duke@435 | 3483 | // If this causes a return before the processing, then do a "restore" |
duke@435 | 3484 | if (cause_return) { |
duke@435 | 3485 | __ restore(); |
duke@435 | 3486 | } else { |
duke@435 | 3487 | // Make it look like we were called via the poll |
duke@435 | 3488 | // so that frame constructor always sees a valid return address |
duke@435 | 3489 | __ ld_ptr(G2_thread, in_bytes(JavaThread::saved_exception_pc_offset()), O7); |
duke@435 | 3490 | __ sub(O7, frame::pc_return_offset, O7); |
duke@435 | 3491 | } |
duke@435 | 3492 | |
duke@435 | 3493 | map = RegisterSaver::save_live_registers(masm, 0, &frame_size_words); |
duke@435 | 3494 | |
duke@435 | 3495 | // setup last_Java_sp (blows G4) |
duke@435 | 3496 | __ set_last_Java_frame(SP, noreg); |
duke@435 | 3497 | |
duke@435 | 3498 | // call into the runtime to handle illegal instructions exception |
duke@435 | 3499 | // Do not use call_VM_leaf, because we need to make a GC map at this call site. |
duke@435 | 3500 | __ mov(G2_thread, O0); |
duke@435 | 3501 | __ save_thread(L7_thread_cache); |
duke@435 | 3502 | __ call(call_ptr); |
duke@435 | 3503 | __ delayed()->nop(); |
duke@435 | 3504 | |
duke@435 | 3505 | // Set an oopmap for the call site. |
duke@435 | 3506 | // We need this not only for callee-saved registers, but also for volatile |
duke@435 | 3507 | // registers that the compiler might be keeping live across a safepoint. |
duke@435 | 3508 | |
duke@435 | 3509 | oop_maps->add_gc_map( __ offset() - start, map); |
duke@435 | 3510 | |
duke@435 | 3511 | __ restore_thread(L7_thread_cache); |
duke@435 | 3512 | // clear last_Java_sp |
duke@435 | 3513 | __ reset_last_Java_frame(); |
duke@435 | 3514 | |
duke@435 | 3515 | // Check for exceptions |
duke@435 | 3516 | Label pending; |
duke@435 | 3517 | |
duke@435 | 3518 | __ ld_ptr(G2_thread, in_bytes(Thread::pending_exception_offset()), O1); |
kvn@3037 | 3519 | __ br_notnull_short(O1, Assembler::pn, pending); |
duke@435 | 3520 | |
duke@435 | 3521 | RegisterSaver::restore_live_registers(masm); |
duke@435 | 3522 | |
duke@435 | 3523 | // We are back the the original state on entry and ready to go. |
duke@435 | 3524 | |
duke@435 | 3525 | __ retl(); |
duke@435 | 3526 | __ delayed()->nop(); |
duke@435 | 3527 | |
duke@435 | 3528 | // Pending exception after the safepoint |
duke@435 | 3529 | |
duke@435 | 3530 | __ bind(pending); |
duke@435 | 3531 | |
duke@435 | 3532 | RegisterSaver::restore_live_registers(masm); |
duke@435 | 3533 | |
duke@435 | 3534 | // We are back the the original state on entry. |
duke@435 | 3535 | |
duke@435 | 3536 | // Tail-call forward_exception_entry, with the issuing PC in O7, |
duke@435 | 3537 | // so it looks like the original nmethod called forward_exception_entry. |
duke@435 | 3538 | __ set((intptr_t)StubRoutines::forward_exception_entry(), O0); |
duke@435 | 3539 | __ JMP(O0, 0); |
duke@435 | 3540 | __ delayed()->nop(); |
duke@435 | 3541 | |
duke@435 | 3542 | // ------------- |
duke@435 | 3543 | // make sure all code is generated |
duke@435 | 3544 | masm->flush(); |
duke@435 | 3545 | |
duke@435 | 3546 | // return exception blob |
duke@435 | 3547 | return SafepointBlob::create(&buffer, oop_maps, frame_size_words); |
duke@435 | 3548 | } |
duke@435 | 3549 | |
duke@435 | 3550 | // |
duke@435 | 3551 | // generate_resolve_blob - call resolution (static/virtual/opt-virtual/ic-miss |
duke@435 | 3552 | // |
duke@435 | 3553 | // Generate a stub that calls into vm to find out the proper destination |
duke@435 | 3554 | // of a java call. All the argument registers are live at this point |
duke@435 | 3555 | // but since this is generic code we don't know what they are and the caller |
duke@435 | 3556 | // must do any gc of the args. |
duke@435 | 3557 | // |
never@2950 | 3558 | RuntimeStub* SharedRuntime::generate_resolve_blob(address destination, const char* name) { |
duke@435 | 3559 | assert (StubRoutines::forward_exception_entry() != NULL, "must be generated before"); |
duke@435 | 3560 | |
duke@435 | 3561 | // allocate space for the code |
duke@435 | 3562 | ResourceMark rm; |
duke@435 | 3563 | // setup code generation tools |
duke@435 | 3564 | // Measured 8/7/03 at 896 in 32bit debug build (no VerifyThread) |
duke@435 | 3565 | // Measured 8/7/03 at 1080 in 32bit debug build (VerifyThread) |
duke@435 | 3566 | // even larger with TraceJumps |
duke@435 | 3567 | int pad = TraceJumps ? 512 : 0; |
duke@435 | 3568 | CodeBuffer buffer(name, 1600 + pad, 512); |
duke@435 | 3569 | MacroAssembler* masm = new MacroAssembler(&buffer); |
duke@435 | 3570 | int frame_size_words; |
duke@435 | 3571 | OopMapSet *oop_maps = new OopMapSet(); |
duke@435 | 3572 | OopMap* map = NULL; |
duke@435 | 3573 | |
duke@435 | 3574 | int start = __ offset(); |
duke@435 | 3575 | |
duke@435 | 3576 | map = RegisterSaver::save_live_registers(masm, 0, &frame_size_words); |
duke@435 | 3577 | |
duke@435 | 3578 | int frame_complete = __ offset(); |
duke@435 | 3579 | |
duke@435 | 3580 | // setup last_Java_sp (blows G4) |
duke@435 | 3581 | __ set_last_Java_frame(SP, noreg); |
duke@435 | 3582 | |
duke@435 | 3583 | // call into the runtime to handle illegal instructions exception |
duke@435 | 3584 | // Do not use call_VM_leaf, because we need to make a GC map at this call site. |
duke@435 | 3585 | __ mov(G2_thread, O0); |
duke@435 | 3586 | __ save_thread(L7_thread_cache); |
duke@435 | 3587 | __ call(destination, relocInfo::runtime_call_type); |
duke@435 | 3588 | __ delayed()->nop(); |
duke@435 | 3589 | |
duke@435 | 3590 | // O0 contains the address we are going to jump to assuming no exception got installed |
duke@435 | 3591 | |
duke@435 | 3592 | // Set an oopmap for the call site. |
duke@435 | 3593 | // We need this not only for callee-saved registers, but also for volatile |
duke@435 | 3594 | // registers that the compiler might be keeping live across a safepoint. |
duke@435 | 3595 | |
duke@435 | 3596 | oop_maps->add_gc_map( __ offset() - start, map); |
duke@435 | 3597 | |
duke@435 | 3598 | __ restore_thread(L7_thread_cache); |
duke@435 | 3599 | // clear last_Java_sp |
duke@435 | 3600 | __ reset_last_Java_frame(); |
duke@435 | 3601 | |
duke@435 | 3602 | // Check for exceptions |
duke@435 | 3603 | Label pending; |
duke@435 | 3604 | |
duke@435 | 3605 | __ ld_ptr(G2_thread, in_bytes(Thread::pending_exception_offset()), O1); |
kvn@3037 | 3606 | __ br_notnull_short(O1, Assembler::pn, pending); |
duke@435 | 3607 | |
duke@435 | 3608 | // get the returned methodOop |
duke@435 | 3609 | |
duke@435 | 3610 | __ get_vm_result(G5_method); |
duke@435 | 3611 | __ stx(G5_method, SP, RegisterSaver::G5_offset()+STACK_BIAS); |
duke@435 | 3612 | |
duke@435 | 3613 | // O0 is where we want to jump, overwrite G3 which is saved and scratch |
duke@435 | 3614 | |
duke@435 | 3615 | __ stx(O0, SP, RegisterSaver::G3_offset()+STACK_BIAS); |
duke@435 | 3616 | |
duke@435 | 3617 | RegisterSaver::restore_live_registers(masm); |
duke@435 | 3618 | |
duke@435 | 3619 | // We are back the the original state on entry and ready to go. |
duke@435 | 3620 | |
duke@435 | 3621 | __ JMP(G3, 0); |
duke@435 | 3622 | __ delayed()->nop(); |
duke@435 | 3623 | |
duke@435 | 3624 | // Pending exception after the safepoint |
duke@435 | 3625 | |
duke@435 | 3626 | __ bind(pending); |
duke@435 | 3627 | |
duke@435 | 3628 | RegisterSaver::restore_live_registers(masm); |
duke@435 | 3629 | |
duke@435 | 3630 | // We are back the the original state on entry. |
duke@435 | 3631 | |
duke@435 | 3632 | // Tail-call forward_exception_entry, with the issuing PC in O7, |
duke@435 | 3633 | // so it looks like the original nmethod called forward_exception_entry. |
duke@435 | 3634 | __ set((intptr_t)StubRoutines::forward_exception_entry(), O0); |
duke@435 | 3635 | __ JMP(O0, 0); |
duke@435 | 3636 | __ delayed()->nop(); |
duke@435 | 3637 | |
duke@435 | 3638 | // ------------- |
duke@435 | 3639 | // make sure all code is generated |
duke@435 | 3640 | masm->flush(); |
duke@435 | 3641 | |
duke@435 | 3642 | // return the blob |
duke@435 | 3643 | // frame_size_words or bytes?? |
duke@435 | 3644 | return RuntimeStub::new_runtime_stub(name, &buffer, frame_complete, frame_size_words, oop_maps, true); |
duke@435 | 3645 | } |