Fri, 31 Oct 2014 12:16:20 +0100
8062169: Multiple OSR compilations issued for same bci
Summary: Fixed 'SimpleThresholdPolicy::event' to always perform OSR if an OSR nmethod is available.
Reviewed-by: kvn, iveresov
duke@435 | 1 | /* |
trims@2708 | 2 | * Copyright (c) 1997, 2011, Oracle and/or its affiliates. All rights reserved. |
duke@435 | 3 | * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. |
duke@435 | 4 | * |
duke@435 | 5 | * This code is free software; you can redistribute it and/or modify it |
duke@435 | 6 | * under the terms of the GNU General Public License version 2 only, as |
duke@435 | 7 | * published by the Free Software Foundation. |
duke@435 | 8 | * |
duke@435 | 9 | * This code is distributed in the hope that it will be useful, but WITHOUT |
duke@435 | 10 | * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or |
duke@435 | 11 | * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License |
duke@435 | 12 | * version 2 for more details (a copy is included in the LICENSE file that |
duke@435 | 13 | * accompanied this code). |
duke@435 | 14 | * |
duke@435 | 15 | * You should have received a copy of the GNU General Public License version |
duke@435 | 16 | * 2 along with this work; if not, write to the Free Software Foundation, |
duke@435 | 17 | * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA. |
duke@435 | 18 | * |
trims@1907 | 19 | * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA |
trims@1907 | 20 | * or visit www.oracle.com if you need additional information or have any |
trims@1907 | 21 | * questions. |
duke@435 | 22 | * |
duke@435 | 23 | */ |
duke@435 | 24 | |
stefank@2314 | 25 | #ifndef SHARE_VM_RUNTIME_ICACHE_HPP |
stefank@2314 | 26 | #define SHARE_VM_RUNTIME_ICACHE_HPP |
stefank@2314 | 27 | |
stefank@2314 | 28 | #include "memory/allocation.hpp" |
stefank@2314 | 29 | #include "runtime/stubCodeGenerator.hpp" |
stefank@2314 | 30 | |
duke@435 | 31 | // Interface for updating the instruction cache. Whenever the VM modifies |
duke@435 | 32 | // code, part of the processor instruction cache potentially has to be flushed. |
duke@435 | 33 | |
duke@435 | 34 | // Default implementation is in icache.cpp, and can be hidden per-platform. |
duke@435 | 35 | // Most platforms must provide only ICacheStubGenerator::generate_icache_flush(). |
duke@435 | 36 | // Platforms that don't require icache flushing can just nullify the public |
duke@435 | 37 | // members of AbstractICache in their ICache class. AbstractICache should never |
duke@435 | 38 | // be referenced other than by deriving the ICache class from it. |
duke@435 | 39 | // |
duke@435 | 40 | // The code for the ICache class and for generate_icache_flush() must be in |
duke@435 | 41 | // architecture-specific files, i.e., icache_<arch>.hpp/.cpp |
duke@435 | 42 | |
duke@435 | 43 | class AbstractICache : AllStatic { |
duke@435 | 44 | public: |
duke@435 | 45 | // The flush stub signature |
duke@435 | 46 | typedef int (*flush_icache_stub_t)(address addr, int lines, int magic); |
duke@435 | 47 | |
duke@435 | 48 | protected: |
duke@435 | 49 | // The flush stub function address |
duke@435 | 50 | static flush_icache_stub_t _flush_icache_stub; |
duke@435 | 51 | |
duke@435 | 52 | // Call the flush stub |
duke@435 | 53 | static void call_flush_stub(address start, int lines); |
duke@435 | 54 | |
duke@435 | 55 | public: |
duke@435 | 56 | enum { |
duke@435 | 57 | stub_size = 0, // Size of the icache flush stub in bytes |
duke@435 | 58 | line_size = 0, // Icache line size in bytes |
duke@435 | 59 | log2_line_size = 0 // log2(line_size) |
duke@435 | 60 | }; |
duke@435 | 61 | |
duke@435 | 62 | static void initialize(); |
duke@435 | 63 | static void invalidate_word(address addr); |
duke@435 | 64 | static void invalidate_range(address start, int nbytes); |
duke@435 | 65 | }; |
duke@435 | 66 | |
duke@435 | 67 | |
duke@435 | 68 | // Must be included before the definition of ICacheStubGenerator |
duke@435 | 69 | // because ICacheStubGenerator uses ICache definitions. |
duke@435 | 70 | |
stefank@2314 | 71 | #ifdef TARGET_ARCH_x86 |
stefank@2314 | 72 | # include "icache_x86.hpp" |
stefank@2314 | 73 | #endif |
stefank@2314 | 74 | #ifdef TARGET_ARCH_sparc |
stefank@2314 | 75 | # include "icache_sparc.hpp" |
stefank@2314 | 76 | #endif |
stefank@2314 | 77 | #ifdef TARGET_ARCH_zero |
stefank@2314 | 78 | # include "icache_zero.hpp" |
stefank@2314 | 79 | #endif |
bobv@2508 | 80 | #ifdef TARGET_ARCH_arm |
bobv@2508 | 81 | # include "icache_arm.hpp" |
bobv@2508 | 82 | #endif |
bobv@2508 | 83 | #ifdef TARGET_ARCH_ppc |
bobv@2508 | 84 | # include "icache_ppc.hpp" |
bobv@2508 | 85 | #endif |
stefank@2314 | 86 | |
duke@435 | 87 | |
duke@435 | 88 | |
duke@435 | 89 | class ICacheStubGenerator : public StubCodeGenerator { |
duke@435 | 90 | public: |
duke@435 | 91 | ICacheStubGenerator(CodeBuffer *c) : StubCodeGenerator(c) {} |
duke@435 | 92 | |
duke@435 | 93 | // Generate the icache flush stub. |
duke@435 | 94 | // |
duke@435 | 95 | // Since we cannot flush the cache when this stub is generated, |
duke@435 | 96 | // it must be generated first, and just to be sure, we do extra |
duke@435 | 97 | // work to allow a check that these instructions got executed. |
duke@435 | 98 | // |
duke@435 | 99 | // The flush stub has three parameters (see flush_icache_stub_t). |
duke@435 | 100 | // |
duke@435 | 101 | // addr - Start address, must be aligned at log2_line_size |
duke@435 | 102 | // lines - Number of line_size icache lines to flush |
duke@435 | 103 | // magic - Magic number copied to result register to make sure |
duke@435 | 104 | // the stub executed properly |
duke@435 | 105 | // |
duke@435 | 106 | // A template for generate_icache_flush is |
duke@435 | 107 | // |
duke@435 | 108 | // #define __ _masm-> |
duke@435 | 109 | // |
duke@435 | 110 | // void ICacheStubGenerator::generate_icache_flush( |
duke@435 | 111 | // ICache::flush_icache_stub_t* flush_icache_stub |
duke@435 | 112 | // ) { |
duke@435 | 113 | // StubCodeMark mark(this, "ICache", "flush_icache_stub"); |
duke@435 | 114 | // |
duke@435 | 115 | // address start = __ pc(); |
duke@435 | 116 | // |
duke@435 | 117 | // // emit flush stub asm code |
duke@435 | 118 | // |
duke@435 | 119 | // // Must be set here so StubCodeMark destructor can call the flush stub. |
duke@435 | 120 | // *flush_icache_stub = (ICache::flush_icache_stub_t)start; |
duke@435 | 121 | // }; |
duke@435 | 122 | // |
duke@435 | 123 | // #undef __ |
duke@435 | 124 | // |
duke@435 | 125 | // The first use of flush_icache_stub must apply it to itself. The |
duke@435 | 126 | // StubCodeMark destructor in generate_icache_flush will call Assembler::flush, |
duke@435 | 127 | // which in turn will call invalidate_range (see asm/assembler.cpp), which |
duke@435 | 128 | // in turn will call the flush stub *before* generate_icache_flush returns. |
duke@435 | 129 | // The usual method of having generate_icache_flush return the address of the |
duke@435 | 130 | // stub to its caller, which would then, e.g., store that address in |
duke@435 | 131 | // flush_icache_stub, won't work. generate_icache_flush must itself set |
duke@435 | 132 | // flush_icache_stub to the address of the stub it generates before |
duke@435 | 133 | // the StubCodeMark destructor is invoked. |
duke@435 | 134 | |
duke@435 | 135 | void generate_icache_flush(ICache::flush_icache_stub_t* flush_icache_stub); |
duke@435 | 136 | }; |
stefank@2314 | 137 | |
stefank@2314 | 138 | #endif // SHARE_VM_RUNTIME_ICACHE_HPP |