src/share/vm/runtime/icache.hpp

Tue, 08 Aug 2017 15:57:29 +0800

author
aoqi
date
Tue, 08 Aug 2017 15:57:29 +0800
changeset 6876
710a3c8b516e
parent 2708
1d1603768966
parent 1
2d8a650513c2
permissions
-rw-r--r--

merge

aoqi@0 1 /*
aoqi@0 2 * Copyright (c) 1997, 2011, Oracle and/or its affiliates. All rights reserved.
aoqi@0 3 * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
aoqi@0 4 *
aoqi@0 5 * This code is free software; you can redistribute it and/or modify it
aoqi@0 6 * under the terms of the GNU General Public License version 2 only, as
aoqi@0 7 * published by the Free Software Foundation.
aoqi@0 8 *
aoqi@0 9 * This code is distributed in the hope that it will be useful, but WITHOUT
aoqi@0 10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
aoqi@0 11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
aoqi@0 12 * version 2 for more details (a copy is included in the LICENSE file that
aoqi@0 13 * accompanied this code).
aoqi@0 14 *
aoqi@0 15 * You should have received a copy of the GNU General Public License version
aoqi@0 16 * 2 along with this work; if not, write to the Free Software Foundation,
aoqi@0 17 * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
aoqi@0 18 *
aoqi@0 19 * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA
aoqi@0 20 * or visit www.oracle.com if you need additional information or have any
aoqi@0 21 * questions.
aoqi@0 22 *
aoqi@0 23 */
aoqi@0 24
aoqi@1 25 /*
aoqi@1 26 * This file has been modified by Loongson Technology in 2015. These
aoqi@1 27 * modifications are Copyright (c) 2015 Loongson Technology, and are made
aoqi@1 28 * available on the same license terms set forth above.
aoqi@1 29 */
aoqi@1 30
aoqi@0 31 #ifndef SHARE_VM_RUNTIME_ICACHE_HPP
aoqi@0 32 #define SHARE_VM_RUNTIME_ICACHE_HPP
aoqi@0 33
aoqi@0 34 #include "memory/allocation.hpp"
aoqi@0 35 #include "runtime/stubCodeGenerator.hpp"
aoqi@0 36
aoqi@0 37 // Interface for updating the instruction cache. Whenever the VM modifies
aoqi@0 38 // code, part of the processor instruction cache potentially has to be flushed.
aoqi@0 39
aoqi@0 40 // Default implementation is in icache.cpp, and can be hidden per-platform.
aoqi@0 41 // Most platforms must provide only ICacheStubGenerator::generate_icache_flush().
aoqi@0 42 // Platforms that don't require icache flushing can just nullify the public
aoqi@0 43 // members of AbstractICache in their ICache class. AbstractICache should never
aoqi@0 44 // be referenced other than by deriving the ICache class from it.
aoqi@0 45 //
aoqi@0 46 // The code for the ICache class and for generate_icache_flush() must be in
aoqi@0 47 // architecture-specific files, i.e., icache_<arch>.hpp/.cpp
aoqi@0 48
aoqi@0 49 class AbstractICache : AllStatic {
aoqi@0 50 public:
aoqi@0 51 // The flush stub signature
aoqi@0 52 typedef int (*flush_icache_stub_t)(address addr, int lines, int magic);
aoqi@0 53
aoqi@0 54 protected:
aoqi@0 55 // The flush stub function address
aoqi@0 56 static flush_icache_stub_t _flush_icache_stub;
aoqi@0 57
aoqi@0 58 // Call the flush stub
aoqi@0 59 static void call_flush_stub(address start, int lines);
aoqi@0 60
aoqi@0 61 public:
aoqi@0 62 enum {
aoqi@0 63 stub_size = 0, // Size of the icache flush stub in bytes
aoqi@0 64 line_size = 0, // Icache line size in bytes
aoqi@0 65 log2_line_size = 0 // log2(line_size)
aoqi@0 66 };
aoqi@0 67
aoqi@0 68 static void initialize();
aoqi@0 69 static void invalidate_word(address addr);
aoqi@0 70 static void invalidate_range(address start, int nbytes);
aoqi@0 71 };
aoqi@0 72
aoqi@0 73
aoqi@0 74 // Must be included before the definition of ICacheStubGenerator
aoqi@0 75 // because ICacheStubGenerator uses ICache definitions.
aoqi@0 76
aoqi@0 77 #ifdef TARGET_ARCH_x86
aoqi@0 78 # include "icache_x86.hpp"
aoqi@0 79 #endif
aoqi@0 80 #ifdef TARGET_ARCH_sparc
aoqi@0 81 # include "icache_sparc.hpp"
aoqi@0 82 #endif
aoqi@0 83 #ifdef TARGET_ARCH_zero
aoqi@0 84 # include "icache_zero.hpp"
aoqi@0 85 #endif
aoqi@0 86 #ifdef TARGET_ARCH_arm
aoqi@0 87 # include "icache_arm.hpp"
aoqi@0 88 #endif
aoqi@0 89 #ifdef TARGET_ARCH_ppc
aoqi@0 90 # include "icache_ppc.hpp"
aoqi@0 91 #endif
aoqi@1 92 #ifdef TARGET_ARCH_mips
aoqi@1 93 # include "icache_mips.hpp"
aoqi@1 94 #endif
aoqi@0 95
aoqi@0 96
aoqi@0 97 class ICacheStubGenerator : public StubCodeGenerator {
aoqi@0 98 public:
aoqi@0 99 ICacheStubGenerator(CodeBuffer *c) : StubCodeGenerator(c) {}
aoqi@0 100
aoqi@0 101 // Generate the icache flush stub.
aoqi@0 102 //
aoqi@0 103 // Since we cannot flush the cache when this stub is generated,
aoqi@0 104 // it must be generated first, and just to be sure, we do extra
aoqi@0 105 // work to allow a check that these instructions got executed.
aoqi@0 106 //
aoqi@0 107 // The flush stub has three parameters (see flush_icache_stub_t).
aoqi@0 108 //
aoqi@0 109 // addr - Start address, must be aligned at log2_line_size
aoqi@0 110 // lines - Number of line_size icache lines to flush
aoqi@0 111 // magic - Magic number copied to result register to make sure
aoqi@0 112 // the stub executed properly
aoqi@0 113 //
aoqi@0 114 // A template for generate_icache_flush is
aoqi@0 115 //
aoqi@0 116 // #define __ _masm->
aoqi@0 117 //
aoqi@0 118 // void ICacheStubGenerator::generate_icache_flush(
aoqi@0 119 // ICache::flush_icache_stub_t* flush_icache_stub
aoqi@0 120 // ) {
aoqi@0 121 // StubCodeMark mark(this, "ICache", "flush_icache_stub");
aoqi@0 122 //
aoqi@0 123 // address start = __ pc();
aoqi@0 124 //
aoqi@0 125 // // emit flush stub asm code
aoqi@0 126 //
aoqi@0 127 // // Must be set here so StubCodeMark destructor can call the flush stub.
aoqi@0 128 // *flush_icache_stub = (ICache::flush_icache_stub_t)start;
aoqi@0 129 // };
aoqi@0 130 //
aoqi@0 131 // #undef __
aoqi@0 132 //
aoqi@0 133 // The first use of flush_icache_stub must apply it to itself. The
aoqi@0 134 // StubCodeMark destructor in generate_icache_flush will call Assembler::flush,
aoqi@0 135 // which in turn will call invalidate_range (see asm/assembler.cpp), which
aoqi@0 136 // in turn will call the flush stub *before* generate_icache_flush returns.
aoqi@0 137 // The usual method of having generate_icache_flush return the address of the
aoqi@0 138 // stub to its caller, which would then, e.g., store that address in
aoqi@0 139 // flush_icache_stub, won't work. generate_icache_flush must itself set
aoqi@0 140 // flush_icache_stub to the address of the stub it generates before
aoqi@0 141 // the StubCodeMark destructor is invoked.
aoqi@0 142
aoqi@0 143 void generate_icache_flush(ICache::flush_icache_stub_t* flush_icache_stub);
aoqi@0 144 };
aoqi@0 145
aoqi@0 146 #endif // SHARE_VM_RUNTIME_ICACHE_HPP

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