src/cpu/mips/vm/register_mips.cpp

Fri, 29 Apr 2016 00:06:10 +0800

author
aoqi
date
Fri, 29 Apr 2016 00:06:10 +0800
changeset 1
2d8a650513c2
child 6880
52ea28d233d2
permissions
-rw-r--r--

Added MIPS 64-bit port.

aoqi@1 1 /*
aoqi@1 2 * Copyright (c) 2000, 2012, Oracle and/or its affiliates. All rights reserved.
aoqi@1 3 * Copyright (c) 2015, 2016, Loongson Technology. All rights reserved.
aoqi@1 4 * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
aoqi@1 5 *
aoqi@1 6 * This code is free software; you can redistribute it and/or modify it
aoqi@1 7 * under the terms of the GNU General Public License version 2 only, as
aoqi@1 8 * published by the Free Software Foundation.
aoqi@1 9 *
aoqi@1 10 * This code is distributed in the hope that it will be useful, but WITHOUT
aoqi@1 11 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
aoqi@1 12 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
aoqi@1 13 * version 2 for more details (a copy is included in the LICENSE file that
aoqi@1 14 * accompanied this code).
aoqi@1 15 *
aoqi@1 16 * You should have received a copy of the GNU General Public License version
aoqi@1 17 * 2 along with this work; if not, write to the Free Software Foundation,
aoqi@1 18 * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
aoqi@1 19 *
aoqi@1 20 * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA
aoqi@1 21 * or visit www.oracle.com if you need additional information or have any
aoqi@1 22 * questions.
aoqi@1 23 *
aoqi@1 24 */
aoqi@1 25
aoqi@1 26 #include "precompiled.hpp"
aoqi@1 27 #include "register_mips.hpp"
aoqi@1 28
aoqi@1 29 #ifdef _LP64
aoqi@1 30 const int ConcreteRegisterImpl::max_gpr = RegisterImpl::number_of_registers << 1;
aoqi@1 31 const int ConcreteRegisterImpl::max_fpr = ConcreteRegisterImpl::max_gpr +
aoqi@1 32 2 * FloatRegisterImpl::number_of_registers;
aoqi@1 33 #else
aoqi@1 34 const int ConcreteRegisterImpl::max_gpr = RegisterImpl::number_of_registers;
aoqi@1 35 const int ConcreteRegisterImpl::max_fpr = ConcreteRegisterImpl::max_gpr +
aoqi@1 36 FloatRegisterImpl::number_of_registers;
aoqi@1 37 #endif // _LP64
aoqi@1 38
aoqi@1 39
aoqi@1 40 const char* RegisterImpl::name() const {
aoqi@1 41 const char* names[number_of_registers] = {
aoqi@1 42 "zero", "at", "v0", "v1", "a0", "a1", "a2", "a3",
aoqi@1 43 #ifdef _LP64
aoqi@1 44 "a4", "a5", "a6", "a7", "t0", "t1", "t2", "t3",
aoqi@1 45 #else
aoqi@1 46 "t0", "t1", "t2", "t3", "t4", "t5", "t6", "t7",
aoqi@1 47 #endif
aoqi@1 48 "s0", "s1", "s2", "s3", "s4", "s5", "s6", "s7",
aoqi@1 49 "t8", "t9", "k0", "k1", "gp", "sp", "fp", "ra"
aoqi@1 50 };
aoqi@1 51 return is_valid() ? names[encoding()] : "noreg";
aoqi@1 52 }
aoqi@1 53
aoqi@1 54 const char* FloatRegisterImpl::name() const {
aoqi@1 55 const char* names[number_of_registers] = {
aoqi@1 56 "f0", "f1", "f2", "f3", "f4", "f5", "f6", "f7",
aoqi@1 57 "f8", "f9", "f10", "f11", "f12", "f13", "f14", "f15",
aoqi@1 58 "f16", "f17", "f18", "f19", "f20", "f21", "f22", "f23",
aoqi@1 59 "f24", "f25", "f26", "f27", "f28", "f29", "f30", "f31",
aoqi@1 60 };
aoqi@1 61 return is_valid() ? names[encoding()] : "fnoreg";
aoqi@1 62 }
aoqi@1 63

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