src/cpu/x86/vm/methodHandles_x86.cpp

Mon, 14 Feb 2011 03:21:18 -0800

author
twisti
date
Mon, 14 Feb 2011 03:21:18 -0800
changeset 2565
28bf941f445e
parent 2436
d810e9a3fc33
child 2603
1b4e6a5d98e0
permissions
-rw-r--r--

7018378: JSR 292: _bound_int_mh produces wrong result on 64-bit SPARC
Reviewed-by: kvn

jrose@1145 1 /*
twisti@2436 2 * Copyright (c) 1997, 2011, Oracle and/or its affiliates. All rights reserved.
jrose@1145 3 * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
jrose@1145 4 *
jrose@1145 5 * This code is free software; you can redistribute it and/or modify it
jrose@1145 6 * under the terms of the GNU General Public License version 2 only, as
jrose@1145 7 * published by the Free Software Foundation.
jrose@1145 8 *
jrose@1145 9 * This code is distributed in the hope that it will be useful, but WITHOUT
jrose@1145 10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
jrose@1145 11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
jrose@1145 12 * version 2 for more details (a copy is included in the LICENSE file that
jrose@1145 13 * accompanied this code).
jrose@1145 14 *
jrose@1145 15 * You should have received a copy of the GNU General Public License version
jrose@1145 16 * 2 along with this work; if not, write to the Free Software Foundation,
jrose@1145 17 * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
jrose@1145 18 *
trims@1907 19 * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA
trims@1907 20 * or visit www.oracle.com if you need additional information or have any
trims@1907 21 * questions.
jrose@1145 22 *
jrose@1145 23 */
jrose@1145 24
stefank@2314 25 #include "precompiled.hpp"
stefank@2314 26 #include "interpreter/interpreter.hpp"
stefank@2314 27 #include "memory/allocation.inline.hpp"
stefank@2314 28 #include "prims/methodHandles.hpp"
jrose@1145 29
jrose@1145 30 #define __ _masm->
jrose@1145 31
jrose@2148 32 #ifdef PRODUCT
jrose@2148 33 #define BLOCK_COMMENT(str) /* nothing */
jrose@2148 34 #else
jrose@2148 35 #define BLOCK_COMMENT(str) __ block_comment(str)
jrose@2148 36 #endif
jrose@2148 37
jrose@2148 38 #define BIND(label) bind(label); BLOCK_COMMENT(#label ":")
jrose@2148 39
jrose@1145 40 address MethodHandleEntry::start_compiled_entry(MacroAssembler* _masm,
jrose@1145 41 address interpreted_entry) {
jrose@1145 42 // Just before the actual machine code entry point, allocate space
jrose@1145 43 // for a MethodHandleEntry::Data record, so that we can manage everything
jrose@1145 44 // from one base pointer.
jrose@1145 45 __ align(wordSize);
jrose@1145 46 address target = __ pc() + sizeof(Data);
jrose@1145 47 while (__ pc() < target) {
jrose@1145 48 __ nop();
jrose@1145 49 __ align(wordSize);
jrose@1145 50 }
jrose@1145 51
jrose@1145 52 MethodHandleEntry* me = (MethodHandleEntry*) __ pc();
jrose@1145 53 me->set_end_address(__ pc()); // set a temporary end_address
jrose@1145 54 me->set_from_interpreted_entry(interpreted_entry);
jrose@1145 55 me->set_type_checking_entry(NULL);
jrose@1145 56
jrose@1145 57 return (address) me;
jrose@1145 58 }
jrose@1145 59
jrose@1145 60 MethodHandleEntry* MethodHandleEntry::finish_compiled_entry(MacroAssembler* _masm,
jrose@1145 61 address start_addr) {
jrose@1145 62 MethodHandleEntry* me = (MethodHandleEntry*) start_addr;
jrose@1145 63 assert(me->end_address() == start_addr, "valid ME");
jrose@1145 64
jrose@1145 65 // Fill in the real end_address:
jrose@1145 66 __ align(wordSize);
jrose@1145 67 me->set_end_address(__ pc());
jrose@1145 68
jrose@1145 69 return me;
jrose@1145 70 }
jrose@1145 71
jrose@1145 72 #ifdef ASSERT
twisti@1739 73 static void verify_argslot(MacroAssembler* _masm, Register argslot_reg,
jrose@1145 74 const char* error_message) {
jrose@1145 75 // Verify that argslot lies within (rsp, rbp].
jrose@1145 76 Label L_ok, L_bad;
jrose@2148 77 BLOCK_COMMENT("{ verify_argslot");
twisti@1739 78 __ cmpptr(argslot_reg, rbp);
twisti@1570 79 __ jccb(Assembler::above, L_bad);
twisti@1739 80 __ cmpptr(rsp, argslot_reg);
twisti@1570 81 __ jccb(Assembler::below, L_ok);
jrose@1145 82 __ bind(L_bad);
jrose@1145 83 __ stop(error_message);
jrose@1145 84 __ bind(L_ok);
jrose@2148 85 BLOCK_COMMENT("} verify_argslot");
jrose@1145 86 }
jrose@1145 87 #endif
jrose@1145 88
jrose@1145 89
jrose@1145 90 // Code generation
jrose@1145 91 address MethodHandles::generate_method_handle_interpreter_entry(MacroAssembler* _masm) {
jrose@1145 92 // rbx: methodOop
jrose@1145 93 // rcx: receiver method handle (must load from sp[MethodTypeForm.vmslots])
jrose@1145 94 // rsi/r13: sender SP (must preserve; see prepare_to_jump_from_interpreted)
jrose@2148 95 // rdx, rdi: garbage temp, blown away
jrose@1145 96
jrose@1145 97 Register rbx_method = rbx;
jrose@1145 98 Register rcx_recv = rcx;
jrose@1145 99 Register rax_mtype = rax;
jrose@1145 100 Register rdx_temp = rdx;
jrose@2148 101 Register rdi_temp = rdi;
jrose@1145 102
jrose@1145 103 // emit WrongMethodType path first, to enable jccb back-branch from main path
jrose@1145 104 Label wrong_method_type;
jrose@1145 105 __ bind(wrong_method_type);
jrose@2148 106 Label invoke_generic_slow_path;
jrose@2148 107 assert(methodOopDesc::intrinsic_id_size_in_bytes() == sizeof(u1), "");;
jrose@2148 108 __ cmpb(Address(rbx_method, methodOopDesc::intrinsic_id_offset_in_bytes()), (int) vmIntrinsics::_invokeExact);
jrose@2148 109 __ jcc(Assembler::notEqual, invoke_generic_slow_path);
jrose@1145 110 __ push(rax_mtype); // required mtype
jrose@1145 111 __ push(rcx_recv); // bad mh (1st stacked argument)
jrose@1145 112 __ jump(ExternalAddress(Interpreter::throw_WrongMethodType_entry()));
jrose@1145 113
jrose@1145 114 // here's where control starts out:
jrose@1145 115 __ align(CodeEntryAlignment);
jrose@1145 116 address entry_point = __ pc();
jrose@1145 117
jrose@1145 118 // fetch the MethodType from the method handle into rax (the 'check' register)
jrose@1145 119 {
jrose@1145 120 Register tem = rbx_method;
jrose@1145 121 for (jint* pchase = methodOopDesc::method_type_offsets_chain(); (*pchase) != -1; pchase++) {
jrose@1145 122 __ movptr(rax_mtype, Address(tem, *pchase));
jrose@1145 123 tem = rax_mtype; // in case there is another indirection
jrose@1145 124 }
jrose@1145 125 }
jrose@1145 126
jrose@1145 127 // given the MethodType, find out where the MH argument is buried
twisti@2201 128 __ load_heap_oop(rdx_temp, Address(rax_mtype, __ delayed_value(java_dyn_MethodType::form_offset_in_bytes, rdi_temp)));
jrose@2148 129 Register rdx_vmslots = rdx_temp;
twisti@2201 130 __ movl(rdx_vmslots, Address(rdx_temp, __ delayed_value(java_dyn_MethodTypeForm::vmslots_offset_in_bytes, rdi_temp)));
jrose@2148 131 __ movptr(rcx_recv, __ argument_address(rdx_vmslots));
jrose@1145 132
jrose@2148 133 trace_method_handle(_masm, "invokeExact");
jrose@2148 134
jrose@2148 135 __ check_method_handle_type(rax_mtype, rcx_recv, rdi_temp, wrong_method_type);
jrose@2148 136 __ jump_to_method_handle_entry(rcx_recv, rdi_temp);
jrose@2148 137
jrose@2148 138 // for invokeGeneric (only), apply argument and result conversions on the fly
jrose@2148 139 __ bind(invoke_generic_slow_path);
jrose@2148 140 #ifdef ASSERT
jrose@2148 141 { Label L;
jrose@2148 142 __ cmpb(Address(rbx_method, methodOopDesc::intrinsic_id_offset_in_bytes()), (int) vmIntrinsics::_invokeGeneric);
jrose@2148 143 __ jcc(Assembler::equal, L);
jrose@2148 144 __ stop("bad methodOop::intrinsic_id");
jrose@2148 145 __ bind(L);
jrose@2148 146 }
jrose@2148 147 #endif //ASSERT
jrose@2148 148 Register rbx_temp = rbx_method; // don't need it now
jrose@2148 149
jrose@2148 150 // make room on the stack for another pointer:
jrose@2148 151 Register rcx_argslot = rcx_recv;
jrose@2148 152 __ lea(rcx_argslot, __ argument_address(rdx_vmslots, 1));
jrose@2148 153 insert_arg_slots(_masm, 2 * stack_move_unit(), _INSERT_REF_MASK,
jrose@2148 154 rcx_argslot, rbx_temp, rdx_temp);
jrose@2148 155
jrose@2148 156 // load up an adapter from the calling type (Java weaves this)
twisti@2201 157 __ load_heap_oop(rdx_temp, Address(rax_mtype, __ delayed_value(java_dyn_MethodType::form_offset_in_bytes, rdi_temp)));
jrose@2148 158 Register rdx_adapter = rdx_temp;
twisti@2201 159 // __ load_heap_oop(rdx_adapter, Address(rdx_temp, java_dyn_MethodTypeForm::genericInvoker_offset_in_bytes()));
jrose@2148 160 // deal with old JDK versions:
twisti@2201 161 __ lea(rdi_temp, Address(rdx_temp, __ delayed_value(java_dyn_MethodTypeForm::genericInvoker_offset_in_bytes, rdi_temp)));
jrose@2148 162 __ cmpptr(rdi_temp, rdx_temp);
jrose@2148 163 Label sorry_no_invoke_generic;
twisti@2201 164 __ jcc(Assembler::below, sorry_no_invoke_generic);
jrose@2148 165
twisti@2201 166 __ load_heap_oop(rdx_adapter, Address(rdi_temp, 0));
jrose@2148 167 __ testptr(rdx_adapter, rdx_adapter);
twisti@2201 168 __ jcc(Assembler::zero, sorry_no_invoke_generic);
jrose@2148 169 __ movptr(Address(rcx_argslot, 1 * Interpreter::stackElementSize), rdx_adapter);
jrose@2148 170 // As a trusted first argument, pass the type being called, so the adapter knows
jrose@2148 171 // the actual types of the arguments and return values.
jrose@2148 172 // (Generic invokers are shared among form-families of method-type.)
jrose@2148 173 __ movptr(Address(rcx_argslot, 0 * Interpreter::stackElementSize), rax_mtype);
jrose@2148 174 // FIXME: assert that rdx_adapter is of the right method-type.
jrose@2148 175 __ mov(rcx, rdx_adapter);
jrose@2148 176 trace_method_handle(_masm, "invokeGeneric");
jrose@2148 177 __ jump_to_method_handle_entry(rcx, rdi_temp);
jrose@2148 178
jrose@2148 179 __ bind(sorry_no_invoke_generic); // no invokeGeneric implementation available!
jrose@2148 180 __ movptr(rcx_recv, Address(rcx_argslot, -1 * Interpreter::stackElementSize)); // recover original MH
jrose@2148 181 __ push(rax_mtype); // required mtype
jrose@2148 182 __ push(rcx_recv); // bad mh (1st stacked argument)
jrose@2148 183 __ jump(ExternalAddress(Interpreter::throw_WrongMethodType_entry()));
jrose@1145 184
jrose@1145 185 return entry_point;
jrose@1145 186 }
jrose@1145 187
jrose@1145 188 // Helper to insert argument slots into the stack.
jrose@1145 189 // arg_slots must be a multiple of stack_move_unit() and <= 0
jrose@1145 190 void MethodHandles::insert_arg_slots(MacroAssembler* _masm,
jrose@1145 191 RegisterOrConstant arg_slots,
jrose@1145 192 int arg_mask,
jrose@1145 193 Register rax_argslot,
twisti@1858 194 Register rbx_temp, Register rdx_temp, Register temp3_reg) {
twisti@1858 195 assert(temp3_reg == noreg, "temp3 not required");
jrose@1145 196 assert_different_registers(rax_argslot, rbx_temp, rdx_temp,
jrose@1145 197 (!arg_slots.is_register() ? rsp : arg_slots.as_register()));
jrose@1145 198
jrose@1145 199 #ifdef ASSERT
jrose@1145 200 verify_argslot(_masm, rax_argslot, "insertion point must fall within current frame");
jrose@1145 201 if (arg_slots.is_register()) {
jrose@1145 202 Label L_ok, L_bad;
jrose@1145 203 __ cmpptr(arg_slots.as_register(), (int32_t) NULL_WORD);
twisti@1570 204 __ jccb(Assembler::greater, L_bad);
jrose@1145 205 __ testl(arg_slots.as_register(), -stack_move_unit() - 1);
twisti@1570 206 __ jccb(Assembler::zero, L_ok);
jrose@1145 207 __ bind(L_bad);
jrose@1145 208 __ stop("assert arg_slots <= 0 and clear low bits");
jrose@1145 209 __ bind(L_ok);
jrose@1145 210 } else {
jrose@1145 211 assert(arg_slots.as_constant() <= 0, "");
jrose@1145 212 assert(arg_slots.as_constant() % -stack_move_unit() == 0, "");
jrose@1145 213 }
jrose@1145 214 #endif //ASSERT
jrose@1145 215
jrose@1145 216 #ifdef _LP64
jrose@1145 217 if (arg_slots.is_register()) {
jrose@1145 218 // clean high bits of stack motion register (was loaded as an int)
jrose@1145 219 __ movslq(arg_slots.as_register(), arg_slots.as_register());
jrose@1145 220 }
jrose@1145 221 #endif
jrose@1145 222
jrose@1145 223 // Make space on the stack for the inserted argument(s).
jrose@1145 224 // Then pull down everything shallower than rax_argslot.
jrose@1145 225 // The stacked return address gets pulled down with everything else.
jrose@1145 226 // That is, copy [rsp, argslot) downward by -size words. In pseudo-code:
jrose@1145 227 // rsp -= size;
jrose@1145 228 // for (rdx = rsp + size; rdx < argslot; rdx++)
jrose@1145 229 // rdx[-size] = rdx[0]
jrose@1145 230 // argslot -= size;
jrose@2148 231 BLOCK_COMMENT("insert_arg_slots {");
jrose@1145 232 __ mov(rdx_temp, rsp); // source pointer for copy
jrose@1145 233 __ lea(rsp, Address(rsp, arg_slots, Address::times_ptr));
jrose@1145 234 {
jrose@1145 235 Label loop;
jrose@2148 236 __ BIND(loop);
jrose@1145 237 // pull one word down each time through the loop
jrose@1145 238 __ movptr(rbx_temp, Address(rdx_temp, 0));
jrose@1145 239 __ movptr(Address(rdx_temp, arg_slots, Address::times_ptr), rbx_temp);
jrose@1145 240 __ addptr(rdx_temp, wordSize);
jrose@1145 241 __ cmpptr(rdx_temp, rax_argslot);
twisti@1570 242 __ jccb(Assembler::less, loop);
jrose@1145 243 }
jrose@1145 244
jrose@1145 245 // Now move the argslot down, to point to the opened-up space.
jrose@1145 246 __ lea(rax_argslot, Address(rax_argslot, arg_slots, Address::times_ptr));
jrose@2148 247 BLOCK_COMMENT("} insert_arg_slots");
jrose@1145 248 }
jrose@1145 249
jrose@1145 250 // Helper to remove argument slots from the stack.
jrose@1145 251 // arg_slots must be a multiple of stack_move_unit() and >= 0
jrose@1145 252 void MethodHandles::remove_arg_slots(MacroAssembler* _masm,
jrose@1145 253 RegisterOrConstant arg_slots,
jrose@1145 254 Register rax_argslot,
twisti@1858 255 Register rbx_temp, Register rdx_temp, Register temp3_reg) {
twisti@1858 256 assert(temp3_reg == noreg, "temp3 not required");
jrose@1145 257 assert_different_registers(rax_argslot, rbx_temp, rdx_temp,
jrose@1145 258 (!arg_slots.is_register() ? rsp : arg_slots.as_register()));
jrose@1145 259
jrose@1145 260 #ifdef ASSERT
twisti@1739 261 // Verify that [argslot..argslot+size) lies within (rsp, rbp).
twisti@1739 262 __ lea(rbx_temp, Address(rax_argslot, arg_slots, Address::times_ptr));
twisti@1739 263 verify_argslot(_masm, rbx_temp, "deleted argument(s) must fall within current frame");
jrose@1145 264 if (arg_slots.is_register()) {
jrose@1145 265 Label L_ok, L_bad;
jrose@1145 266 __ cmpptr(arg_slots.as_register(), (int32_t) NULL_WORD);
twisti@1570 267 __ jccb(Assembler::less, L_bad);
jrose@1145 268 __ testl(arg_slots.as_register(), -stack_move_unit() - 1);
twisti@1570 269 __ jccb(Assembler::zero, L_ok);
jrose@1145 270 __ bind(L_bad);
jrose@1145 271 __ stop("assert arg_slots >= 0 and clear low bits");
jrose@1145 272 __ bind(L_ok);
jrose@1145 273 } else {
jrose@1145 274 assert(arg_slots.as_constant() >= 0, "");
jrose@1145 275 assert(arg_slots.as_constant() % -stack_move_unit() == 0, "");
jrose@1145 276 }
jrose@1145 277 #endif //ASSERT
jrose@1145 278
jrose@1145 279 #ifdef _LP64
jrose@1145 280 if (false) { // not needed, since register is positive
jrose@1145 281 // clean high bits of stack motion register (was loaded as an int)
jrose@1145 282 if (arg_slots.is_register())
jrose@1145 283 __ movslq(arg_slots.as_register(), arg_slots.as_register());
jrose@1145 284 }
jrose@1145 285 #endif
jrose@1145 286
jrose@2148 287 BLOCK_COMMENT("remove_arg_slots {");
jrose@1145 288 // Pull up everything shallower than rax_argslot.
jrose@1145 289 // Then remove the excess space on the stack.
jrose@1145 290 // The stacked return address gets pulled up with everything else.
jrose@1145 291 // That is, copy [rsp, argslot) upward by size words. In pseudo-code:
jrose@1145 292 // for (rdx = argslot-1; rdx >= rsp; --rdx)
jrose@1145 293 // rdx[size] = rdx[0]
jrose@1145 294 // argslot += size;
jrose@1145 295 // rsp += size;
jrose@1145 296 __ lea(rdx_temp, Address(rax_argslot, -wordSize)); // source pointer for copy
jrose@1145 297 {
jrose@1145 298 Label loop;
jrose@2148 299 __ BIND(loop);
jrose@1145 300 // pull one word up each time through the loop
jrose@1145 301 __ movptr(rbx_temp, Address(rdx_temp, 0));
jrose@1145 302 __ movptr(Address(rdx_temp, arg_slots, Address::times_ptr), rbx_temp);
jrose@1145 303 __ addptr(rdx_temp, -wordSize);
jrose@1145 304 __ cmpptr(rdx_temp, rsp);
twisti@1570 305 __ jccb(Assembler::greaterEqual, loop);
jrose@1145 306 }
jrose@1145 307
jrose@1145 308 // Now move the argslot up, to point to the just-copied block.
jrose@1145 309 __ lea(rsp, Address(rsp, arg_slots, Address::times_ptr));
jrose@1145 310 // And adjust the argslot address to point at the deletion point.
jrose@1145 311 __ lea(rax_argslot, Address(rax_argslot, arg_slots, Address::times_ptr));
jrose@2148 312 BLOCK_COMMENT("} remove_arg_slots");
jrose@1145 313 }
jrose@1145 314
jrose@1145 315 #ifndef PRODUCT
twisti@1568 316 extern "C" void print_method_handle(oop mh);
jrose@1145 317 void trace_method_handle_stub(const char* adaptername,
twisti@1568 318 oop mh,
jrose@2148 319 intptr_t* saved_regs,
jrose@1145 320 intptr_t* entry_sp,
jrose@1474 321 intptr_t* saved_sp,
jrose@1474 322 intptr_t* saved_bp) {
jrose@1145 323 // called as a leaf from native code: do not block the JVM!
jrose@1474 324 intptr_t* last_sp = (intptr_t*) saved_bp[frame::interpreter_frame_last_sp_offset];
jrose@1474 325 intptr_t* base_sp = (intptr_t*) saved_bp[frame::interpreter_frame_monitor_block_top_offset];
jrose@1474 326 printf("MH %s mh="INTPTR_FORMAT" sp=("INTPTR_FORMAT"+"INTX_FORMAT") stack_size="INTX_FORMAT" bp="INTPTR_FORMAT"\n",
jrose@1474 327 adaptername, (intptr_t)mh, (intptr_t)entry_sp, (intptr_t)(saved_sp - entry_sp), (intptr_t)(base_sp - last_sp), (intptr_t)saved_bp);
jrose@2148 328 if (last_sp != saved_sp && last_sp != NULL)
jrose@1474 329 printf("*** last_sp="INTPTR_FORMAT"\n", (intptr_t)last_sp);
jrose@2148 330 if (Verbose) {
jrose@2148 331 printf(" reg dump: ");
jrose@2148 332 int saved_regs_count = (entry_sp-1) - saved_regs;
jrose@2148 333 // 32 bit: rdi rsi rbp rsp; rbx rdx rcx (*) rax
jrose@2148 334 int i;
jrose@2148 335 for (i = 0; i <= saved_regs_count; i++) {
jrose@2148 336 if (i > 0 && i % 4 == 0 && i != saved_regs_count)
jrose@2148 337 printf("\n + dump: ");
jrose@2148 338 printf(" %d: "INTPTR_FORMAT, i, saved_regs[i]);
jrose@2148 339 }
jrose@2148 340 printf("\n");
jrose@2148 341 int stack_dump_count = 16;
jrose@2148 342 if (stack_dump_count < (int)(saved_bp + 2 - saved_sp))
jrose@2148 343 stack_dump_count = (int)(saved_bp + 2 - saved_sp);
jrose@2148 344 if (stack_dump_count > 64) stack_dump_count = 48;
jrose@2148 345 for (i = 0; i < stack_dump_count; i += 4) {
jrose@2148 346 printf(" dump at SP[%d] "INTPTR_FORMAT": "INTPTR_FORMAT" "INTPTR_FORMAT" "INTPTR_FORMAT" "INTPTR_FORMAT"\n",
twisti@2173 347 i, (intptr_t) &entry_sp[i+0], entry_sp[i+0], entry_sp[i+1], entry_sp[i+2], entry_sp[i+3]);
jrose@2148 348 }
jrose@2148 349 print_method_handle(mh);
jrose@2148 350 }
jrose@2148 351 }
jrose@2148 352 void MethodHandles::trace_method_handle(MacroAssembler* _masm, const char* adaptername) {
jrose@2148 353 if (!TraceMethodHandles) return;
jrose@2148 354 BLOCK_COMMENT("trace_method_handle {");
jrose@2148 355 __ push(rax);
jrose@2148 356 __ lea(rax, Address(rsp, wordSize*6)); // entry_sp
jrose@2148 357 __ pusha();
jrose@2148 358 // arguments:
jrose@2148 359 __ push(rbp); // interpreter frame pointer
jrose@2148 360 __ push(rsi); // saved_sp
jrose@2148 361 __ push(rax); // entry_sp
jrose@2148 362 __ push(rcx); // mh
jrose@2148 363 __ push(rcx);
jrose@2148 364 __ movptr(Address(rsp, 0), (intptr_t) adaptername);
jrose@2148 365 __ call_VM_leaf(CAST_FROM_FN_PTR(address, trace_method_handle_stub), 5);
jrose@2148 366 __ popa();
jrose@2148 367 __ pop(rax);
jrose@2148 368 BLOCK_COMMENT("} trace_method_handle");
jrose@1145 369 }
jrose@1145 370 #endif //PRODUCT
jrose@1145 371
jrose@1862 372 // which conversion op types are implemented here?
jrose@1862 373 int MethodHandles::adapter_conversion_ops_supported_mask() {
jrose@1862 374 return ((1<<sun_dyn_AdapterMethodHandle::OP_RETYPE_ONLY)
jrose@1862 375 |(1<<sun_dyn_AdapterMethodHandle::OP_RETYPE_RAW)
jrose@1862 376 |(1<<sun_dyn_AdapterMethodHandle::OP_CHECK_CAST)
jrose@1862 377 |(1<<sun_dyn_AdapterMethodHandle::OP_PRIM_TO_PRIM)
jrose@1862 378 |(1<<sun_dyn_AdapterMethodHandle::OP_REF_TO_PRIM)
jrose@1862 379 |(1<<sun_dyn_AdapterMethodHandle::OP_SWAP_ARGS)
jrose@1862 380 |(1<<sun_dyn_AdapterMethodHandle::OP_ROT_ARGS)
jrose@1862 381 |(1<<sun_dyn_AdapterMethodHandle::OP_DUP_ARGS)
jrose@1862 382 |(1<<sun_dyn_AdapterMethodHandle::OP_DROP_ARGS)
jrose@1862 383 //|(1<<sun_dyn_AdapterMethodHandle::OP_SPREAD_ARGS) //BUG!
jrose@1862 384 );
jrose@1862 385 // FIXME: MethodHandlesTest gets a crash if we enable OP_SPREAD_ARGS.
jrose@1862 386 }
jrose@1862 387
twisti@2411 388 //------------------------------------------------------------------------------
twisti@2411 389 // MethodHandles::generate_method_handle_stub
twisti@2411 390 //
jrose@1145 391 // Generate an "entry" field for a method handle.
jrose@1145 392 // This determines how the method handle will respond to calls.
twisti@2436 393 void MethodHandles::generate_method_handle_stub(MacroAssembler* _masm, MethodHandles::EntryKind ek) {
jrose@1145 394 // Here is the register state during an interpreted call,
jrose@1145 395 // as set up by generate_method_handle_interpreter_entry():
jrose@1145 396 // - rbx: garbage temp (was MethodHandle.invoke methodOop, unused)
jrose@1145 397 // - rcx: receiver method handle
jrose@1145 398 // - rax: method handle type (only used by the check_mtype entry point)
jrose@1145 399 // - rsi/r13: sender SP (must preserve; see prepare_to_jump_from_interpreted)
jrose@1145 400 // - rdx: garbage temp, can blow away
jrose@1145 401
twisti@2411 402 const Register rcx_recv = rcx;
twisti@2411 403 const Register rax_argslot = rax;
twisti@2411 404 const Register rbx_temp = rbx;
twisti@2411 405 const Register rdx_temp = rdx;
jrose@1145 406
jrose@1474 407 // This guy is set up by prepare_to_jump_from_interpreted (from interpreted calls)
jrose@1474 408 // and gen_c2i_adapter (from compiled calls):
twisti@2411 409 const Register saved_last_sp = LP64_ONLY(r13) NOT_LP64(rsi);
twisti@2411 410
twisti@2411 411 // Argument registers for _raise_exception.
twisti@2411 412 // 32-bit: Pass first two oop/int args in registers ECX and EDX.
twisti@2411 413 const Register rarg0_code = LP64_ONLY(j_rarg0) NOT_LP64(rcx);
twisti@2411 414 const Register rarg1_actual = LP64_ONLY(j_rarg1) NOT_LP64(rdx);
twisti@2411 415 const Register rarg2_required = LP64_ONLY(j_rarg2) NOT_LP64(rdi);
twisti@2411 416 assert_different_registers(rarg0_code, rarg1_actual, rarg2_required, saved_last_sp);
jrose@1474 417
jrose@1145 418 guarantee(java_dyn_MethodHandle::vmentry_offset_in_bytes() != 0, "must have offsets");
jrose@1145 419
jrose@1145 420 // some handy addresses
jrose@1145 421 Address rbx_method_fie( rbx, methodOopDesc::from_interpreted_offset() );
jrose@1145 422
jrose@1145 423 Address rcx_mh_vmtarget( rcx_recv, java_dyn_MethodHandle::vmtarget_offset_in_bytes() );
jrose@1145 424 Address rcx_dmh_vmindex( rcx_recv, sun_dyn_DirectMethodHandle::vmindex_offset_in_bytes() );
jrose@1145 425
jrose@1145 426 Address rcx_bmh_vmargslot( rcx_recv, sun_dyn_BoundMethodHandle::vmargslot_offset_in_bytes() );
jrose@1145 427 Address rcx_bmh_argument( rcx_recv, sun_dyn_BoundMethodHandle::argument_offset_in_bytes() );
jrose@1145 428
jrose@1145 429 Address rcx_amh_vmargslot( rcx_recv, sun_dyn_AdapterMethodHandle::vmargslot_offset_in_bytes() );
jrose@1145 430 Address rcx_amh_argument( rcx_recv, sun_dyn_AdapterMethodHandle::argument_offset_in_bytes() );
jrose@1145 431 Address rcx_amh_conversion( rcx_recv, sun_dyn_AdapterMethodHandle::conversion_offset_in_bytes() );
jrose@1145 432 Address vmarg; // __ argument_address(vmargslot)
jrose@1145 433
jrose@1474 434 const int java_mirror_offset = klassOopDesc::klass_part_offset_in_bytes() + Klass::java_mirror_offset_in_bytes();
jrose@1474 435
jrose@1145 436 if (have_entry(ek)) {
jrose@1145 437 __ nop(); // empty stubs make SG sick
jrose@1145 438 return;
jrose@1145 439 }
jrose@1145 440
jrose@1145 441 address interp_entry = __ pc();
jrose@1145 442
jrose@2148 443 trace_method_handle(_masm, entry_name(ek));
jrose@2148 444
jrose@2148 445 BLOCK_COMMENT(entry_name(ek));
jrose@1145 446
jrose@1145 447 switch ((int) ek) {
jrose@1474 448 case _raise_exception:
jrose@1145 449 {
twisti@2411 450 // Not a real MH entry, but rather shared code for raising an
twisti@2411 451 // exception. Since we use a C2I adapter to set up the
twisti@2411 452 // interpreter state, arguments are expected in compiler
twisti@2411 453 // argument registers.
twisti@2436 454 assert(raise_exception_method(), "must be set");
twisti@2436 455 address c2i_entry = raise_exception_method()->get_c2i_entry();
twisti@2436 456 assert(c2i_entry, "method must be linked");
jrose@1145 457
twisti@2411 458 const Register rdi_pc = rax;
twisti@2411 459 __ pop(rdi_pc); // caller PC
twisti@2411 460 __ mov(rsp, saved_last_sp); // cut the stack back to where the caller started
jrose@1145 461
jrose@1474 462 Register rbx_method = rbx_temp;
twisti@2411 463 Label L_no_method;
jrose@1474 464 // FIXME: fill in _raise_exception_method with a suitable sun.dyn method
jrose@1474 465 __ movptr(rbx_method, ExternalAddress((address) &_raise_exception_method));
jrose@1474 466 __ testptr(rbx_method, rbx_method);
twisti@2411 467 __ jccb(Assembler::zero, L_no_method);
twisti@2411 468
twisti@2411 469 const int jobject_oop_offset = 0;
jrose@1474 470 __ movptr(rbx_method, Address(rbx_method, jobject_oop_offset)); // dereference the jobject
jrose@1474 471 __ testptr(rbx_method, rbx_method);
twisti@2411 472 __ jccb(Assembler::zero, L_no_method);
jrose@1474 473 __ verify_oop(rbx_method);
twisti@2411 474
twisti@2411 475 // 32-bit: push remaining arguments as if coming from the compiler.
twisti@2411 476 NOT_LP64(__ push(rarg2_required));
twisti@2411 477
twisti@2411 478 __ push(rdi_pc); // restore caller PC
twisti@2411 479 __ jump(ExternalAddress(c2i_entry)); // do C2I transition
jrose@1145 480
jrose@1474 481 // If we get here, the Java runtime did not do its job of creating the exception.
jrose@1474 482 // Do something that is at least causes a valid throw from the interpreter.
twisti@2411 483 __ bind(L_no_method);
twisti@2411 484 __ push(rarg2_required);
twisti@2411 485 __ push(rarg1_actual);
jrose@1145 486 __ jump(ExternalAddress(Interpreter::throw_WrongMethodType_entry()));
jrose@1145 487 }
jrose@1145 488 break;
jrose@1145 489
jrose@1145 490 case _invokestatic_mh:
jrose@1145 491 case _invokespecial_mh:
jrose@1145 492 {
jrose@1145 493 Register rbx_method = rbx_temp;
twisti@2201 494 __ load_heap_oop(rbx_method, rcx_mh_vmtarget); // target is a methodOop
jrose@1145 495 __ verify_oop(rbx_method);
jrose@1145 496 // same as TemplateTable::invokestatic or invokespecial,
jrose@1145 497 // minus the CP setup and profiling:
jrose@1145 498 if (ek == _invokespecial_mh) {
jrose@1145 499 // Must load & check the first argument before entering the target method.
jrose@1145 500 __ load_method_handle_vmslots(rax_argslot, rcx_recv, rdx_temp);
jrose@1145 501 __ movptr(rcx_recv, __ argument_address(rax_argslot, -1));
jrose@1145 502 __ null_check(rcx_recv);
jrose@1145 503 __ verify_oop(rcx_recv);
jrose@1145 504 }
jrose@1145 505 __ jmp(rbx_method_fie);
jrose@1145 506 }
jrose@1145 507 break;
jrose@1145 508
jrose@1145 509 case _invokevirtual_mh:
jrose@1145 510 {
jrose@1145 511 // same as TemplateTable::invokevirtual,
jrose@1145 512 // minus the CP setup and profiling:
jrose@1145 513
jrose@1145 514 // pick out the vtable index and receiver offset from the MH,
jrose@1145 515 // and then we can discard it:
jrose@1145 516 __ load_method_handle_vmslots(rax_argslot, rcx_recv, rdx_temp);
jrose@1145 517 Register rbx_index = rbx_temp;
jrose@1145 518 __ movl(rbx_index, rcx_dmh_vmindex);
jrose@1145 519 // Note: The verifier allows us to ignore rcx_mh_vmtarget.
jrose@1145 520 __ movptr(rcx_recv, __ argument_address(rax_argslot, -1));
jrose@1145 521 __ null_check(rcx_recv, oopDesc::klass_offset_in_bytes());
jrose@1145 522
jrose@1145 523 // get receiver klass
jrose@1145 524 Register rax_klass = rax_argslot;
jrose@1145 525 __ load_klass(rax_klass, rcx_recv);
jrose@1145 526 __ verify_oop(rax_klass);
jrose@1145 527
jrose@1145 528 // get target methodOop & entry point
jrose@1145 529 const int base = instanceKlass::vtable_start_offset() * wordSize;
jrose@1145 530 assert(vtableEntry::size() * wordSize == wordSize, "adjust the scaling in the code below");
jrose@1145 531 Address vtable_entry_addr(rax_klass,
jrose@1145 532 rbx_index, Address::times_ptr,
jrose@1145 533 base + vtableEntry::method_offset_in_bytes());
jrose@1145 534 Register rbx_method = rbx_temp;
twisti@1543 535 __ movptr(rbx_method, vtable_entry_addr);
jrose@1145 536
jrose@1145 537 __ verify_oop(rbx_method);
jrose@1145 538 __ jmp(rbx_method_fie);
jrose@1145 539 }
jrose@1145 540 break;
jrose@1145 541
jrose@1145 542 case _invokeinterface_mh:
jrose@1145 543 {
jrose@1145 544 // same as TemplateTable::invokeinterface,
jrose@1145 545 // minus the CP setup and profiling:
jrose@1145 546
jrose@1145 547 // pick out the interface and itable index from the MH.
jrose@1145 548 __ load_method_handle_vmslots(rax_argslot, rcx_recv, rdx_temp);
jrose@1145 549 Register rdx_intf = rdx_temp;
jrose@1145 550 Register rbx_index = rbx_temp;
twisti@2201 551 __ load_heap_oop(rdx_intf, rcx_mh_vmtarget);
twisti@2201 552 __ movl(rbx_index, rcx_dmh_vmindex);
jrose@1145 553 __ movptr(rcx_recv, __ argument_address(rax_argslot, -1));
jrose@1145 554 __ null_check(rcx_recv, oopDesc::klass_offset_in_bytes());
jrose@1145 555
jrose@1145 556 // get receiver klass
jrose@1145 557 Register rax_klass = rax_argslot;
jrose@1145 558 __ load_klass(rax_klass, rcx_recv);
jrose@1145 559 __ verify_oop(rax_klass);
jrose@1145 560
jrose@1474 561 Register rdi_temp = rdi;
jrose@1145 562 Register rbx_method = rbx_index;
jrose@1145 563
jrose@1145 564 // get interface klass
jrose@1145 565 Label no_such_interface;
jrose@1145 566 __ verify_oop(rdx_intf);
jrose@1145 567 __ lookup_interface_method(rax_klass, rdx_intf,
jrose@1145 568 // note: next two args must be the same:
jrose@1145 569 rbx_index, rbx_method,
jrose@1474 570 rdi_temp,
jrose@1145 571 no_such_interface);
jrose@1145 572
jrose@1145 573 __ verify_oop(rbx_method);
jrose@1145 574 __ jmp(rbx_method_fie);
jrose@1145 575 __ hlt();
jrose@1145 576
jrose@1145 577 __ bind(no_such_interface);
jrose@1145 578 // Throw an exception.
jrose@1145 579 // For historical reasons, it will be IncompatibleClassChangeError.
twisti@2411 580 __ mov(rbx_temp, rcx_recv); // rarg2_required might be RCX
twisti@2411 581 assert_different_registers(rarg2_required, rbx_temp);
twisti@2411 582 __ movptr(rarg2_required, Address(rdx_intf, java_mirror_offset)); // required interface
twisti@2411 583 __ mov( rarg1_actual, rbx_temp); // bad receiver
twisti@2411 584 __ movl( rarg0_code, (int) Bytecodes::_invokeinterface); // who is complaining?
jrose@1474 585 __ jump(ExternalAddress(from_interpreted_entry(_raise_exception)));
jrose@1145 586 }
jrose@1145 587 break;
jrose@1145 588
jrose@1145 589 case _bound_ref_mh:
jrose@1145 590 case _bound_int_mh:
jrose@1145 591 case _bound_long_mh:
jrose@1145 592 case _bound_ref_direct_mh:
jrose@1145 593 case _bound_int_direct_mh:
jrose@1145 594 case _bound_long_direct_mh:
jrose@1145 595 {
jrose@1145 596 bool direct_to_method = (ek >= _bound_ref_direct_mh);
twisti@1739 597 BasicType arg_type = T_ILLEGAL;
twisti@1739 598 int arg_mask = _INSERT_NO_MASK;
twisti@1739 599 int arg_slots = -1;
twisti@1739 600 get_ek_bound_mh_info(ek, arg_type, arg_mask, arg_slots);
jrose@1145 601
jrose@1145 602 // make room for the new argument:
jrose@1145 603 __ movl(rax_argslot, rcx_bmh_vmargslot);
jrose@1145 604 __ lea(rax_argslot, __ argument_address(rax_argslot));
twisti@2565 605
twisti@2565 606 insert_arg_slots(_masm, arg_slots * stack_move_unit(), arg_mask, rax_argslot, rbx_temp, rdx_temp);
jrose@1145 607
jrose@1145 608 // store bound argument into the new stack slot:
twisti@2201 609 __ load_heap_oop(rbx_temp, rcx_bmh_argument);
jrose@1145 610 if (arg_type == T_OBJECT) {
jrose@1145 611 __ movptr(Address(rax_argslot, 0), rbx_temp);
jrose@1145 612 } else {
twisti@2565 613 Address prim_value_addr(rbx_temp, java_lang_boxing_object::value_offset_in_bytes(arg_type));
twisti@2565 614 const int arg_size = type2aelembytes(arg_type);
twisti@2565 615 __ load_sized_value(rdx_temp, prim_value_addr, arg_size, is_signed_subword_type(arg_type), rbx_temp);
twisti@2565 616 __ store_sized_value(Address(rax_argslot, 0), rdx_temp, arg_size, rbx_temp);
jrose@1145 617 }
jrose@1145 618
jrose@1145 619 if (direct_to_method) {
jrose@1145 620 Register rbx_method = rbx_temp;
twisti@2201 621 __ load_heap_oop(rbx_method, rcx_mh_vmtarget);
jrose@1145 622 __ verify_oop(rbx_method);
jrose@1145 623 __ jmp(rbx_method_fie);
jrose@1145 624 } else {
twisti@2201 625 __ load_heap_oop(rcx_recv, rcx_mh_vmtarget);
jrose@1145 626 __ verify_oop(rcx_recv);
jrose@1145 627 __ jump_to_method_handle_entry(rcx_recv, rdx_temp);
jrose@1145 628 }
jrose@1145 629 }
jrose@1145 630 break;
jrose@1145 631
jrose@1145 632 case _adapter_retype_only:
jrose@1474 633 case _adapter_retype_raw:
jrose@1145 634 // immediately jump to the next MH layer:
twisti@2201 635 __ load_heap_oop(rcx_recv, rcx_mh_vmtarget);
jrose@1145 636 __ verify_oop(rcx_recv);
jrose@1145 637 __ jump_to_method_handle_entry(rcx_recv, rdx_temp);
jrose@1145 638 // This is OK when all parameter types widen.
jrose@1145 639 // It is also OK when a return type narrows.
jrose@1145 640 break;
jrose@1145 641
jrose@1145 642 case _adapter_check_cast:
jrose@1145 643 {
jrose@1145 644 // temps:
jrose@1145 645 Register rbx_klass = rbx_temp; // interesting AMH data
jrose@1145 646
jrose@1145 647 // check a reference argument before jumping to the next layer of MH:
jrose@1145 648 __ movl(rax_argslot, rcx_amh_vmargslot);
jrose@1145 649 vmarg = __ argument_address(rax_argslot);
jrose@1145 650
jrose@1145 651 // What class are we casting to?
twisti@2201 652 __ load_heap_oop(rbx_klass, rcx_amh_argument); // this is a Class object!
twisti@2201 653 __ load_heap_oop(rbx_klass, Address(rbx_klass, java_lang_Class::klass_offset_in_bytes()));
jrose@1145 654
jrose@1145 655 Label done;
jrose@1145 656 __ movptr(rdx_temp, vmarg);
twisti@1712 657 __ testptr(rdx_temp, rdx_temp);
twisti@2201 658 __ jcc(Assembler::zero, done); // no cast if null
jrose@1145 659 __ load_klass(rdx_temp, rdx_temp);
jrose@1145 660
jrose@1145 661 // live at this point:
jrose@1145 662 // - rbx_klass: klass required by the target method
jrose@1145 663 // - rdx_temp: argument klass to test
jrose@1474 664 // - rcx_recv: adapter method handle
jrose@1145 665 __ check_klass_subtype(rdx_temp, rbx_klass, rax_argslot, done);
jrose@1145 666
jrose@1145 667 // If we get here, the type check failed!
jrose@1145 668 // Call the wrong_method_type stub, passing the failing argument type in rax.
jrose@1145 669 Register rax_mtype = rax_argslot;
jrose@1474 670 __ movl(rax_argslot, rcx_amh_vmargslot); // reload argslot field
jrose@1474 671 __ movptr(rdx_temp, vmarg);
jrose@1474 672
twisti@2411 673 assert_different_registers(rarg2_required, rdx_temp);
twisti@2411 674 __ load_heap_oop(rarg2_required, rcx_amh_argument); // required class
twisti@2411 675 __ mov( rarg1_actual, rdx_temp); // bad object
twisti@2411 676 __ movl( rarg0_code, (int) Bytecodes::_checkcast); // who is complaining?
jrose@1474 677 __ jump(ExternalAddress(from_interpreted_entry(_raise_exception)));
jrose@1145 678
jrose@1145 679 __ bind(done);
jrose@1474 680 // get the new MH:
twisti@2201 681 __ load_heap_oop(rcx_recv, rcx_mh_vmtarget);
jrose@1145 682 __ jump_to_method_handle_entry(rcx_recv, rdx_temp);
jrose@1145 683 }
jrose@1145 684 break;
jrose@1145 685
jrose@1145 686 case _adapter_prim_to_prim:
jrose@1145 687 case _adapter_ref_to_prim:
jrose@1145 688 // handled completely by optimized cases
jrose@1145 689 __ stop("init_AdapterMethodHandle should not issue this");
jrose@1145 690 break;
jrose@1145 691
jrose@1145 692 case _adapter_opt_i2i: // optimized subcase of adapt_prim_to_prim
jrose@1145 693 //case _adapter_opt_f2i: // optimized subcase of adapt_prim_to_prim
jrose@1145 694 case _adapter_opt_l2i: // optimized subcase of adapt_prim_to_prim
jrose@1145 695 case _adapter_opt_unboxi: // optimized subcase of adapt_ref_to_prim
jrose@1145 696 {
jrose@1145 697 // perform an in-place conversion to int or an int subword
jrose@1145 698 __ movl(rax_argslot, rcx_amh_vmargslot);
jrose@1145 699 vmarg = __ argument_address(rax_argslot);
jrose@1145 700
jrose@1145 701 switch (ek) {
jrose@1145 702 case _adapter_opt_i2i:
jrose@1145 703 __ movl(rdx_temp, vmarg);
jrose@1145 704 break;
jrose@1145 705 case _adapter_opt_l2i:
jrose@1145 706 {
jrose@1145 707 // just delete the extra slot; on a little-endian machine we keep the first
jrose@1145 708 __ lea(rax_argslot, __ argument_address(rax_argslot, 1));
jrose@1145 709 remove_arg_slots(_masm, -stack_move_unit(),
jrose@1145 710 rax_argslot, rbx_temp, rdx_temp);
twisti@1861 711 vmarg = Address(rax_argslot, -Interpreter::stackElementSize);
jrose@1145 712 __ movl(rdx_temp, vmarg);
jrose@1145 713 }
jrose@1145 714 break;
jrose@1145 715 case _adapter_opt_unboxi:
jrose@1145 716 {
jrose@1145 717 // Load the value up from the heap.
jrose@1145 718 __ movptr(rdx_temp, vmarg);
jrose@1145 719 int value_offset = java_lang_boxing_object::value_offset_in_bytes(T_INT);
jrose@1145 720 #ifdef ASSERT
jrose@1145 721 for (int bt = T_BOOLEAN; bt < T_INT; bt++) {
jrose@1145 722 if (is_subword_type(BasicType(bt)))
jrose@1145 723 assert(value_offset == java_lang_boxing_object::value_offset_in_bytes(BasicType(bt)), "");
jrose@1145 724 }
jrose@1145 725 #endif
jrose@1145 726 __ null_check(rdx_temp, value_offset);
jrose@1145 727 __ movl(rdx_temp, Address(rdx_temp, value_offset));
jrose@1145 728 // We load this as a word. Because we are little-endian,
jrose@1145 729 // the low bits will be correct, but the high bits may need cleaning.
jrose@1145 730 // The vminfo will guide us to clean those bits.
jrose@1145 731 }
jrose@1145 732 break;
jrose@1145 733 default:
twisti@1739 734 ShouldNotReachHere();
jrose@1145 735 }
jrose@1145 736
twisti@1739 737 // Do the requested conversion and store the value.
jrose@1145 738 Register rbx_vminfo = rbx_temp;
jrose@1145 739 __ movl(rbx_vminfo, rcx_amh_conversion);
jrose@1145 740 assert(CONV_VMINFO_SHIFT == 0, "preshifted");
jrose@1145 741
jrose@1145 742 // get the new MH:
twisti@2201 743 __ load_heap_oop(rcx_recv, rcx_mh_vmtarget);
jrose@1145 744 // (now we are done with the old MH)
jrose@1145 745
jrose@1145 746 // original 32-bit vmdata word must be of this form:
twisti@1570 747 // | MBZ:6 | signBitCount:8 | srcDstTypes:8 | conversionOp:8 |
twisti@1570 748 __ xchgptr(rcx, rbx_vminfo); // free rcx for shifts
jrose@1145 749 __ shll(rdx_temp /*, rcx*/);
jrose@1145 750 Label zero_extend, done;
jrose@1145 751 __ testl(rcx, CONV_VMINFO_SIGN_FLAG);
twisti@1570 752 __ jccb(Assembler::zero, zero_extend);
jrose@1145 753
jrose@1145 754 // this path is taken for int->byte, int->short
jrose@1145 755 __ sarl(rdx_temp /*, rcx*/);
twisti@1570 756 __ jmpb(done);
jrose@1145 757
jrose@1145 758 __ bind(zero_extend);
jrose@1145 759 // this is taken for int->char
jrose@1145 760 __ shrl(rdx_temp /*, rcx*/);
jrose@1145 761
jrose@1145 762 __ bind(done);
twisti@1739 763 __ movl(vmarg, rdx_temp); // Store the value.
twisti@1570 764 __ xchgptr(rcx, rbx_vminfo); // restore rcx_recv
jrose@1145 765
jrose@1145 766 __ jump_to_method_handle_entry(rcx_recv, rdx_temp);
jrose@1145 767 }
jrose@1145 768 break;
jrose@1145 769
jrose@1145 770 case _adapter_opt_i2l: // optimized subcase of adapt_prim_to_prim
jrose@1145 771 case _adapter_opt_unboxl: // optimized subcase of adapt_ref_to_prim
jrose@1145 772 {
jrose@1145 773 // perform an in-place int-to-long or ref-to-long conversion
jrose@1145 774 __ movl(rax_argslot, rcx_amh_vmargslot);
jrose@1145 775
jrose@1145 776 // on a little-endian machine we keep the first slot and add another after
jrose@1145 777 __ lea(rax_argslot, __ argument_address(rax_argslot, 1));
jrose@1145 778 insert_arg_slots(_masm, stack_move_unit(), _INSERT_INT_MASK,
jrose@1145 779 rax_argslot, rbx_temp, rdx_temp);
twisti@1861 780 Address vmarg1(rax_argslot, -Interpreter::stackElementSize);
twisti@1861 781 Address vmarg2 = vmarg1.plus_disp(Interpreter::stackElementSize);
jrose@1145 782
jrose@1145 783 switch (ek) {
jrose@1145 784 case _adapter_opt_i2l:
jrose@1145 785 {
twisti@1728 786 #ifdef _LP64
twisti@1728 787 __ movslq(rdx_temp, vmarg1); // Load sign-extended
twisti@1728 788 __ movq(vmarg1, rdx_temp); // Store into first slot
twisti@1728 789 #else
jrose@1145 790 __ movl(rdx_temp, vmarg1);
twisti@1728 791 __ sarl(rdx_temp, BitsPerInt - 1); // __ extend_sign()
jrose@1145 792 __ movl(vmarg2, rdx_temp); // store second word
twisti@1728 793 #endif
jrose@1145 794 }
jrose@1145 795 break;
jrose@1145 796 case _adapter_opt_unboxl:
jrose@1145 797 {
jrose@1145 798 // Load the value up from the heap.
jrose@1145 799 __ movptr(rdx_temp, vmarg1);
jrose@1145 800 int value_offset = java_lang_boxing_object::value_offset_in_bytes(T_LONG);
jrose@1145 801 assert(value_offset == java_lang_boxing_object::value_offset_in_bytes(T_DOUBLE), "");
jrose@1145 802 __ null_check(rdx_temp, value_offset);
twisti@1728 803 #ifdef _LP64
twisti@1728 804 __ movq(rbx_temp, Address(rdx_temp, value_offset));
twisti@1728 805 __ movq(vmarg1, rbx_temp);
twisti@1728 806 #else
jrose@1145 807 __ movl(rbx_temp, Address(rdx_temp, value_offset + 0*BytesPerInt));
jrose@1145 808 __ movl(rdx_temp, Address(rdx_temp, value_offset + 1*BytesPerInt));
jrose@1145 809 __ movl(vmarg1, rbx_temp);
jrose@1145 810 __ movl(vmarg2, rdx_temp);
twisti@1728 811 #endif
jrose@1145 812 }
jrose@1145 813 break;
jrose@1145 814 default:
twisti@1739 815 ShouldNotReachHere();
jrose@1145 816 }
jrose@1145 817
twisti@2201 818 __ load_heap_oop(rcx_recv, rcx_mh_vmtarget);
jrose@1145 819 __ jump_to_method_handle_entry(rcx_recv, rdx_temp);
jrose@1145 820 }
jrose@1145 821 break;
jrose@1145 822
jrose@1145 823 case _adapter_opt_f2d: // optimized subcase of adapt_prim_to_prim
jrose@1145 824 case _adapter_opt_d2f: // optimized subcase of adapt_prim_to_prim
jrose@1145 825 {
jrose@1145 826 // perform an in-place floating primitive conversion
jrose@1145 827 __ movl(rax_argslot, rcx_amh_vmargslot);
jrose@1145 828 __ lea(rax_argslot, __ argument_address(rax_argslot, 1));
jrose@1145 829 if (ek == _adapter_opt_f2d) {
jrose@1145 830 insert_arg_slots(_masm, stack_move_unit(), _INSERT_INT_MASK,
jrose@1145 831 rax_argslot, rbx_temp, rdx_temp);
jrose@1145 832 }
twisti@1861 833 Address vmarg(rax_argslot, -Interpreter::stackElementSize);
jrose@1145 834
jrose@1145 835 #ifdef _LP64
jrose@1145 836 if (ek == _adapter_opt_f2d) {
jrose@1145 837 __ movflt(xmm0, vmarg);
jrose@1145 838 __ cvtss2sd(xmm0, xmm0);
jrose@1145 839 __ movdbl(vmarg, xmm0);
jrose@1145 840 } else {
jrose@1145 841 __ movdbl(xmm0, vmarg);
jrose@1145 842 __ cvtsd2ss(xmm0, xmm0);
jrose@1145 843 __ movflt(vmarg, xmm0);
jrose@1145 844 }
jrose@1145 845 #else //_LP64
jrose@1145 846 if (ek == _adapter_opt_f2d) {
jrose@1145 847 __ fld_s(vmarg); // load float to ST0
jrose@1145 848 __ fstp_s(vmarg); // store single
twisti@1739 849 } else {
jrose@1145 850 __ fld_d(vmarg); // load double to ST0
jrose@1145 851 __ fstp_s(vmarg); // store single
jrose@1145 852 }
jrose@1145 853 #endif //_LP64
jrose@1145 854
jrose@1145 855 if (ek == _adapter_opt_d2f) {
jrose@1145 856 remove_arg_slots(_masm, -stack_move_unit(),
jrose@1145 857 rax_argslot, rbx_temp, rdx_temp);
jrose@1145 858 }
jrose@1145 859
twisti@2201 860 __ load_heap_oop(rcx_recv, rcx_mh_vmtarget);
jrose@1145 861 __ jump_to_method_handle_entry(rcx_recv, rdx_temp);
jrose@1145 862 }
jrose@1145 863 break;
jrose@1145 864
jrose@1145 865 case _adapter_prim_to_ref:
jrose@1145 866 __ unimplemented(entry_name(ek)); // %%% FIXME: NYI
jrose@1145 867 break;
jrose@1145 868
jrose@1145 869 case _adapter_swap_args:
jrose@1145 870 case _adapter_rot_args:
jrose@1145 871 // handled completely by optimized cases
jrose@1145 872 __ stop("init_AdapterMethodHandle should not issue this");
jrose@1145 873 break;
jrose@1145 874
jrose@1145 875 case _adapter_opt_swap_1:
jrose@1145 876 case _adapter_opt_swap_2:
jrose@1145 877 case _adapter_opt_rot_1_up:
jrose@1145 878 case _adapter_opt_rot_1_down:
jrose@1145 879 case _adapter_opt_rot_2_up:
jrose@1145 880 case _adapter_opt_rot_2_down:
jrose@1145 881 {
twisti@1739 882 int swap_bytes = 0, rotate = 0;
twisti@1739 883 get_ek_adapter_opt_swap_rot_info(ek, swap_bytes, rotate);
jrose@1145 884
jrose@1145 885 // 'argslot' is the position of the first argument to swap
jrose@1145 886 __ movl(rax_argslot, rcx_amh_vmargslot);
jrose@1145 887 __ lea(rax_argslot, __ argument_address(rax_argslot));
jrose@1145 888
jrose@1145 889 // 'vminfo' is the second
jrose@1145 890 Register rbx_destslot = rbx_temp;
jrose@1145 891 __ movl(rbx_destslot, rcx_amh_conversion);
jrose@1145 892 assert(CONV_VMINFO_SHIFT == 0, "preshifted");
jrose@1145 893 __ andl(rbx_destslot, CONV_VMINFO_MASK);
jrose@1145 894 __ lea(rbx_destslot, __ argument_address(rbx_destslot));
jrose@1145 895 DEBUG_ONLY(verify_argslot(_masm, rbx_destslot, "swap point must fall within current frame"));
jrose@1145 896
jrose@1145 897 if (!rotate) {
jrose@1145 898 for (int i = 0; i < swap_bytes; i += wordSize) {
jrose@1145 899 __ movptr(rdx_temp, Address(rax_argslot , i));
jrose@1145 900 __ push(rdx_temp);
jrose@1145 901 __ movptr(rdx_temp, Address(rbx_destslot, i));
jrose@1145 902 __ movptr(Address(rax_argslot, i), rdx_temp);
jrose@1145 903 __ pop(rdx_temp);
jrose@1145 904 __ movptr(Address(rbx_destslot, i), rdx_temp);
jrose@1145 905 }
jrose@1145 906 } else {
jrose@1145 907 // push the first chunk, which is going to get overwritten
jrose@1145 908 for (int i = swap_bytes; (i -= wordSize) >= 0; ) {
jrose@1145 909 __ movptr(rdx_temp, Address(rax_argslot, i));
jrose@1145 910 __ push(rdx_temp);
jrose@1145 911 }
jrose@1145 912
jrose@1145 913 if (rotate > 0) {
jrose@1145 914 // rotate upward
jrose@1145 915 __ subptr(rax_argslot, swap_bytes);
jrose@1145 916 #ifdef ASSERT
jrose@1145 917 {
jrose@1145 918 // Verify that argslot > destslot, by at least swap_bytes.
jrose@1145 919 Label L_ok;
jrose@1145 920 __ cmpptr(rax_argslot, rbx_destslot);
twisti@1570 921 __ jccb(Assembler::aboveEqual, L_ok);
jrose@1145 922 __ stop("source must be above destination (upward rotation)");
jrose@1145 923 __ bind(L_ok);
jrose@1145 924 }
jrose@1145 925 #endif
jrose@1145 926 // work argslot down to destslot, copying contiguous data upwards
jrose@1145 927 // pseudo-code:
jrose@1145 928 // rax = src_addr - swap_bytes
jrose@1145 929 // rbx = dest_addr
jrose@1145 930 // while (rax >= rbx) *(rax + swap_bytes) = *(rax + 0), rax--;
jrose@1145 931 Label loop;
jrose@1145 932 __ bind(loop);
jrose@1145 933 __ movptr(rdx_temp, Address(rax_argslot, 0));
jrose@1145 934 __ movptr(Address(rax_argslot, swap_bytes), rdx_temp);
jrose@1145 935 __ addptr(rax_argslot, -wordSize);
jrose@1145 936 __ cmpptr(rax_argslot, rbx_destslot);
twisti@1570 937 __ jccb(Assembler::aboveEqual, loop);
jrose@1145 938 } else {
jrose@1145 939 __ addptr(rax_argslot, swap_bytes);
jrose@1145 940 #ifdef ASSERT
jrose@1145 941 {
jrose@1145 942 // Verify that argslot < destslot, by at least swap_bytes.
jrose@1145 943 Label L_ok;
jrose@1145 944 __ cmpptr(rax_argslot, rbx_destslot);
twisti@1570 945 __ jccb(Assembler::belowEqual, L_ok);
jrose@1145 946 __ stop("source must be below destination (downward rotation)");
jrose@1145 947 __ bind(L_ok);
jrose@1145 948 }
jrose@1145 949 #endif
jrose@1145 950 // work argslot up to destslot, copying contiguous data downwards
jrose@1145 951 // pseudo-code:
jrose@1145 952 // rax = src_addr + swap_bytes
jrose@1145 953 // rbx = dest_addr
jrose@1145 954 // while (rax <= rbx) *(rax - swap_bytes) = *(rax + 0), rax++;
jrose@1145 955 Label loop;
jrose@1145 956 __ bind(loop);
jrose@1145 957 __ movptr(rdx_temp, Address(rax_argslot, 0));
jrose@1145 958 __ movptr(Address(rax_argslot, -swap_bytes), rdx_temp);
jrose@1145 959 __ addptr(rax_argslot, wordSize);
jrose@1145 960 __ cmpptr(rax_argslot, rbx_destslot);
twisti@1570 961 __ jccb(Assembler::belowEqual, loop);
jrose@1145 962 }
jrose@1145 963
jrose@1145 964 // pop the original first chunk into the destination slot, now free
jrose@1145 965 for (int i = 0; i < swap_bytes; i += wordSize) {
jrose@1145 966 __ pop(rdx_temp);
jrose@1145 967 __ movptr(Address(rbx_destslot, i), rdx_temp);
jrose@1145 968 }
jrose@1145 969 }
jrose@1145 970
twisti@2201 971 __ load_heap_oop(rcx_recv, rcx_mh_vmtarget);
jrose@1145 972 __ jump_to_method_handle_entry(rcx_recv, rdx_temp);
jrose@1145 973 }
jrose@1145 974 break;
jrose@1145 975
jrose@1145 976 case _adapter_dup_args:
jrose@1145 977 {
jrose@1145 978 // 'argslot' is the position of the first argument to duplicate
jrose@1145 979 __ movl(rax_argslot, rcx_amh_vmargslot);
jrose@1145 980 __ lea(rax_argslot, __ argument_address(rax_argslot));
jrose@1145 981
jrose@1145 982 // 'stack_move' is negative number of words to duplicate
jrose@1145 983 Register rdx_stack_move = rdx_temp;
twisti@1728 984 __ movl2ptr(rdx_stack_move, rcx_amh_conversion);
twisti@1728 985 __ sarptr(rdx_stack_move, CONV_STACK_MOVE_SHIFT);
jrose@1145 986
jrose@1145 987 int argslot0_num = 0;
jrose@1145 988 Address argslot0 = __ argument_address(RegisterOrConstant(argslot0_num));
jrose@1145 989 assert(argslot0.base() == rsp, "");
jrose@1145 990 int pre_arg_size = argslot0.disp();
jrose@1145 991 assert(pre_arg_size % wordSize == 0, "");
jrose@1145 992 assert(pre_arg_size > 0, "must include PC");
jrose@1145 993
jrose@1145 994 // remember the old rsp+1 (argslot[0])
jrose@1145 995 Register rbx_oldarg = rbx_temp;
jrose@1145 996 __ lea(rbx_oldarg, argslot0);
jrose@1145 997
jrose@1145 998 // move rsp down to make room for dups
jrose@1145 999 __ lea(rsp, Address(rsp, rdx_stack_move, Address::times_ptr));
jrose@1145 1000
jrose@1145 1001 // compute the new rsp+1 (argslot[0])
jrose@1145 1002 Register rdx_newarg = rdx_temp;
jrose@1145 1003 __ lea(rdx_newarg, argslot0);
jrose@1145 1004
jrose@1145 1005 __ push(rdi); // need a temp
jrose@1145 1006 // (preceding push must be done after arg addresses are taken!)
jrose@1145 1007
jrose@1145 1008 // pull down the pre_arg_size data (PC)
jrose@1145 1009 for (int i = -pre_arg_size; i < 0; i += wordSize) {
jrose@1145 1010 __ movptr(rdi, Address(rbx_oldarg, i));
jrose@1145 1011 __ movptr(Address(rdx_newarg, i), rdi);
jrose@1145 1012 }
jrose@1145 1013
jrose@1145 1014 // copy from rax_argslot[0...] down to new_rsp[1...]
jrose@1145 1015 // pseudo-code:
jrose@1145 1016 // rbx = old_rsp+1
jrose@1145 1017 // rdx = new_rsp+1
jrose@1145 1018 // rax = argslot
jrose@1145 1019 // while (rdx < rbx) *rdx++ = *rax++
jrose@1145 1020 Label loop;
jrose@1145 1021 __ bind(loop);
jrose@1145 1022 __ movptr(rdi, Address(rax_argslot, 0));
jrose@1145 1023 __ movptr(Address(rdx_newarg, 0), rdi);
jrose@1145 1024 __ addptr(rax_argslot, wordSize);
jrose@1145 1025 __ addptr(rdx_newarg, wordSize);
jrose@1145 1026 __ cmpptr(rdx_newarg, rbx_oldarg);
twisti@1570 1027 __ jccb(Assembler::less, loop);
jrose@1145 1028
jrose@1145 1029 __ pop(rdi); // restore temp
jrose@1145 1030
twisti@2201 1031 __ load_heap_oop(rcx_recv, rcx_mh_vmtarget);
jrose@1145 1032 __ jump_to_method_handle_entry(rcx_recv, rdx_temp);
jrose@1145 1033 }
jrose@1145 1034 break;
jrose@1145 1035
jrose@1145 1036 case _adapter_drop_args:
jrose@1145 1037 {
jrose@1145 1038 // 'argslot' is the position of the first argument to nuke
jrose@1145 1039 __ movl(rax_argslot, rcx_amh_vmargslot);
jrose@1145 1040 __ lea(rax_argslot, __ argument_address(rax_argslot));
jrose@1145 1041
jrose@1145 1042 __ push(rdi); // need a temp
jrose@1145 1043 // (must do previous push after argslot address is taken)
jrose@1145 1044
jrose@1145 1045 // 'stack_move' is number of words to drop
jrose@1145 1046 Register rdi_stack_move = rdi;
twisti@1728 1047 __ movl2ptr(rdi_stack_move, rcx_amh_conversion);
twisti@1728 1048 __ sarptr(rdi_stack_move, CONV_STACK_MOVE_SHIFT);
jrose@1145 1049 remove_arg_slots(_masm, rdi_stack_move,
jrose@1145 1050 rax_argslot, rbx_temp, rdx_temp);
jrose@1145 1051
jrose@1145 1052 __ pop(rdi); // restore temp
jrose@1145 1053
twisti@2201 1054 __ load_heap_oop(rcx_recv, rcx_mh_vmtarget);
jrose@1145 1055 __ jump_to_method_handle_entry(rcx_recv, rdx_temp);
jrose@1145 1056 }
jrose@1145 1057 break;
jrose@1145 1058
jrose@1145 1059 case _adapter_collect_args:
jrose@1145 1060 __ unimplemented(entry_name(ek)); // %%% FIXME: NYI
jrose@1145 1061 break;
jrose@1145 1062
jrose@1145 1063 case _adapter_spread_args:
jrose@1145 1064 // handled completely by optimized cases
jrose@1145 1065 __ stop("init_AdapterMethodHandle should not issue this");
jrose@1145 1066 break;
jrose@1145 1067
jrose@1145 1068 case _adapter_opt_spread_0:
jrose@1145 1069 case _adapter_opt_spread_1:
jrose@1145 1070 case _adapter_opt_spread_more:
jrose@1145 1071 {
jrose@1145 1072 // spread an array out into a group of arguments
twisti@1739 1073 int length_constant = get_ek_adapter_opt_spread_info(ek);
jrose@1145 1074
jrose@1145 1075 // find the address of the array argument
jrose@1145 1076 __ movl(rax_argslot, rcx_amh_vmargslot);
jrose@1145 1077 __ lea(rax_argslot, __ argument_address(rax_argslot));
jrose@1145 1078
jrose@1145 1079 // grab some temps
jrose@1145 1080 { __ push(rsi); __ push(rdi); }
jrose@1145 1081 // (preceding pushes must be done after argslot address is taken!)
jrose@1145 1082 #define UNPUSH_RSI_RDI \
jrose@1145 1083 { __ pop(rdi); __ pop(rsi); }
jrose@1145 1084
jrose@1145 1085 // arx_argslot points both to the array and to the first output arg
jrose@1145 1086 vmarg = Address(rax_argslot, 0);
jrose@1145 1087
jrose@1145 1088 // Get the array value.
jrose@1145 1089 Register rsi_array = rsi;
jrose@1145 1090 Register rdx_array_klass = rdx_temp;
jrose@1145 1091 BasicType elem_type = T_OBJECT;
jrose@1145 1092 int length_offset = arrayOopDesc::length_offset_in_bytes();
jrose@1145 1093 int elem0_offset = arrayOopDesc::base_offset_in_bytes(elem_type);
jrose@1145 1094 __ movptr(rsi_array, vmarg);
jrose@1145 1095 Label skip_array_check;
jrose@1145 1096 if (length_constant == 0) {
jrose@1145 1097 __ testptr(rsi_array, rsi_array);
jrose@1145 1098 __ jcc(Assembler::zero, skip_array_check);
jrose@1145 1099 }
jrose@1145 1100 __ null_check(rsi_array, oopDesc::klass_offset_in_bytes());
jrose@1145 1101 __ load_klass(rdx_array_klass, rsi_array);
jrose@1145 1102
jrose@1145 1103 // Check the array type.
jrose@1145 1104 Register rbx_klass = rbx_temp;
twisti@2201 1105 __ load_heap_oop(rbx_klass, rcx_amh_argument); // this is a Class object!
twisti@2201 1106 __ load_heap_oop(rbx_klass, Address(rbx_klass, java_lang_Class::klass_offset_in_bytes()));
jrose@1145 1107
jrose@1145 1108 Label ok_array_klass, bad_array_klass, bad_array_length;
jrose@1145 1109 __ check_klass_subtype(rdx_array_klass, rbx_klass, rdi, ok_array_klass);
jrose@1145 1110 // If we get here, the type check failed!
jrose@1145 1111 __ jmp(bad_array_klass);
jrose@1145 1112 __ bind(ok_array_klass);
jrose@1145 1113
jrose@1145 1114 // Check length.
jrose@1145 1115 if (length_constant >= 0) {
jrose@1145 1116 __ cmpl(Address(rsi_array, length_offset), length_constant);
jrose@1145 1117 } else {
jrose@1145 1118 Register rbx_vminfo = rbx_temp;
jrose@1145 1119 __ movl(rbx_vminfo, rcx_amh_conversion);
jrose@1145 1120 assert(CONV_VMINFO_SHIFT == 0, "preshifted");
jrose@1145 1121 __ andl(rbx_vminfo, CONV_VMINFO_MASK);
jrose@1145 1122 __ cmpl(rbx_vminfo, Address(rsi_array, length_offset));
jrose@1145 1123 }
jrose@1145 1124 __ jcc(Assembler::notEqual, bad_array_length);
jrose@1145 1125
jrose@1145 1126 Register rdx_argslot_limit = rdx_temp;
jrose@1145 1127
jrose@1145 1128 // Array length checks out. Now insert any required stack slots.
jrose@1145 1129 if (length_constant == -1) {
jrose@1145 1130 // Form a pointer to the end of the affected region.
twisti@1861 1131 __ lea(rdx_argslot_limit, Address(rax_argslot, Interpreter::stackElementSize));
jrose@1145 1132 // 'stack_move' is negative number of words to insert
jrose@1145 1133 Register rdi_stack_move = rdi;
twisti@1728 1134 __ movl2ptr(rdi_stack_move, rcx_amh_conversion);
twisti@1728 1135 __ sarptr(rdi_stack_move, CONV_STACK_MOVE_SHIFT);
jrose@1145 1136 Register rsi_temp = rsi_array; // spill this
jrose@1145 1137 insert_arg_slots(_masm, rdi_stack_move, -1,
jrose@1145 1138 rax_argslot, rbx_temp, rsi_temp);
jrose@1145 1139 // reload the array (since rsi was killed)
jrose@1145 1140 __ movptr(rsi_array, vmarg);
jrose@1145 1141 } else if (length_constant > 1) {
jrose@1145 1142 int arg_mask = 0;
jrose@1145 1143 int new_slots = (length_constant - 1);
jrose@1145 1144 for (int i = 0; i < new_slots; i++) {
jrose@1145 1145 arg_mask <<= 1;
jrose@1145 1146 arg_mask |= _INSERT_REF_MASK;
jrose@1145 1147 }
jrose@1145 1148 insert_arg_slots(_masm, new_slots * stack_move_unit(), arg_mask,
jrose@1145 1149 rax_argslot, rbx_temp, rdx_temp);
jrose@1145 1150 } else if (length_constant == 1) {
jrose@1145 1151 // no stack resizing required
jrose@1145 1152 } else if (length_constant == 0) {
jrose@1145 1153 remove_arg_slots(_masm, -stack_move_unit(),
jrose@1145 1154 rax_argslot, rbx_temp, rdx_temp);
jrose@1145 1155 }
jrose@1145 1156
jrose@1145 1157 // Copy from the array to the new slots.
jrose@1145 1158 // Note: Stack change code preserves integrity of rax_argslot pointer.
jrose@1145 1159 // So even after slot insertions, rax_argslot still points to first argument.
jrose@1145 1160 if (length_constant == -1) {
jrose@1145 1161 // [rax_argslot, rdx_argslot_limit) is the area we are inserting into.
jrose@1145 1162 Register rsi_source = rsi_array;
jrose@1145 1163 __ lea(rsi_source, Address(rsi_array, elem0_offset));
jrose@1145 1164 Label loop;
jrose@1145 1165 __ bind(loop);
jrose@1145 1166 __ movptr(rbx_temp, Address(rsi_source, 0));
jrose@1145 1167 __ movptr(Address(rax_argslot, 0), rbx_temp);
jrose@1145 1168 __ addptr(rsi_source, type2aelembytes(elem_type));
twisti@1861 1169 __ addptr(rax_argslot, Interpreter::stackElementSize);
jrose@1145 1170 __ cmpptr(rax_argslot, rdx_argslot_limit);
twisti@1570 1171 __ jccb(Assembler::less, loop);
jrose@1145 1172 } else if (length_constant == 0) {
jrose@1145 1173 __ bind(skip_array_check);
jrose@1145 1174 // nothing to copy
jrose@1145 1175 } else {
jrose@1145 1176 int elem_offset = elem0_offset;
jrose@1145 1177 int slot_offset = 0;
jrose@1145 1178 for (int index = 0; index < length_constant; index++) {
jrose@1145 1179 __ movptr(rbx_temp, Address(rsi_array, elem_offset));
jrose@1145 1180 __ movptr(Address(rax_argslot, slot_offset), rbx_temp);
jrose@1145 1181 elem_offset += type2aelembytes(elem_type);
twisti@1861 1182 slot_offset += Interpreter::stackElementSize;
jrose@1145 1183 }
jrose@1145 1184 }
jrose@1145 1185
jrose@1145 1186 // Arguments are spread. Move to next method handle.
jrose@1145 1187 UNPUSH_RSI_RDI;
twisti@2201 1188 __ load_heap_oop(rcx_recv, rcx_mh_vmtarget);
jrose@1145 1189 __ jump_to_method_handle_entry(rcx_recv, rdx_temp);
jrose@1145 1190
jrose@1145 1191 __ bind(bad_array_klass);
jrose@1145 1192 UNPUSH_RSI_RDI;
twisti@2411 1193 assert(!vmarg.uses(rarg2_required), "must be different registers");
twisti@2411 1194 __ movptr(rarg2_required, Address(rdx_array_klass, java_mirror_offset)); // required type
twisti@2411 1195 __ movptr(rarg1_actual, vmarg); // bad array
twisti@2411 1196 __ movl( rarg0_code, (int) Bytecodes::_aaload); // who is complaining?
jrose@1474 1197 __ jump(ExternalAddress(from_interpreted_entry(_raise_exception)));
jrose@1145 1198
jrose@1145 1199 __ bind(bad_array_length);
jrose@1145 1200 UNPUSH_RSI_RDI;
twisti@2411 1201 assert(!vmarg.uses(rarg2_required), "must be different registers");
twisti@2411 1202 __ mov (rarg2_required, rcx_recv); // AMH requiring a certain length
twisti@2411 1203 __ movptr(rarg1_actual, vmarg); // bad array
twisti@2411 1204 __ movl( rarg0_code, (int) Bytecodes::_arraylength); // who is complaining?
jrose@1474 1205 __ jump(ExternalAddress(from_interpreted_entry(_raise_exception)));
jrose@1145 1206
jrose@1145 1207 #undef UNPUSH_RSI_RDI
jrose@1145 1208 }
jrose@1145 1209 break;
jrose@1145 1210
jrose@1145 1211 case _adapter_flyby:
jrose@1145 1212 case _adapter_ricochet:
jrose@1145 1213 __ unimplemented(entry_name(ek)); // %%% FIXME: NYI
jrose@1145 1214 break;
jrose@1145 1215
jrose@1145 1216 default: ShouldNotReachHere();
jrose@1145 1217 }
jrose@1145 1218 __ hlt();
jrose@1145 1219
jrose@1145 1220 address me_cookie = MethodHandleEntry::start_compiled_entry(_masm, interp_entry);
jrose@1145 1221 __ unimplemented(entry_name(ek)); // %%% FIXME: NYI
jrose@1145 1222
jrose@1145 1223 init_entry(ek, MethodHandleEntry::finish_compiled_entry(_masm, me_cookie));
jrose@1145 1224 }

mercurial