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src/os_cpu/solaris_sparc/vm/assembler_solaris_sparc.cpp@1e9a9d2e6509 (annotated)

src/os_cpu/solaris_sparc/vm/assembler_solaris_sparc.cpp

Thu, 21 Oct 2010 11:55:10 -0700

author

never

date

Thu, 21 Oct 2010 11:55:10 -0700

changeset 2262

1e9a9d2e6509

parent 1907

c18cbe5936b8

child 2314

f95d63e2154a

permissions

-rw-r--r--

6970683: improvements to hs_err output
Reviewed-by: kvn, jrose, dholmes, coleenp

duke@435	1	/*
trims@1907	2	* Copyright (c) 1999, 2008, Oracle and/or its affiliates. All rights reserved.
duke@435	3	* DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
duke@435	4	*
duke@435	5	* This code is free software; you can redistribute it and/or modify it
duke@435	6	* under the terms of the GNU General Public License version 2 only, as
duke@435	7	* published by the Free Software Foundation.
duke@435	8	*
duke@435	9	* This code is distributed in the hope that it will be useful, but WITHOUT
duke@435	10	* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
duke@435	11	* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
duke@435	12	* version 2 for more details (a copy is included in the LICENSE file that
duke@435	13	* accompanied this code).
duke@435	14	*
duke@435	15	* You should have received a copy of the GNU General Public License version
duke@435	16	* 2 along with this work; if not, write to the Free Software Foundation,
duke@435	17	* Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
duke@435	18	*
trims@1907	19	* Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA
trims@1907	20	* or visit www.oracle.com if you need additional information or have any
trims@1907	21	* questions.
duke@435	22	*
duke@435	23	*/
duke@435	24
duke@435	25	#include "incls/_precompiled.incl"
duke@435	26	#include "incls/_assembler_solaris_sparc.cpp.incl"
duke@435	27
duke@435	28	#include <sys/trap.h> // For trap numbers
duke@435	29	#include <v9/sys/psr_compat.h> // For V8 compatibility
duke@435	30
duke@435	31	void MacroAssembler::read_ccr_trap(Register ccr_save) {
duke@435	32	// Execute a trap to get the PSR, mask and shift
duke@435	33	// to get the condition codes.
duke@435	34	get_psr_trap();
duke@435	35	nop();
duke@435	36	set(PSR_ICC, ccr_save);
duke@435	37	and3(O0, ccr_save, ccr_save);
duke@435	38	srl(ccr_save, PSR_ICC_SHIFT, ccr_save);
duke@435	39	}
duke@435	40
duke@435	41	void MacroAssembler::write_ccr_trap(Register ccr_save, Register scratch1, Register scratch2) {
duke@435	42	// Execute a trap to get the PSR, shift back
duke@435	43	// the condition codes, mask the condition codes
duke@435	44	// back into and PSR and trap to write back the
duke@435	45	// PSR.
duke@435	46	sll(ccr_save, PSR_ICC_SHIFT, scratch2);
duke@435	47	get_psr_trap();
duke@435	48	nop();
duke@435	49	set(~PSR_ICC, scratch1);
duke@435	50	and3(O0, scratch1, O0);
duke@435	51	or3(O0, scratch2, O0);
duke@435	52	set_psr_trap();
duke@435	53	nop();
duke@435	54	}
duke@435	55
duke@435	56	void MacroAssembler::flush_windows_trap() { trap(ST_FLUSH_WINDOWS); }
duke@435	57	void MacroAssembler::clean_windows_trap() { trap(ST_CLEAN_WINDOWS); }
duke@435	58	void MacroAssembler::get_psr_trap() { trap(ST_GETPSR); }
duke@435	59	void MacroAssembler::set_psr_trap() { trap(ST_SETPSR); }