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src/share/vm/c1/c1_LIR.cpp@15766b73dc1d (annotated)

src/share/vm/c1/c1_LIR.cpp

Wed, 21 May 2014 11:25:25 +0200

author

neliasso

date

Wed, 21 May 2014 11:25:25 +0200

changeset 6688

15766b73dc1d

parent 6680

78bbf4d43a14

child 6876

710a3c8b516e

child 7598

ddce0b7cee93

permissions

-rw-r--r--

8031475: Missing oopmap in patching stubs
Summary: Add patch test for lir_checkcast in compute_oop_map
Reviewed-by: roland, twisti

duke@435	1	/*
drchase@6680	2	* Copyright (c) 2000, 2014, Oracle and/or its affiliates. All rights reserved.
duke@435	3	* DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
duke@435	4	*
duke@435	5	* This code is free software; you can redistribute it and/or modify it
duke@435	6	* under the terms of the GNU General Public License version 2 only, as
duke@435	7	* published by the Free Software Foundation.
duke@435	8	*
duke@435	9	* This code is distributed in the hope that it will be useful, but WITHOUT
duke@435	10	* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
duke@435	11	* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
duke@435	12	* version 2 for more details (a copy is included in the LICENSE file that
duke@435	13	* accompanied this code).
duke@435	14	*
duke@435	15	* You should have received a copy of the GNU General Public License version
duke@435	16	* 2 along with this work; if not, write to the Free Software Foundation,
duke@435	17	* Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
duke@435	18	*
trims@1907	19	* Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA
trims@1907	20	* or visit www.oracle.com if you need additional information or have any
trims@1907	21	* questions.
duke@435	22	*
duke@435	23	*/
duke@435	24
stefank@2314	25	#include "precompiled.hpp"
stefank@2314	26	#include "c1/c1_InstructionPrinter.hpp"
stefank@2314	27	#include "c1/c1_LIR.hpp"
stefank@2314	28	#include "c1/c1_LIRAssembler.hpp"
stefank@2314	29	#include "c1/c1_ValueStack.hpp"
stefank@2314	30	#include "ci/ciInstance.hpp"
stefank@2314	31	#include "runtime/sharedRuntime.hpp"
duke@435	32
duke@435	33	Register LIR_OprDesc::as_register() const {
duke@435	34	return FrameMap::cpu_rnr2reg(cpu_regnr());
duke@435	35	}
duke@435	36
duke@435	37	Register LIR_OprDesc::as_register_lo() const {
duke@435	38	return FrameMap::cpu_rnr2reg(cpu_regnrLo());
duke@435	39	}
duke@435	40
duke@435	41	Register LIR_OprDesc::as_register_hi() const {
duke@435	42	return FrameMap::cpu_rnr2reg(cpu_regnrHi());
duke@435	43	}
duke@435	44
never@739	45	#if defined(X86)
duke@435	46
duke@435	47	XMMRegister LIR_OprDesc::as_xmm_float_reg() const {
duke@435	48	return FrameMap::nr2xmmreg(xmm_regnr());
duke@435	49	}
duke@435	50
duke@435	51	XMMRegister LIR_OprDesc::as_xmm_double_reg() const {
duke@435	52	assert(xmm_regnrLo() == xmm_regnrHi(), "assumed in calculation");
duke@435	53	return FrameMap::nr2xmmreg(xmm_regnrLo());
duke@435	54	}
duke@435	55
never@739	56	#endif // X86
duke@435	57
bobv@2036	58	#if defined(SPARC) || defined(PPC)
duke@435	59
duke@435	60	FloatRegister LIR_OprDesc::as_float_reg() const {
duke@435	61	return FrameMap::nr2floatreg(fpu_regnr());
duke@435	62	}
duke@435	63
duke@435	64	FloatRegister LIR_OprDesc::as_double_reg() const {
duke@435	65	return FrameMap::nr2floatreg(fpu_regnrHi());
duke@435	66	}
duke@435	67
duke@435	68	#endif
duke@435	69
bobv@2036	70	#ifdef ARM
bobv@2036	71
bobv@2036	72	FloatRegister LIR_OprDesc::as_float_reg() const {
bobv@2036	73	return as_FloatRegister(fpu_regnr());
bobv@2036	74	}
bobv@2036	75
bobv@2036	76	FloatRegister LIR_OprDesc::as_double_reg() const {
bobv@2036	77	return as_FloatRegister(fpu_regnrLo());
bobv@2036	78	}
bobv@2036	79
bobv@2036	80	#endif
bobv@2036	81
bobv@2036	82
duke@435	83	LIR_Opr LIR_OprFact::illegalOpr = LIR_OprFact::illegal();
duke@435	84
duke@435	85	LIR_Opr LIR_OprFact::value_type(ValueType* type) {
duke@435	86	ValueTag tag = type->tag();
duke@435	87	switch (tag) {
coleenp@4037	88	case metaDataTag : {
duke@435	89	ClassConstant* c = type->as_ClassConstant();
duke@435	90	if (c != NULL && !c->value()->is_loaded()) {
coleenp@4037	91	return LIR_OprFact::metadataConst(NULL);
roland@4051	92	} else if (c != NULL) {
roland@4051	93	return LIR_OprFact::metadataConst(c->value()->constant_encoding());
duke@435	94	} else {
roland@4051	95	MethodConstant* m = type->as_MethodConstant();
roland@4051	96	assert (m != NULL, "not a class or a method?");
roland@4051	97	return LIR_OprFact::metadataConst(m->value()->constant_encoding());
coleenp@4037	98	}
coleenp@4037	99	}
coleenp@4037	100	case objectTag : {
duke@435	101	return LIR_OprFact::oopConst(type->as_ObjectType()->encoding());
duke@435	102	}
roland@1732	103	case addressTag: return LIR_OprFact::addressConst(type->as_AddressConstant()->value());
duke@435	104	case intTag : return LIR_OprFact::intConst(type->as_IntConstant()->value());
duke@435	105	case floatTag : return LIR_OprFact::floatConst(type->as_FloatConstant()->value());
duke@435	106	case longTag : return LIR_OprFact::longConst(type->as_LongConstant()->value());
duke@435	107	case doubleTag : return LIR_OprFact::doubleConst(type->as_DoubleConstant()->value());
never@739	108	default: ShouldNotReachHere(); return LIR_OprFact::intConst(-1);
duke@435	109	}
duke@435	110	}
duke@435	111
duke@435	112
duke@435	113	LIR_Opr LIR_OprFact::dummy_value_type(ValueType* type) {
duke@435	114	switch (type->tag()) {
duke@435	115	case objectTag: return LIR_OprFact::oopConst(NULL);
roland@1732	116	case addressTag:return LIR_OprFact::addressConst(0);
duke@435	117	case intTag: return LIR_OprFact::intConst(0);
duke@435	118	case floatTag: return LIR_OprFact::floatConst(0.0);
duke@435	119	case longTag: return LIR_OprFact::longConst(0);
duke@435	120	case doubleTag: return LIR_OprFact::doubleConst(0.0);
never@739	121	default: ShouldNotReachHere(); return LIR_OprFact::intConst(-1);
duke@435	122	}
duke@435	123	return illegalOpr;
duke@435	124	}
duke@435	125
duke@435	126
duke@435	127
duke@435	128	//---------------------------------------------------
duke@435	129
duke@435	130
duke@435	131	LIR_Address::Scale LIR_Address::scale(BasicType type) {
kvn@464	132	int elem_size = type2aelembytes(type);
duke@435	133	switch (elem_size) {
duke@435	134	case 1: return LIR_Address::times_1;
duke@435	135	case 2: return LIR_Address::times_2;
duke@435	136	case 4: return LIR_Address::times_4;
duke@435	137	case 8: return LIR_Address::times_8;
duke@435	138	}
duke@435	139	ShouldNotReachHere();
duke@435	140	return LIR_Address::times_1;
duke@435	141	}
duke@435	142
duke@435	143
duke@435	144	#ifndef PRODUCT
duke@435	145	void LIR_Address::verify() const {
bobv@2036	146	#if defined(SPARC) || defined(PPC)
bobv@2036	147	assert(scale() == times_1, "Scaled addressing mode not available on SPARC/PPC and should not be used");
duke@435	148	assert(disp() == 0 || index()->is_illegal(), "can't have both");
duke@435	149	#endif
bobv@2036	150	#ifdef ARM
bobv@2036	151	assert(disp() == 0 || index()->is_illegal(), "can't have both");
bdelsart@3141	152	// Note: offsets higher than 4096 must not be rejected here. They can
bdelsart@3141	153	// be handled by the back-end or will be rejected if not.
bobv@2036	154	#endif
duke@435	155	#ifdef _LP64
duke@435	156	assert(base()->is_cpu_register(), "wrong base operand");
duke@435	157	assert(index()->is_illegal() || index()->is_double_cpu(), "wrong index operand");
coleenp@4037	158	assert(base()->type() == T_OBJECT || base()->type() == T_LONG || base()->type() == T_METADATA,
duke@435	159	"wrong type for addresses");
duke@435	160	#else
duke@435	161	assert(base()->is_single_cpu(), "wrong base operand");
duke@435	162	assert(index()->is_illegal() || index()->is_single_cpu(), "wrong index operand");
coleenp@4037	163	assert(base()->type() == T_OBJECT || base()->type() == T_INT || base()->type() == T_METADATA,
duke@435	164	"wrong type for addresses");
duke@435	165	#endif
duke@435	166	}
duke@435	167	#endif
duke@435	168
duke@435	169
duke@435	170	//---------------------------------------------------
duke@435	171
duke@435	172	char LIR_OprDesc::type_char(BasicType t) {
duke@435	173	switch (t) {
duke@435	174	case T_ARRAY:
duke@435	175	t = T_OBJECT;
duke@435	176	case T_BOOLEAN:
duke@435	177	case T_CHAR:
duke@435	178	case T_FLOAT:
duke@435	179	case T_DOUBLE:
duke@435	180	case T_BYTE:
duke@435	181	case T_SHORT:
duke@435	182	case T_INT:
duke@435	183	case T_LONG:
duke@435	184	case T_OBJECT:
duke@435	185	case T_ADDRESS:
duke@435	186	case T_VOID:
duke@435	187	return ::type2char(t);
iveresov@5994	188	case T_METADATA:
iveresov@5994	189	return 'M';
duke@435	190	case T_ILLEGAL:
duke@435	191	return '?';
duke@435	192
duke@435	193	default:
duke@435	194	ShouldNotReachHere();
never@739	195	return '?';
duke@435	196	}
duke@435	197	}
duke@435	198
duke@435	199	#ifndef PRODUCT
duke@435	200	void LIR_OprDesc::validate_type() const {
duke@435	201
duke@435	202	#ifdef ASSERT
duke@435	203	if (!is_pointer() && !is_illegal()) {
drchase@5290	204	OprKind kindfield = kind_field(); // Factored out because of compiler bug, see 8002160
duke@435	205	switch (as_BasicType(type_field())) {
duke@435	206	case T_LONG:
drchase@5290	207	assert((kindfield == cpu_register || kindfield == stack_value) &&
bobv@2036	208	size_field() == double_size, "must match");
duke@435	209	break;
duke@435	210	case T_FLOAT:
bobv@2036	211	// FP return values can be also in CPU registers on ARM and PPC (softfp ABI)
drchase@5290	212	assert((kindfield == fpu_register || kindfield == stack_value
drchase@5290	213	ARM_ONLY(|| kindfield == cpu_register)
drchase@5290	214	PPC_ONLY(|| kindfield == cpu_register) ) &&
bobv@2036	215	size_field() == single_size, "must match");
duke@435	216	break;
duke@435	217	case T_DOUBLE:
bobv@2036	218	// FP return values can be also in CPU registers on ARM and PPC (softfp ABI)
drchase@5290	219	assert((kindfield == fpu_register || kindfield == stack_value
drchase@5290	220	ARM_ONLY(|| kindfield == cpu_register)
drchase@5290	221	PPC_ONLY(|| kindfield == cpu_register) ) &&
bobv@2036	222	size_field() == double_size, "must match");
duke@435	223	break;
duke@435	224	case T_BOOLEAN:
duke@435	225	case T_CHAR:
duke@435	226	case T_BYTE:
duke@435	227	case T_SHORT:
duke@435	228	case T_INT:
never@2171	229	case T_ADDRESS:
duke@435	230	case T_OBJECT:
coleenp@4037	231	case T_METADATA:
duke@435	232	case T_ARRAY:
drchase@5290	233	assert((kindfield == cpu_register || kindfield == stack_value) &&
bobv@2036	234	size_field() == single_size, "must match");
duke@435	235	break;
duke@435	236
duke@435	237	case T_ILLEGAL:
duke@435	238	// XXX TKR also means unknown right now
duke@435	239	// assert(is_illegal(), "must match");
duke@435	240	break;
duke@435	241
duke@435	242	default:
duke@435	243	ShouldNotReachHere();
duke@435	244	}
duke@435	245	}
duke@435	246	#endif
duke@435	247
duke@435	248	}
duke@435	249	#endif // PRODUCT
duke@435	250
duke@435	251
duke@435	252	bool LIR_OprDesc::is_oop() const {
duke@435	253	if (is_pointer()) {
duke@435	254	return pointer()->is_oop_pointer();
duke@435	255	} else {
duke@435	256	OprType t= type_field();
duke@435	257	assert(t != unknown_type, "not set");
duke@435	258	return t == object_type;
duke@435	259	}
duke@435	260	}
duke@435	261
duke@435	262
duke@435	263
duke@435	264	void LIR_Op2::verify() const {
duke@435	265	#ifdef ASSERT
duke@435	266	switch (code()) {
duke@435	267	case lir_cmove:
roland@4106	268	case lir_xchg:
duke@435	269	break;
duke@435	270
duke@435	271	default:
duke@435	272	assert(!result_opr()->is_register() || !result_opr()->is_oop_register(),
duke@435	273	"can't produce oops from arith");
duke@435	274	}
duke@435	275
duke@435	276	if (TwoOperandLIRForm) {
duke@435	277	switch (code()) {
duke@435	278	case lir_add:
duke@435	279	case lir_sub:
duke@435	280	case lir_mul:
duke@435	281	case lir_mul_strictfp:
duke@435	282	case lir_div:
duke@435	283	case lir_div_strictfp:
duke@435	284	case lir_rem:
duke@435	285	case lir_logic_and:
duke@435	286	case lir_logic_or:
duke@435	287	case lir_logic_xor:
duke@435	288	case lir_shl:
duke@435	289	case lir_shr:
duke@435	290	assert(in_opr1() == result_opr(), "opr1 and result must match");
duke@435	291	assert(in_opr1()->is_valid() && in_opr2()->is_valid(), "must be valid");
duke@435	292	break;
duke@435	293
duke@435	294	// special handling for lir_ushr because of write barriers
duke@435	295	case lir_ushr:
duke@435	296	assert(in_opr1() == result_opr() || in_opr2()->is_constant(), "opr1 and result must match or shift count is constant");
duke@435	297	assert(in_opr1()->is_valid() && in_opr2()->is_valid(), "must be valid");
duke@435	298	break;
duke@435	299
duke@435	300	}
duke@435	301	}
duke@435	302	#endif
duke@435	303	}
duke@435	304
duke@435	305
duke@435	306	LIR_OpBranch::LIR_OpBranch(LIR_Condition cond, BasicType type, BlockBegin* block)
duke@435	307	: LIR_Op(lir_branch, LIR_OprFact::illegalOpr, (CodeEmitInfo*)NULL)
duke@435	308	, _cond(cond)
duke@435	309	, _type(type)
duke@435	310	, _label(block->label())
duke@435	311	, _block(block)
duke@435	312	, _ublock(NULL)
duke@435	313	, _stub(NULL) {
duke@435	314	}
duke@435	315
duke@435	316	LIR_OpBranch::LIR_OpBranch(LIR_Condition cond, BasicType type, CodeStub* stub) :
duke@435	317	LIR_Op(lir_branch, LIR_OprFact::illegalOpr, (CodeEmitInfo*)NULL)
duke@435	318	, _cond(cond)
duke@435	319	, _type(type)
duke@435	320	, _label(stub->entry())
duke@435	321	, _block(NULL)
duke@435	322	, _ublock(NULL)
duke@435	323	, _stub(stub) {
duke@435	324	}
duke@435	325
duke@435	326	LIR_OpBranch::LIR_OpBranch(LIR_Condition cond, BasicType type, BlockBegin* block, BlockBegin* ublock)
duke@435	327	: LIR_Op(lir_cond_float_branch, LIR_OprFact::illegalOpr, (CodeEmitInfo*)NULL)
duke@435	328	, _cond(cond)
duke@435	329	, _type(type)
duke@435	330	, _label(block->label())
duke@435	331	, _block(block)
duke@435	332	, _ublock(ublock)
duke@435	333	, _stub(NULL)
duke@435	334	{
duke@435	335	}
duke@435	336
duke@435	337	void LIR_OpBranch::change_block(BlockBegin* b) {
duke@435	338	assert(_block != NULL, "must have old block");
duke@435	339	assert(_block->label() == label(), "must be equal");
duke@435	340
duke@435	341	_block = b;
duke@435	342	_label = b->label();
duke@435	343	}
duke@435	344
duke@435	345	void LIR_OpBranch::change_ublock(BlockBegin* b) {
duke@435	346	assert(_ublock != NULL, "must have old block");
duke@435	347	_ublock = b;
duke@435	348	}
duke@435	349
duke@435	350	void LIR_OpBranch::negate_cond() {
duke@435	351	switch (_cond) {
duke@435	352	case lir_cond_equal: _cond = lir_cond_notEqual; break;
duke@435	353	case lir_cond_notEqual: _cond = lir_cond_equal; break;
duke@435	354	case lir_cond_less: _cond = lir_cond_greaterEqual; break;
duke@435	355	case lir_cond_lessEqual: _cond = lir_cond_greater; break;
duke@435	356	case lir_cond_greaterEqual: _cond = lir_cond_less; break;
duke@435	357	case lir_cond_greater: _cond = lir_cond_lessEqual; break;
duke@435	358	default: ShouldNotReachHere();
duke@435	359	}
duke@435	360	}
duke@435	361
duke@435	362
duke@435	363	LIR_OpTypeCheck::LIR_OpTypeCheck(LIR_Code code, LIR_Opr result, LIR_Opr object, ciKlass* klass,
duke@435	364	LIR_Opr tmp1, LIR_Opr tmp2, LIR_Opr tmp3,
duke@435	365	bool fast_check, CodeEmitInfo* info_for_exception, CodeEmitInfo* info_for_patch,
iveresov@2138	366	CodeStub* stub)
iveresov@2138	367
duke@435	368	: LIR_Op(code, result, NULL)
duke@435	369	, _object(object)
duke@435	370	, _array(LIR_OprFact::illegalOpr)
duke@435	371	, _klass(klass)
duke@435	372	, _tmp1(tmp1)
duke@435	373	, _tmp2(tmp2)
duke@435	374	, _tmp3(tmp3)
duke@435	375	, _fast_check(fast_check)
duke@435	376	, _stub(stub)
duke@435	377	, _info_for_patch(info_for_patch)
duke@435	378	, _info_for_exception(info_for_exception)
iveresov@2138	379	, _profiled_method(NULL)
iveresov@2138	380	, _profiled_bci(-1)
iveresov@2138	381	, _should_profile(false)
iveresov@2138	382	{
duke@435	383	if (code == lir_checkcast) {
duke@435	384	assert(info_for_exception != NULL, "checkcast throws exceptions");
duke@435	385	} else if (code == lir_instanceof) {
duke@435	386	assert(info_for_exception == NULL, "instanceof throws no exceptions");
duke@435	387	} else {
duke@435	388	ShouldNotReachHere();
duke@435	389	}
duke@435	390	}
duke@435	391
duke@435	392
duke@435	393
iveresov@2138	394	LIR_OpTypeCheck::LIR_OpTypeCheck(LIR_Code code, LIR_Opr object, LIR_Opr array, LIR_Opr tmp1, LIR_Opr tmp2, LIR_Opr tmp3, CodeEmitInfo* info_for_exception)
duke@435	395	: LIR_Op(code, LIR_OprFact::illegalOpr, NULL)
duke@435	396	, _object(object)
duke@435	397	, _array(array)
duke@435	398	, _klass(NULL)
duke@435	399	, _tmp1(tmp1)
duke@435	400	, _tmp2(tmp2)
duke@435	401	, _tmp3(tmp3)
duke@435	402	, _fast_check(false)
duke@435	403	, _stub(NULL)
duke@435	404	, _info_for_patch(NULL)
duke@435	405	, _info_for_exception(info_for_exception)
iveresov@2138	406	, _profiled_method(NULL)
iveresov@2138	407	, _profiled_bci(-1)
iveresov@2138	408	, _should_profile(false)
iveresov@2138	409	{
duke@435	410	if (code == lir_store_check) {
never@2488	411	_stub = new ArrayStoreExceptionStub(object, info_for_exception);
duke@435	412	assert(info_for_exception != NULL, "store_check throws exceptions");
duke@435	413	} else {
duke@435	414	ShouldNotReachHere();
duke@435	415	}
duke@435	416	}
duke@435	417
duke@435	418
duke@435	419	LIR_OpArrayCopy::LIR_OpArrayCopy(LIR_Opr src, LIR_Opr src_pos, LIR_Opr dst, LIR_Opr dst_pos, LIR_Opr length,
duke@435	420	LIR_Opr tmp, ciArrayKlass* expected_type, int flags, CodeEmitInfo* info)
duke@435	421	: LIR_Op(lir_arraycopy, LIR_OprFact::illegalOpr, info)
duke@435	422	, _tmp(tmp)
duke@435	423	, _src(src)
duke@435	424	, _src_pos(src_pos)
duke@435	425	, _dst(dst)
duke@435	426	, _dst_pos(dst_pos)
duke@435	427	, _flags(flags)
duke@435	428	, _expected_type(expected_type)
duke@435	429	, _length(length) {
duke@435	430	_stub = new ArrayCopyStub(this);
duke@435	431	}
duke@435	432
drchase@5353	433	LIR_OpUpdateCRC32::LIR_OpUpdateCRC32(LIR_Opr crc, LIR_Opr val, LIR_Opr res)
drchase@5353	434	: LIR_Op(lir_updatecrc32, res, NULL)
drchase@5353	435	, _crc(crc)
drchase@5353	436	, _val(val) {
drchase@5353	437	}
duke@435	438
duke@435	439	//-------------------verify--------------------------
duke@435	440
duke@435	441	void LIR_Op1::verify() const {
duke@435	442	switch(code()) {
duke@435	443	case lir_move:
duke@435	444	assert(in_opr()->is_valid() && result_opr()->is_valid(), "must be");
duke@435	445	break;
duke@435	446	case lir_null_check:
duke@435	447	assert(in_opr()->is_register(), "must be");
duke@435	448	break;
duke@435	449	case lir_return:
duke@435	450	assert(in_opr()->is_register() || in_opr()->is_illegal(), "must be");
duke@435	451	break;
duke@435	452	}
duke@435	453	}
duke@435	454
duke@435	455	void LIR_OpRTCall::verify() const {
duke@435	456	assert(strcmp(Runtime1::name_for_address(addr()), "<unknown function>") != 0, "unknown function");
duke@435	457	}
duke@435	458
duke@435	459	//-------------------visits--------------------------
duke@435	460
duke@435	461	// complete rework of LIR instruction visitor.
duke@435	462	// The virtual calls for each instruction type is replaced by a big
duke@435	463	// switch that adds the operands for each instruction
duke@435	464
duke@435	465	void LIR_OpVisitState::visit(LIR_Op* op) {
duke@435	466	// copy information from the LIR_Op
duke@435	467	reset();
duke@435	468	set_op(op);
duke@435	469
duke@435	470	switch (op->code()) {
duke@435	471
duke@435	472	// LIR_Op0
duke@435	473	case lir_word_align: // result and info always invalid
duke@435	474	case lir_backwardbranch_target: // result and info always invalid
duke@435	475	case lir_build_frame: // result and info always invalid
duke@435	476	case lir_fpop_raw: // result and info always invalid
duke@435	477	case lir_24bit_FPU: // result and info always invalid
duke@435	478	case lir_reset_FPU: // result and info always invalid
duke@435	479	case lir_breakpoint: // result and info always invalid
duke@435	480	case lir_membar: // result and info always invalid
duke@435	481	case lir_membar_acquire: // result and info always invalid
duke@435	482	case lir_membar_release: // result and info always invalid
jiangli@3592	483	case lir_membar_loadload: // result and info always invalid
jiangli@3592	484	case lir_membar_storestore: // result and info always invalid
jiangli@3592	485	case lir_membar_loadstore: // result and info always invalid
jiangli@3592	486	case lir_membar_storeload: // result and info always invalid
duke@435	487	{
duke@435	488	assert(op->as_Op0() != NULL, "must be");
duke@435	489	assert(op->_info == NULL, "info not used by this instruction");
duke@435	490	assert(op->_result->is_illegal(), "not used");
duke@435	491	break;
duke@435	492	}
duke@435	493
duke@435	494	case lir_nop: // may have info, result always invalid
duke@435	495	case lir_std_entry: // may have result, info always invalid
duke@435	496	case lir_osr_entry: // may have result, info always invalid
duke@435	497	case lir_get_thread: // may have result, info always invalid
duke@435	498	{
duke@435	499	assert(op->as_Op0() != NULL, "must be");
duke@435	500	if (op->_info != NULL) do_info(op->_info);
duke@435	501	if (op->_result->is_valid()) do_output(op->_result);
duke@435	502	break;
duke@435	503	}
duke@435	504
duke@435	505
duke@435	506	// LIR_OpLabel
duke@435	507	case lir_label: // result and info always invalid
duke@435	508	{
duke@435	509	assert(op->as_OpLabel() != NULL, "must be");
duke@435	510	assert(op->_info == NULL, "info not used by this instruction");
duke@435	511	assert(op->_result->is_illegal(), "not used");
duke@435	512	break;
duke@435	513	}
duke@435	514
duke@435	515
duke@435	516	// LIR_Op1
duke@435	517	case lir_fxch: // input always valid, result and info always invalid
duke@435	518	case lir_fld: // input always valid, result and info always invalid
duke@435	519	case lir_ffree: // input always valid, result and info always invalid
duke@435	520	case lir_push: // input always valid, result and info always invalid
duke@435	521	case lir_pop: // input always valid, result and info always invalid
duke@435	522	case lir_return: // input always valid, result and info always invalid
duke@435	523	case lir_leal: // input and result always valid, info always invalid
duke@435	524	case lir_neg: // input and result always valid, info always invalid
duke@435	525	case lir_monaddr: // input and result always valid, info always invalid
duke@435	526	case lir_null_check: // input and info always valid, result always invalid
duke@435	527	case lir_move: // input and result always valid, may have info
iveresov@2138	528	case lir_pack64: // input and result always valid
iveresov@2138	529	case lir_unpack64: // input and result always valid
duke@435	530	case lir_prefetchr: // input always valid, result and info always invalid
duke@435	531	case lir_prefetchw: // input always valid, result and info always invalid
duke@435	532	{
duke@435	533	assert(op->as_Op1() != NULL, "must be");
duke@435	534	LIR_Op1* op1 = (LIR_Op1*)op;
duke@435	535
duke@435	536	if (op1->_info) do_info(op1->_info);
duke@435	537	if (op1->_opr->is_valid()) do_input(op1->_opr);
duke@435	538	if (op1->_result->is_valid()) do_output(op1->_result);
duke@435	539
duke@435	540	break;
duke@435	541	}
duke@435	542
duke@435	543	case lir_safepoint:
duke@435	544	{
duke@435	545	assert(op->as_Op1() != NULL, "must be");
duke@435	546	LIR_Op1* op1 = (LIR_Op1*)op;
duke@435	547
duke@435	548	assert(op1->_info != NULL, ""); do_info(op1->_info);
duke@435	549	if (op1->_opr->is_valid()) do_temp(op1->_opr); // safepoints on SPARC need temporary register
duke@435	550	assert(op1->_result->is_illegal(), "safepoint does not produce value");
duke@435	551
duke@435	552	break;
duke@435	553	}
duke@435	554
duke@435	555	// LIR_OpConvert;
duke@435	556	case lir_convert: // input and result always valid, info always invalid
duke@435	557	{
duke@435	558	assert(op->as_OpConvert() != NULL, "must be");
duke@435	559	LIR_OpConvert* opConvert = (LIR_OpConvert*)op;
duke@435	560
duke@435	561	assert(opConvert->_info == NULL, "must be");
duke@435	562	if (opConvert->_opr->is_valid()) do_input(opConvert->_opr);
duke@435	563	if (opConvert->_result->is_valid()) do_output(opConvert->_result);
bobv@2036	564	#ifdef PPC
bobv@2036	565	if (opConvert->_tmp1->is_valid()) do_temp(opConvert->_tmp1);
bobv@2036	566	if (opConvert->_tmp2->is_valid()) do_temp(opConvert->_tmp2);
bobv@2036	567	#endif
duke@435	568	do_stub(opConvert->_stub);
duke@435	569
duke@435	570	break;
duke@435	571	}
duke@435	572
duke@435	573	// LIR_OpBranch;
duke@435	574	case lir_branch: // may have info, input and result register always invalid
duke@435	575	case lir_cond_float_branch: // may have info, input and result register always invalid
duke@435	576	{
duke@435	577	assert(op->as_OpBranch() != NULL, "must be");
duke@435	578	LIR_OpBranch* opBranch = (LIR_OpBranch*)op;
duke@435	579
duke@435	580	if (opBranch->_info != NULL) do_info(opBranch->_info);
duke@435	581	assert(opBranch->_result->is_illegal(), "not used");
duke@435	582	if (opBranch->_stub != NULL) opBranch->stub()->visit(this);
duke@435	583
duke@435	584	break;
duke@435	585	}
duke@435	586
duke@435	587
duke@435	588	// LIR_OpAllocObj
duke@435	589	case lir_alloc_object:
duke@435	590	{
duke@435	591	assert(op->as_OpAllocObj() != NULL, "must be");
duke@435	592	LIR_OpAllocObj* opAllocObj = (LIR_OpAllocObj*)op;
duke@435	593
duke@435	594	if (opAllocObj->_info) do_info(opAllocObj->_info);
bobv@2036	595	if (opAllocObj->_opr->is_valid()) { do_input(opAllocObj->_opr);
bobv@2036	596	do_temp(opAllocObj->_opr);
bobv@2036	597	}
duke@435	598	if (opAllocObj->_tmp1->is_valid()) do_temp(opAllocObj->_tmp1);
duke@435	599	if (opAllocObj->_tmp2->is_valid()) do_temp(opAllocObj->_tmp2);
duke@435	600	if (opAllocObj->_tmp3->is_valid()) do_temp(opAllocObj->_tmp3);
duke@435	601	if (opAllocObj->_tmp4->is_valid()) do_temp(opAllocObj->_tmp4);
duke@435	602	if (opAllocObj->_result->is_valid()) do_output(opAllocObj->_result);
duke@435	603	do_stub(opAllocObj->_stub);
duke@435	604	break;
duke@435	605	}
duke@435	606
duke@435	607
duke@435	608	// LIR_OpRoundFP;
duke@435	609	case lir_roundfp: {
duke@435	610	assert(op->as_OpRoundFP() != NULL, "must be");
duke@435	611	LIR_OpRoundFP* opRoundFP = (LIR_OpRoundFP*)op;
duke@435	612
duke@435	613	assert(op->_info == NULL, "info not used by this instruction");
duke@435	614	assert(opRoundFP->_tmp->is_illegal(), "not used");
duke@435	615	do_input(opRoundFP->_opr);
duke@435	616	do_output(opRoundFP->_result);
duke@435	617
duke@435	618	break;
duke@435	619	}
duke@435	620
duke@435	621
duke@435	622	// LIR_Op2
duke@435	623	case lir_cmp:
duke@435	624	case lir_cmp_l2i:
duke@435	625	case lir_ucmp_fd2i:
duke@435	626	case lir_cmp_fd2i:
duke@435	627	case lir_add:
duke@435	628	case lir_sub:
duke@435	629	case lir_mul:
duke@435	630	case lir_div:
duke@435	631	case lir_rem:
duke@435	632	case lir_sqrt:
duke@435	633	case lir_abs:
duke@435	634	case lir_logic_and:
duke@435	635	case lir_logic_or:
duke@435	636	case lir_logic_xor:
duke@435	637	case lir_shl:
duke@435	638	case lir_shr:
duke@435	639	case lir_ushr:
roland@4106	640	case lir_xadd:
roland@4106	641	case lir_xchg:
roland@4860	642	case lir_assert:
duke@435	643	{
duke@435	644	assert(op->as_Op2() != NULL, "must be");
duke@435	645	LIR_Op2* op2 = (LIR_Op2*)op;
roland@3787	646	assert(op2->_tmp2->is_illegal() && op2->_tmp3->is_illegal() &&
roland@3787	647	op2->_tmp4->is_illegal() && op2->_tmp5->is_illegal(), "not used");
duke@435	648
duke@435	649	if (op2->_info) do_info(op2->_info);
duke@435	650	if (op2->_opr1->is_valid()) do_input(op2->_opr1);
duke@435	651	if (op2->_opr2->is_valid()) do_input(op2->_opr2);
roland@3787	652	if (op2->_tmp1->is_valid()) do_temp(op2->_tmp1);
duke@435	653	if (op2->_result->is_valid()) do_output(op2->_result);
roland@4106	654	if (op->code() == lir_xchg || op->code() == lir_xadd) {
roland@4106	655	// on ARM and PPC, return value is loaded first so could
roland@4106	656	// destroy inputs. On other platforms that implement those
roland@4106	657	// (x86, sparc), the extra constrainsts are harmless.
roland@4106	658	if (op2->_opr1->is_valid()) do_temp(op2->_opr1);
roland@4106	659	if (op2->_opr2->is_valid()) do_temp(op2->_opr2);
roland@4106	660	}
duke@435	661
duke@435	662	break;
duke@435	663	}
duke@435	664
duke@435	665	// special handling for cmove: right input operand must not be equal
duke@435	666	// to the result operand, otherwise the backend fails
duke@435	667	case lir_cmove:
duke@435	668	{
duke@435	669	assert(op->as_Op2() != NULL, "must be");
duke@435	670	LIR_Op2* op2 = (LIR_Op2*)op;
duke@435	671
roland@3787	672	assert(op2->_info == NULL && op2->_tmp1->is_illegal() && op2->_tmp2->is_illegal() &&
roland@3787	673	op2->_tmp3->is_illegal() && op2->_tmp4->is_illegal() && op2->_tmp5->is_illegal(), "not used");
duke@435	674	assert(op2->_opr1->is_valid() && op2->_opr2->is_valid() && op2->_result->is_valid(), "used");
duke@435	675
duke@435	676	do_input(op2->_opr1);
duke@435	677	do_input(op2->_opr2);
duke@435	678	do_temp(op2->_opr2);
duke@435	679	do_output(op2->_result);
duke@435	680
duke@435	681	break;
duke@435	682	}
duke@435	683
duke@435	684	// vspecial handling for strict operations: register input operands
duke@435	685	// as temp to guarantee that they do not overlap with other
duke@435	686	// registers
duke@435	687	case lir_mul_strictfp:
duke@435	688	case lir_div_strictfp:
duke@435	689	{
duke@435	690	assert(op->as_Op2() != NULL, "must be");
duke@435	691	LIR_Op2* op2 = (LIR_Op2*)op;
duke@435	692
duke@435	693	assert(op2->_info == NULL, "not used");
duke@435	694	assert(op2->_opr1->is_valid(), "used");
duke@435	695	assert(op2->_opr2->is_valid(), "used");
duke@435	696	assert(op2->_result->is_valid(), "used");
roland@3787	697	assert(op2->_tmp2->is_illegal() && op2->_tmp3->is_illegal() &&
roland@3787	698	op2->_tmp4->is_illegal() && op2->_tmp5->is_illegal(), "not used");
duke@435	699
duke@435	700	do_input(op2->_opr1); do_temp(op2->_opr1);
duke@435	701	do_input(op2->_opr2); do_temp(op2->_opr2);
roland@3787	702	if (op2->_tmp1->is_valid()) do_temp(op2->_tmp1);
duke@435	703	do_output(op2->_result);
duke@435	704
duke@435	705	break;
duke@435	706	}
duke@435	707
never@1813	708	case lir_throw: {
duke@435	709	assert(op->as_Op2() != NULL, "must be");
duke@435	710	LIR_Op2* op2 = (LIR_Op2*)op;
duke@435	711
duke@435	712	if (op2->_info) do_info(op2->_info);
duke@435	713	if (op2->_opr1->is_valid()) do_temp(op2->_opr1);
duke@435	714	if (op2->_opr2->is_valid()) do_input(op2->_opr2); // exception object is input parameter
duke@435	715	assert(op2->_result->is_illegal(), "no result");
roland@3787	716	assert(op2->_tmp2->is_illegal() && op2->_tmp3->is_illegal() &&
roland@3787	717	op2->_tmp4->is_illegal() && op2->_tmp5->is_illegal(), "not used");
duke@435	718
duke@435	719	break;
duke@435	720	}
duke@435	721
never@1813	722	case lir_unwind: {
never@1813	723	assert(op->as_Op1() != NULL, "must be");
never@1813	724	LIR_Op1* op1 = (LIR_Op1*)op;
never@1813	725
never@1813	726	assert(op1->_info == NULL, "no info");
never@1813	727	assert(op1->_opr->is_valid(), "exception oop"); do_input(op1->_opr);
never@1813	728	assert(op1->_result->is_illegal(), "no result");
never@1813	729
never@1813	730	break;
never@1813	731	}
never@1813	732
duke@435	733
duke@435	734	case lir_tan:
duke@435	735	case lir_sin:
never@1388	736	case lir_cos:
never@1388	737	case lir_log:
roland@3787	738	case lir_log10:
roland@3787	739	case lir_exp: {
duke@435	740	assert(op->as_Op2() != NULL, "must be");
duke@435	741	LIR_Op2* op2 = (LIR_Op2*)op;
duke@435	742
never@1388	743	// On x86 tan/sin/cos need two temporary fpu stack slots and
never@1388	744	// log/log10 need one so handle opr2 and tmp as temp inputs.
never@1388	745	// Register input operand as temp to guarantee that it doesn't
never@1388	746	// overlap with the input.
duke@435	747	assert(op2->_info == NULL, "not used");
roland@3787	748	assert(op2->_tmp5->is_illegal(), "not used");
roland@3787	749	assert(op2->_tmp2->is_valid() == (op->code() == lir_exp), "not used");
roland@3787	750	assert(op2->_tmp3->is_valid() == (op->code() == lir_exp), "not used");
roland@3787	751	assert(op2->_tmp4->is_valid() == (op->code() == lir_exp), "not used");
duke@435	752	assert(op2->_opr1->is_valid(), "used");
duke@435	753	do_input(op2->_opr1); do_temp(op2->_opr1);
duke@435	754
duke@435	755	if (op2->_opr2->is_valid()) do_temp(op2->_opr2);
roland@3787	756	if (op2->_tmp1->is_valid()) do_temp(op2->_tmp1);
roland@3787	757	if (op2->_tmp2->is_valid()) do_temp(op2->_tmp2);
roland@3787	758	if (op2->_tmp3->is_valid()) do_temp(op2->_tmp3);
roland@3787	759	if (op2->_tmp4->is_valid()) do_temp(op2->_tmp4);
duke@435	760	if (op2->_result->is_valid()) do_output(op2->_result);
duke@435	761
duke@435	762	break;
duke@435	763	}
duke@435	764
roland@3787	765	case lir_pow: {
roland@3787	766	assert(op->as_Op2() != NULL, "must be");
roland@3787	767	LIR_Op2* op2 = (LIR_Op2*)op;
roland@3787	768
roland@3787	769	// On x86 pow needs two temporary fpu stack slots: tmp1 and
roland@3787	770	// tmp2. Register input operands as temps to guarantee that it
roland@3787	771	// doesn't overlap with the temporary slots.
roland@3787	772	assert(op2->_info == NULL, "not used");
roland@3787	773	assert(op2->_opr1->is_valid() && op2->_opr2->is_valid(), "used");
roland@3787	774	assert(op2->_tmp1->is_valid() && op2->_tmp2->is_valid() && op2->_tmp3->is_valid()
roland@3787	775	&& op2->_tmp4->is_valid() && op2->_tmp5->is_valid(), "used");
roland@3787	776	assert(op2->_result->is_valid(), "used");
roland@3787	777
roland@3787	778	do_input(op2->_opr1); do_temp(op2->_opr1);
roland@3787	779	do_input(op2->_opr2); do_temp(op2->_opr2);
roland@3787	780	do_temp(op2->_tmp1);
roland@3787	781	do_temp(op2->_tmp2);
roland@3787	782	do_temp(op2->_tmp3);
roland@3787	783	do_temp(op2->_tmp4);
roland@3787	784	do_temp(op2->_tmp5);
roland@3787	785	do_output(op2->_result);
roland@3787	786
roland@3787	787	break;
roland@3787	788	}
duke@435	789
duke@435	790	// LIR_Op3
duke@435	791	case lir_idiv:
duke@435	792	case lir_irem: {
duke@435	793	assert(op->as_Op3() != NULL, "must be");
duke@435	794	LIR_Op3* op3= (LIR_Op3*)op;
duke@435	795
duke@435	796	if (op3->_info) do_info(op3->_info);
duke@435	797	if (op3->_opr1->is_valid()) do_input(op3->_opr1);
duke@435	798
duke@435	799	// second operand is input and temp, so ensure that second operand
duke@435	800	// and third operand get not the same register
duke@435	801	if (op3->_opr2->is_valid()) do_input(op3->_opr2);
duke@435	802	if (op3->_opr2->is_valid()) do_temp(op3->_opr2);
duke@435	803	if (op3->_opr3->is_valid()) do_temp(op3->_opr3);
duke@435	804
duke@435	805	if (op3->_result->is_valid()) do_output(op3->_result);
duke@435	806
duke@435	807	break;
duke@435	808	}
duke@435	809
duke@435	810
duke@435	811	// LIR_OpJavaCall
duke@435	812	case lir_static_call:
duke@435	813	case lir_optvirtual_call:
duke@435	814	case lir_icvirtual_call:
twisti@1730	815	case lir_virtual_call:
twisti@1730	816	case lir_dynamic_call: {
twisti@1730	817	LIR_OpJavaCall* opJavaCall = op->as_OpJavaCall();
twisti@1730	818	assert(opJavaCall != NULL, "must be");
duke@435	819
duke@435	820	if (opJavaCall->_receiver->is_valid()) do_input(opJavaCall->_receiver);
duke@435	821
duke@435	822	// only visit register parameters
duke@435	823	int n = opJavaCall->_arguments->length();
bpittore@4625	824	for (int i = opJavaCall->_receiver->is_valid() ? 1 : 0; i < n; i++) {
duke@435	825	if (!opJavaCall->_arguments->at(i)->is_pointer()) {
duke@435	826	do_input(*opJavaCall->_arguments->adr_at(i));
duke@435	827	}
duke@435	828	}
duke@435	829
duke@435	830	if (opJavaCall->_info) do_info(opJavaCall->_info);
twisti@1919	831	if (opJavaCall->is_method_handle_invoke()) {
twisti@1919	832	opJavaCall->_method_handle_invoke_SP_save_opr = FrameMap::method_handle_invoke_SP_save_opr();
twisti@1919	833	do_temp(opJavaCall->_method_handle_invoke_SP_save_opr);
twisti@1919	834	}
duke@435	835	do_call();
duke@435	836	if (opJavaCall->_result->is_valid()) do_output(opJavaCall->_result);
duke@435	837
duke@435	838	break;
duke@435	839	}
duke@435	840
duke@435	841
duke@435	842	// LIR_OpRTCall
duke@435	843	case lir_rtcall: {
duke@435	844	assert(op->as_OpRTCall() != NULL, "must be");
duke@435	845	LIR_OpRTCall* opRTCall = (LIR_OpRTCall*)op;
duke@435	846
duke@435	847	// only visit register parameters
duke@435	848	int n = opRTCall->_arguments->length();
duke@435	849	for (int i = 0; i < n; i++) {
duke@435	850	if (!opRTCall->_arguments->at(i)->is_pointer()) {
duke@435	851	do_input(*opRTCall->_arguments->adr_at(i));
duke@435	852	}
duke@435	853	}
duke@435	854	if (opRTCall->_info) do_info(opRTCall->_info);
duke@435	855	if (opRTCall->_tmp->is_valid()) do_temp(opRTCall->_tmp);
duke@435	856	do_call();
duke@435	857	if (opRTCall->_result->is_valid()) do_output(opRTCall->_result);
duke@435	858
duke@435	859	break;
duke@435	860	}
duke@435	861
duke@435	862
duke@435	863	// LIR_OpArrayCopy
duke@435	864	case lir_arraycopy: {
duke@435	865	assert(op->as_OpArrayCopy() != NULL, "must be");
duke@435	866	LIR_OpArrayCopy* opArrayCopy = (LIR_OpArrayCopy*)op;
duke@435	867
duke@435	868	assert(opArrayCopy->_result->is_illegal(), "unused");
duke@435	869	assert(opArrayCopy->_src->is_valid(), "used"); do_input(opArrayCopy->_src); do_temp(opArrayCopy->_src);
duke@435	870	assert(opArrayCopy->_src_pos->is_valid(), "used"); do_input(opArrayCopy->_src_pos); do_temp(opArrayCopy->_src_pos);
duke@435	871	assert(opArrayCopy->_dst->is_valid(), "used"); do_input(opArrayCopy->_dst); do_temp(opArrayCopy->_dst);
duke@435	872	assert(opArrayCopy->_dst_pos->is_valid(), "used"); do_input(opArrayCopy->_dst_pos); do_temp(opArrayCopy->_dst_pos);
duke@435	873	assert(opArrayCopy->_length->is_valid(), "used"); do_input(opArrayCopy->_length); do_temp(opArrayCopy->_length);
duke@435	874	assert(opArrayCopy->_tmp->is_valid(), "used"); do_temp(opArrayCopy->_tmp);
duke@435	875	if (opArrayCopy->_info) do_info(opArrayCopy->_info);
duke@435	876
duke@435	877	// the implementation of arraycopy always has a call into the runtime
duke@435	878	do_call();
duke@435	879
duke@435	880	break;
duke@435	881	}
duke@435	882
duke@435	883
drchase@5353	884	// LIR_OpUpdateCRC32
drchase@5353	885	case lir_updatecrc32: {
drchase@5353	886	assert(op->as_OpUpdateCRC32() != NULL, "must be");
drchase@5353	887	LIR_OpUpdateCRC32* opUp = (LIR_OpUpdateCRC32*)op;
drchase@5353	888
drchase@5353	889	assert(opUp->_crc->is_valid(), "used"); do_input(opUp->_crc); do_temp(opUp->_crc);
drchase@5353	890	assert(opUp->_val->is_valid(), "used"); do_input(opUp->_val); do_temp(opUp->_val);
drchase@5353	891	assert(opUp->_result->is_valid(), "used"); do_output(opUp->_result);
drchase@5353	892	assert(opUp->_info == NULL, "no info for LIR_OpUpdateCRC32");
drchase@5353	893
drchase@5353	894	break;
drchase@5353	895	}
drchase@5353	896
drchase@5353	897
duke@435	898	// LIR_OpLock
duke@435	899	case lir_lock:
duke@435	900	case lir_unlock: {
duke@435	901	assert(op->as_OpLock() != NULL, "must be");
duke@435	902	LIR_OpLock* opLock = (LIR_OpLock*)op;
duke@435	903
duke@435	904	if (opLock->_info) do_info(opLock->_info);
duke@435	905
duke@435	906	// TODO: check if these operands really have to be temp
duke@435	907	// (or if input is sufficient). This may have influence on the oop map!
duke@435	908	assert(opLock->_lock->is_valid(), "used"); do_temp(opLock->_lock);
duke@435	909	assert(opLock->_hdr->is_valid(), "used"); do_temp(opLock->_hdr);
duke@435	910	assert(opLock->_obj->is_valid(), "used"); do_temp(opLock->_obj);
duke@435	911
duke@435	912	if (opLock->_scratch->is_valid()) do_temp(opLock->_scratch);
duke@435	913	assert(opLock->_result->is_illegal(), "unused");
duke@435	914
duke@435	915	do_stub(opLock->_stub);
duke@435	916
duke@435	917	break;
duke@435	918	}
duke@435	919
duke@435	920
duke@435	921	// LIR_OpDelay
duke@435	922	case lir_delay_slot: {
duke@435	923	assert(op->as_OpDelay() != NULL, "must be");
duke@435	924	LIR_OpDelay* opDelay = (LIR_OpDelay*)op;
duke@435	925
duke@435	926	visit(opDelay->delay_op());
duke@435	927	break;
duke@435	928	}
duke@435	929
duke@435	930	// LIR_OpTypeCheck
duke@435	931	case lir_instanceof:
duke@435	932	case lir_checkcast:
duke@435	933	case lir_store_check: {
duke@435	934	assert(op->as_OpTypeCheck() != NULL, "must be");
duke@435	935	LIR_OpTypeCheck* opTypeCheck = (LIR_OpTypeCheck*)op;
duke@435	936
duke@435	937	if (opTypeCheck->_info_for_exception) do_info(opTypeCheck->_info_for_exception);
duke@435	938	if (opTypeCheck->_info_for_patch) do_info(opTypeCheck->_info_for_patch);
duke@435	939	if (opTypeCheck->_object->is_valid()) do_input(opTypeCheck->_object);
roland@3394	940	if (op->code() == lir_store_check && opTypeCheck->_object->is_valid()) {
roland@3394	941	do_temp(opTypeCheck->_object);
roland@3394	942	}
duke@435	943	if (opTypeCheck->_array->is_valid()) do_input(opTypeCheck->_array);
duke@435	944	if (opTypeCheck->_tmp1->is_valid()) do_temp(opTypeCheck->_tmp1);
duke@435	945	if (opTypeCheck->_tmp2->is_valid()) do_temp(opTypeCheck->_tmp2);
duke@435	946	if (opTypeCheck->_tmp3->is_valid()) do_temp(opTypeCheck->_tmp3);
duke@435	947	if (opTypeCheck->_result->is_valid()) do_output(opTypeCheck->_result);
duke@435	948	do_stub(opTypeCheck->_stub);
duke@435	949	break;
duke@435	950	}
duke@435	951
duke@435	952	// LIR_OpCompareAndSwap
duke@435	953	case lir_cas_long:
duke@435	954	case lir_cas_obj:
duke@435	955	case lir_cas_int: {
duke@435	956	assert(op->as_OpCompareAndSwap() != NULL, "must be");
duke@435	957	LIR_OpCompareAndSwap* opCompareAndSwap = (LIR_OpCompareAndSwap*)op;
duke@435	958
bobv@2036	959	assert(opCompareAndSwap->_addr->is_valid(), "used");
bobv@2036	960	assert(opCompareAndSwap->_cmp_value->is_valid(), "used");
bobv@2036	961	assert(opCompareAndSwap->_new_value->is_valid(), "used");
duke@435	962	if (opCompareAndSwap->_info) do_info(opCompareAndSwap->_info);
bobv@2036	963	do_input(opCompareAndSwap->_addr);
bobv@2036	964	do_temp(opCompareAndSwap->_addr);
bobv@2036	965	do_input(opCompareAndSwap->_cmp_value);
bobv@2036	966	do_temp(opCompareAndSwap->_cmp_value);
bobv@2036	967	do_input(opCompareAndSwap->_new_value);
bobv@2036	968	do_temp(opCompareAndSwap->_new_value);
duke@435	969	if (opCompareAndSwap->_tmp1->is_valid()) do_temp(opCompareAndSwap->_tmp1);
duke@435	970	if (opCompareAndSwap->_tmp2->is_valid()) do_temp(opCompareAndSwap->_tmp2);
duke@435	971	if (opCompareAndSwap->_result->is_valid()) do_output(opCompareAndSwap->_result);
duke@435	972
duke@435	973	break;
duke@435	974	}
duke@435	975
duke@435	976
duke@435	977	// LIR_OpAllocArray;
duke@435	978	case lir_alloc_array: {
duke@435	979	assert(op->as_OpAllocArray() != NULL, "must be");
duke@435	980	LIR_OpAllocArray* opAllocArray = (LIR_OpAllocArray*)op;
duke@435	981
duke@435	982	if (opAllocArray->_info) do_info(opAllocArray->_info);
duke@435	983	if (opAllocArray->_klass->is_valid()) do_input(opAllocArray->_klass); do_temp(opAllocArray->_klass);
duke@435	984	if (opAllocArray->_len->is_valid()) do_input(opAllocArray->_len); do_temp(opAllocArray->_len);
duke@435	985	if (opAllocArray->_tmp1->is_valid()) do_temp(opAllocArray->_tmp1);
duke@435	986	if (opAllocArray->_tmp2->is_valid()) do_temp(opAllocArray->_tmp2);
duke@435	987	if (opAllocArray->_tmp3->is_valid()) do_temp(opAllocArray->_tmp3);
duke@435	988	if (opAllocArray->_tmp4->is_valid()) do_temp(opAllocArray->_tmp4);
duke@435	989	if (opAllocArray->_result->is_valid()) do_output(opAllocArray->_result);
duke@435	990	do_stub(opAllocArray->_stub);
duke@435	991	break;
duke@435	992	}
duke@435	993
duke@435	994	// LIR_OpProfileCall:
duke@435	995	case lir_profile_call: {
duke@435	996	assert(op->as_OpProfileCall() != NULL, "must be");
duke@435	997	LIR_OpProfileCall* opProfileCall = (LIR_OpProfileCall*)op;
duke@435	998
duke@435	999	if (opProfileCall->_recv->is_valid()) do_temp(opProfileCall->_recv);
duke@435	1000	assert(opProfileCall->_mdo->is_valid(), "used"); do_temp(opProfileCall->_mdo);
duke@435	1001	assert(opProfileCall->_tmp1->is_valid(), "used"); do_temp(opProfileCall->_tmp1);
duke@435	1002	break;
duke@435	1003	}
roland@5914	1004
roland@5914	1005	// LIR_OpProfileType:
roland@5914	1006	case lir_profile_type: {
roland@5914	1007	assert(op->as_OpProfileType() != NULL, "must be");
roland@5914	1008	LIR_OpProfileType* opProfileType = (LIR_OpProfileType*)op;
roland@5914	1009
roland@5914	1010	do_input(opProfileType->_mdp); do_temp(opProfileType->_mdp);
roland@5914	1011	do_input(opProfileType->_obj);
roland@5914	1012	do_temp(opProfileType->_tmp);
roland@5914	1013	break;
roland@5914	1014	}
duke@435	1015	default:
duke@435	1016	ShouldNotReachHere();
duke@435	1017	}
duke@435	1018	}
duke@435	1019
duke@435	1020
duke@435	1021	void LIR_OpVisitState::do_stub(CodeStub* stub) {
duke@435	1022	if (stub != NULL) {
duke@435	1023	stub->visit(this);
duke@435	1024	}
duke@435	1025	}
duke@435	1026
duke@435	1027	XHandlers* LIR_OpVisitState::all_xhandler() {
duke@435	1028	XHandlers* result = NULL;
duke@435	1029
duke@435	1030	int i;
duke@435	1031	for (i = 0; i < info_count(); i++) {
duke@435	1032	if (info_at(i)->exception_handlers() != NULL) {
duke@435	1033	result = info_at(i)->exception_handlers();
duke@435	1034	break;
duke@435	1035	}
duke@435	1036	}
duke@435	1037
duke@435	1038	#ifdef ASSERT
duke@435	1039	for (i = 0; i < info_count(); i++) {
duke@435	1040	assert(info_at(i)->exception_handlers() == NULL ||
duke@435	1041	info_at(i)->exception_handlers() == result,
duke@435	1042	"only one xhandler list allowed per LIR-operation");
duke@435	1043	}
duke@435	1044	#endif
duke@435	1045
duke@435	1046	if (result != NULL) {
duke@435	1047	return result;
duke@435	1048	} else {
duke@435	1049	return new XHandlers();
duke@435	1050	}
duke@435	1051
duke@435	1052	return result;
duke@435	1053	}
duke@435	1054
duke@435	1055
duke@435	1056	#ifdef ASSERT
duke@435	1057	bool LIR_OpVisitState::no_operands(LIR_Op* op) {
duke@435	1058	visit(op);
duke@435	1059
duke@435	1060	return opr_count(inputMode) == 0 &&
duke@435	1061	opr_count(outputMode) == 0 &&
duke@435	1062	opr_count(tempMode) == 0 &&
duke@435	1063	info_count() == 0 &&
duke@435	1064	!has_call() &&
duke@435	1065	!has_slow_case();
duke@435	1066	}
duke@435	1067	#endif
duke@435	1068
duke@435	1069	//---------------------------------------------------
duke@435	1070
duke@435	1071
duke@435	1072	void LIR_OpJavaCall::emit_code(LIR_Assembler* masm) {
duke@435	1073	masm->emit_call(this);
duke@435	1074	}
duke@435	1075
duke@435	1076	void LIR_OpRTCall::emit_code(LIR_Assembler* masm) {
duke@435	1077	masm->emit_rtcall(this);
duke@435	1078	}
duke@435	1079
duke@435	1080	void LIR_OpLabel::emit_code(LIR_Assembler* masm) {
duke@435	1081	masm->emit_opLabel(this);
duke@435	1082	}
duke@435	1083
duke@435	1084	void LIR_OpArrayCopy::emit_code(LIR_Assembler* masm) {
duke@435	1085	masm->emit_arraycopy(this);
neliasso@6688	1086	masm->append_code_stub(stub());
duke@435	1087	}
duke@435	1088
drchase@5353	1089	void LIR_OpUpdateCRC32::emit_code(LIR_Assembler* masm) {
drchase@5353	1090	masm->emit_updatecrc32(this);
drchase@5353	1091	}
drchase@5353	1092
duke@435	1093	void LIR_Op0::emit_code(LIR_Assembler* masm) {
duke@435	1094	masm->emit_op0(this);
duke@435	1095	}
duke@435	1096
duke@435	1097	void LIR_Op1::emit_code(LIR_Assembler* masm) {
duke@435	1098	masm->emit_op1(this);
duke@435	1099	}
duke@435	1100
duke@435	1101	void LIR_OpAllocObj::emit_code(LIR_Assembler* masm) {
duke@435	1102	masm->emit_alloc_obj(this);
neliasso@6688	1103	masm->append_code_stub(stub());
duke@435	1104	}
duke@435	1105
duke@435	1106	void LIR_OpBranch::emit_code(LIR_Assembler* masm) {
duke@435	1107	masm->emit_opBranch(this);
duke@435	1108	if (stub()) {
neliasso@6688	1109	masm->append_code_stub(stub());
duke@435	1110	}
duke@435	1111	}
duke@435	1112
duke@435	1113	void LIR_OpConvert::emit_code(LIR_Assembler* masm) {
duke@435	1114	masm->emit_opConvert(this);
duke@435	1115	if (stub() != NULL) {
neliasso@6688	1116	masm->append_code_stub(stub());
duke@435	1117	}
duke@435	1118	}
duke@435	1119
duke@435	1120	void LIR_Op2::emit_code(LIR_Assembler* masm) {
duke@435	1121	masm->emit_op2(this);
duke@435	1122	}
duke@435	1123
duke@435	1124	void LIR_OpAllocArray::emit_code(LIR_Assembler* masm) {
duke@435	1125	masm->emit_alloc_array(this);
neliasso@6688	1126	masm->append_code_stub(stub());
duke@435	1127	}
duke@435	1128
duke@435	1129	void LIR_OpTypeCheck::emit_code(LIR_Assembler* masm) {
iveresov@2146	1130	masm->emit_opTypeCheck(this);
duke@435	1131	if (stub()) {
neliasso@6688	1132	masm->append_code_stub(stub());
duke@435	1133	}
duke@435	1134	}
duke@435	1135
duke@435	1136	void LIR_OpCompareAndSwap::emit_code(LIR_Assembler* masm) {
duke@435	1137	masm->emit_compare_and_swap(this);
duke@435	1138	}
duke@435	1139
duke@435	1140	void LIR_Op3::emit_code(LIR_Assembler* masm) {
duke@435	1141	masm->emit_op3(this);
duke@435	1142	}
duke@435	1143
duke@435	1144	void LIR_OpLock::emit_code(LIR_Assembler* masm) {
duke@435	1145	masm->emit_lock(this);
duke@435	1146	if (stub()) {
neliasso@6688	1147	masm->append_code_stub(stub());
duke@435	1148	}
duke@435	1149	}
duke@435	1150
roland@4860	1151	#ifdef ASSERT
roland@4860	1152	void LIR_OpAssert::emit_code(LIR_Assembler* masm) {
roland@4860	1153	masm->emit_assert(this);
roland@4860	1154	}
roland@4860	1155	#endif
duke@435	1156
duke@435	1157	void LIR_OpDelay::emit_code(LIR_Assembler* masm) {
duke@435	1158	masm->emit_delay(this);
duke@435	1159	}
duke@435	1160
duke@435	1161	void LIR_OpProfileCall::emit_code(LIR_Assembler* masm) {
duke@435	1162	masm->emit_profile_call(this);
duke@435	1163	}
duke@435	1164
roland@5914	1165	void LIR_OpProfileType::emit_code(LIR_Assembler* masm) {
roland@5914	1166	masm->emit_profile_type(this);
roland@5914	1167	}
roland@5914	1168
duke@435	1169	// LIR_List
duke@435	1170	LIR_List::LIR_List(Compilation* compilation, BlockBegin* block)
duke@435	1171	: _operations(8)
duke@435	1172	, _compilation(compilation)
duke@435	1173	#ifndef PRODUCT
duke@435	1174	, _block(block)
duke@435	1175	#endif
duke@435	1176	#ifdef ASSERT
duke@435	1177	, _file(NULL)
duke@435	1178	, _line(0)
duke@435	1179	#endif
duke@435	1180	{ }
duke@435	1181
duke@435	1182
duke@435	1183	#ifdef ASSERT
duke@435	1184	void LIR_List::set_file_and_line(const char * file, int line) {
duke@435	1185	const char * f = strrchr(file, '/');
duke@435	1186	if (f == NULL) f = strrchr(file, '\\');
duke@435	1187	if (f == NULL) {
duke@435	1188	f = file;
duke@435	1189	} else {
duke@435	1190	f++;
duke@435	1191	}
duke@435	1192	_file = f;
duke@435	1193	_line = line;
duke@435	1194	}
duke@435	1195	#endif
duke@435	1196
duke@435	1197
duke@435	1198	void LIR_List::append(LIR_InsertionBuffer* buffer) {
duke@435	1199	assert(this == buffer->lir_list(), "wrong lir list");
duke@435	1200	const int n = _operations.length();
duke@435	1201
duke@435	1202	if (buffer->number_of_ops() > 0) {
duke@435	1203	// increase size of instructions list
duke@435	1204	_operations.at_grow(n + buffer->number_of_ops() - 1, NULL);
duke@435	1205	// insert ops from buffer into instructions list
duke@435	1206	int op_index = buffer->number_of_ops() - 1;
duke@435	1207	int ip_index = buffer->number_of_insertion_points() - 1;
duke@435	1208	int from_index = n - 1;
duke@435	1209	int to_index = _operations.length() - 1;
duke@435	1210	for (; ip_index >= 0; ip_index --) {
duke@435	1211	int index = buffer->index_at(ip_index);
duke@435	1212	// make room after insertion point
duke@435	1213	while (index < from_index) {
duke@435	1214	_operations.at_put(to_index --, _operations.at(from_index --));
duke@435	1215	}
duke@435	1216	// insert ops from buffer
duke@435	1217	for (int i = buffer->count_at(ip_index); i > 0; i --) {
duke@435	1218	_operations.at_put(to_index --, buffer->op_at(op_index --));
duke@435	1219	}
duke@435	1220	}
duke@435	1221	}
duke@435	1222
duke@435	1223	buffer->finish();
duke@435	1224	}
duke@435	1225
duke@435	1226
duke@435	1227	void LIR_List::oop2reg_patch(jobject o, LIR_Opr reg, CodeEmitInfo* info) {
roland@4051	1228	assert(reg->type() == T_OBJECT, "bad reg");
duke@435	1229	append(new LIR_Op1(lir_move, LIR_OprFact::oopConst(o), reg, T_OBJECT, lir_patch_normal, info));
duke@435	1230	}
duke@435	1231
coleenp@4037	1232	void LIR_List::klass2reg_patch(Metadata* o, LIR_Opr reg, CodeEmitInfo* info) {
roland@4051	1233	assert(reg->type() == T_METADATA, "bad reg");
coleenp@4037	1234	append(new LIR_Op1(lir_move, LIR_OprFact::metadataConst(o), reg, T_METADATA, lir_patch_normal, info));
coleenp@4037	1235	}
duke@435	1236
duke@435	1237	void LIR_List::load(LIR_Address* addr, LIR_Opr src, CodeEmitInfo* info, LIR_PatchCode patch_code) {
duke@435	1238	append(new LIR_Op1(
duke@435	1239	lir_move,
duke@435	1240	LIR_OprFact::address(addr),
duke@435	1241	src,
duke@435	1242	addr->type(),
duke@435	1243	patch_code,
duke@435	1244	info));
duke@435	1245	}
duke@435	1246
duke@435	1247
duke@435	1248	void LIR_List::volatile_load_mem_reg(LIR_Address* address, LIR_Opr dst, CodeEmitInfo* info, LIR_PatchCode patch_code) {
duke@435	1249	append(new LIR_Op1(
duke@435	1250	lir_move,
duke@435	1251	LIR_OprFact::address(address),
duke@435	1252	dst,
duke@435	1253	address->type(),
duke@435	1254	patch_code,
duke@435	1255	info, lir_move_volatile));
duke@435	1256	}
duke@435	1257
duke@435	1258	void LIR_List::volatile_load_unsafe_reg(LIR_Opr base, LIR_Opr offset, LIR_Opr dst, BasicType type, CodeEmitInfo* info, LIR_PatchCode patch_code) {
duke@435	1259	append(new LIR_Op1(
duke@435	1260	lir_move,
duke@435	1261	LIR_OprFact::address(new LIR_Address(base, offset, type)),
duke@435	1262	dst,
duke@435	1263	type,
duke@435	1264	patch_code,
duke@435	1265	info, lir_move_volatile));
duke@435	1266	}
duke@435	1267
duke@435	1268
duke@435	1269	void LIR_List::prefetch(LIR_Address* addr, bool is_store) {
duke@435	1270	append(new LIR_Op1(
duke@435	1271	is_store ? lir_prefetchw : lir_prefetchr,
duke@435	1272	LIR_OprFact::address(addr)));
duke@435	1273	}
duke@435	1274
duke@435	1275
duke@435	1276	void LIR_List::store_mem_int(jint v, LIR_Opr base, int offset_in_bytes, BasicType type, CodeEmitInfo* info, LIR_PatchCode patch_code) {
duke@435	1277	append(new LIR_Op1(
duke@435	1278	lir_move,
duke@435	1279	LIR_OprFact::intConst(v),
duke@435	1280	LIR_OprFact::address(new LIR_Address(base, offset_in_bytes, type)),
duke@435	1281	type,
duke@435	1282	patch_code,
duke@435	1283	info));
duke@435	1284	}
duke@435	1285
duke@435	1286
duke@435	1287	void LIR_List::store_mem_oop(jobject o, LIR_Opr base, int offset_in_bytes, BasicType type, CodeEmitInfo* info, LIR_PatchCode patch_code) {
duke@435	1288	append(new LIR_Op1(
duke@435	1289	lir_move,
duke@435	1290	LIR_OprFact::oopConst(o),
duke@435	1291	LIR_OprFact::address(new LIR_Address(base, offset_in_bytes, type)),
duke@435	1292	type,
duke@435	1293	patch_code,
duke@435	1294	info));
duke@435	1295	}
duke@435	1296
duke@435	1297
duke@435	1298	void LIR_List::store(LIR_Opr src, LIR_Address* addr, CodeEmitInfo* info, LIR_PatchCode patch_code) {
duke@435	1299	append(new LIR_Op1(
duke@435	1300	lir_move,
duke@435	1301	src,
duke@435	1302	LIR_OprFact::address(addr),
duke@435	1303	addr->type(),
duke@435	1304	patch_code,
duke@435	1305	info));
duke@435	1306	}
duke@435	1307
duke@435	1308
duke@435	1309	void LIR_List::volatile_store_mem_reg(LIR_Opr src, LIR_Address* addr, CodeEmitInfo* info, LIR_PatchCode patch_code) {
duke@435	1310	append(new LIR_Op1(
duke@435	1311	lir_move,
duke@435	1312	src,
duke@435	1313	LIR_OprFact::address(addr),
duke@435	1314	addr->type(),
duke@435	1315	patch_code,
duke@435	1316	info,
duke@435	1317	lir_move_volatile));
duke@435	1318	}
duke@435	1319
duke@435	1320	void LIR_List::volatile_store_unsafe_reg(LIR_Opr src, LIR_Opr base, LIR_Opr offset, BasicType type, CodeEmitInfo* info, LIR_PatchCode patch_code) {
duke@435	1321	append(new LIR_Op1(
duke@435	1322	lir_move,
duke@435	1323	src,
duke@435	1324	LIR_OprFact::address(new LIR_Address(base, offset, type)),
duke@435	1325	type,
duke@435	1326	patch_code,
duke@435	1327	info, lir_move_volatile));
duke@435	1328	}
duke@435	1329
duke@435	1330
duke@435	1331	void LIR_List::idiv(LIR_Opr left, LIR_Opr right, LIR_Opr res, LIR_Opr tmp, CodeEmitInfo* info) {
duke@435	1332	append(new LIR_Op3(
duke@435	1333	lir_idiv,
duke@435	1334	left,
duke@435	1335	right,
duke@435	1336	tmp,
duke@435	1337	res,
duke@435	1338	info));
duke@435	1339	}
duke@435	1340
duke@435	1341
duke@435	1342	void LIR_List::idiv(LIR_Opr left, int right, LIR_Opr res, LIR_Opr tmp, CodeEmitInfo* info) {
duke@435	1343	append(new LIR_Op3(
duke@435	1344	lir_idiv,
duke@435	1345	left,
duke@435	1346	LIR_OprFact::intConst(right),
duke@435	1347	tmp,
duke@435	1348	res,
duke@435	1349	info));
duke@435	1350	}
duke@435	1351
duke@435	1352
duke@435	1353	void LIR_List::irem(LIR_Opr left, LIR_Opr right, LIR_Opr res, LIR_Opr tmp, CodeEmitInfo* info) {
duke@435	1354	append(new LIR_Op3(
duke@435	1355	lir_irem,
duke@435	1356	left,
duke@435	1357	right,
duke@435	1358	tmp,
duke@435	1359	res,
duke@435	1360	info));
duke@435	1361	}
duke@435	1362
duke@435	1363
duke@435	1364	void LIR_List::irem(LIR_Opr left, int right, LIR_Opr res, LIR_Opr tmp, CodeEmitInfo* info) {
duke@435	1365	append(new LIR_Op3(
duke@435	1366	lir_irem,
duke@435	1367	left,
duke@435	1368	LIR_OprFact::intConst(right),
duke@435	1369	tmp,
duke@435	1370	res,
duke@435	1371	info));
duke@435	1372	}
duke@435	1373
duke@435	1374
duke@435	1375	void LIR_List::cmp_mem_int(LIR_Condition condition, LIR_Opr base, int disp, int c, CodeEmitInfo* info) {
duke@435	1376	append(new LIR_Op2(
duke@435	1377	lir_cmp,
duke@435	1378	condition,
duke@435	1379	LIR_OprFact::address(new LIR_Address(base, disp, T_INT)),
duke@435	1380	LIR_OprFact::intConst(c),
duke@435	1381	info));
duke@435	1382	}
duke@435	1383
duke@435	1384
duke@435	1385	void LIR_List::cmp_reg_mem(LIR_Condition condition, LIR_Opr reg, LIR_Address* addr, CodeEmitInfo* info) {
duke@435	1386	append(new LIR_Op2(
duke@435	1387	lir_cmp,
duke@435	1388	condition,
duke@435	1389	reg,
duke@435	1390	LIR_OprFact::address(addr),
duke@435	1391	info));
duke@435	1392	}
duke@435	1393
duke@435	1394	void LIR_List::allocate_object(LIR_Opr dst, LIR_Opr t1, LIR_Opr t2, LIR_Opr t3, LIR_Opr t4,
duke@435	1395	int header_size, int object_size, LIR_Opr klass, bool init_check, CodeStub* stub) {
duke@435	1396	append(new LIR_OpAllocObj(
duke@435	1397	klass,
duke@435	1398	dst,
duke@435	1399	t1,
duke@435	1400	t2,
duke@435	1401	t3,
duke@435	1402	t4,
duke@435	1403	header_size,
duke@435	1404	object_size,
duke@435	1405	init_check,
duke@435	1406	stub));
duke@435	1407	}
duke@435	1408
duke@435	1409	void LIR_List::allocate_array(LIR_Opr dst, LIR_Opr len, LIR_Opr t1,LIR_Opr t2, LIR_Opr t3,LIR_Opr t4, BasicType type, LIR_Opr klass, CodeStub* stub) {
duke@435	1410	append(new LIR_OpAllocArray(
duke@435	1411	klass,
duke@435	1412	len,
duke@435	1413	dst,
duke@435	1414	t1,
duke@435	1415	t2,
duke@435	1416	t3,
duke@435	1417	t4,
duke@435	1418	type,
duke@435	1419	stub));
duke@435	1420	}
duke@435	1421
duke@435	1422	void LIR_List::shift_left(LIR_Opr value, LIR_Opr count, LIR_Opr dst, LIR_Opr tmp) {
duke@435	1423	append(new LIR_Op2(
duke@435	1424	lir_shl,
duke@435	1425	value,
duke@435	1426	count,
duke@435	1427	dst,
duke@435	1428	tmp));
duke@435	1429	}
duke@435	1430
duke@435	1431	void LIR_List::shift_right(LIR_Opr value, LIR_Opr count, LIR_Opr dst, LIR_Opr tmp) {
duke@435	1432	append(new LIR_Op2(
duke@435	1433	lir_shr,
duke@435	1434	value,
duke@435	1435	count,
duke@435	1436	dst,
duke@435	1437	tmp));
duke@435	1438	}
duke@435	1439
duke@435	1440
duke@435	1441	void LIR_List::unsigned_shift_right(LIR_Opr value, LIR_Opr count, LIR_Opr dst, LIR_Opr tmp) {
duke@435	1442	append(new LIR_Op2(
duke@435	1443	lir_ushr,
duke@435	1444	value,
duke@435	1445	count,
duke@435	1446	dst,
duke@435	1447	tmp));
duke@435	1448	}
duke@435	1449
duke@435	1450	void LIR_List::fcmp2int(LIR_Opr left, LIR_Opr right, LIR_Opr dst, bool is_unordered_less) {
duke@435	1451	append(new LIR_Op2(is_unordered_less ? lir_ucmp_fd2i : lir_cmp_fd2i,
duke@435	1452	left,
duke@435	1453	right,
duke@435	1454	dst));
duke@435	1455	}
duke@435	1456
duke@435	1457	void LIR_List::lock_object(LIR_Opr hdr, LIR_Opr obj, LIR_Opr lock, LIR_Opr scratch, CodeStub* stub, CodeEmitInfo* info) {
duke@435	1458	append(new LIR_OpLock(
duke@435	1459	lir_lock,
duke@435	1460	hdr,
duke@435	1461	obj,
duke@435	1462	lock,
duke@435	1463	scratch,
duke@435	1464	stub,
duke@435	1465	info));
duke@435	1466	}
duke@435	1467
bobv@2036	1468	void LIR_List::unlock_object(LIR_Opr hdr, LIR_Opr obj, LIR_Opr lock, LIR_Opr scratch, CodeStub* stub) {
duke@435	1469	append(new LIR_OpLock(
duke@435	1470	lir_unlock,
duke@435	1471	hdr,
duke@435	1472	obj,
duke@435	1473	lock,
bobv@2036	1474	scratch,
duke@435	1475	stub,
duke@435	1476	NULL));
duke@435	1477	}
duke@435	1478
duke@435	1479
duke@435	1480	void check_LIR() {
duke@435	1481	// cannot do the proper checking as PRODUCT and other modes return different results
duke@435	1482	// guarantee(sizeof(LIR_OprDesc) == wordSize, "may not have a v-table");
duke@435	1483	}
duke@435	1484
duke@435	1485
duke@435	1486
duke@435	1487	void LIR_List::checkcast (LIR_Opr result, LIR_Opr object, ciKlass* klass,
duke@435	1488	LIR_Opr tmp1, LIR_Opr tmp2, LIR_Opr tmp3, bool fast_check,
duke@435	1489	CodeEmitInfo* info_for_exception, CodeEmitInfo* info_for_patch, CodeStub* stub,
duke@435	1490	ciMethod* profiled_method, int profiled_bci) {
iveresov@2138	1491	LIR_OpTypeCheck* c = new LIR_OpTypeCheck(lir_checkcast, result, object, klass,
iveresov@2138	1492	tmp1, tmp2, tmp3, fast_check, info_for_exception, info_for_patch, stub);
iveresov@2138	1493	if (profiled_method != NULL) {
iveresov@2138	1494	c->set_profiled_method(profiled_method);
iveresov@2138	1495	c->set_profiled_bci(profiled_bci);
iveresov@2138	1496	c->set_should_profile(true);
iveresov@2138	1497	}
iveresov@2138	1498	append(c);
duke@435	1499	}
duke@435	1500
iveresov@2146	1501	void LIR_List::instanceof(LIR_Opr result, LIR_Opr object, ciKlass* klass, LIR_Opr tmp1, LIR_Opr tmp2, LIR_Opr tmp3, bool fast_check, CodeEmitInfo* info_for_patch, ciMethod* profiled_method, int profiled_bci) {
iveresov@2146	1502	LIR_OpTypeCheck* c = new LIR_OpTypeCheck(lir_instanceof, result, object, klass, tmp1, tmp2, tmp3, fast_check, NULL, info_for_patch, NULL);
iveresov@2146	1503	if (profiled_method != NULL) {
iveresov@2146	1504	c->set_profiled_method(profiled_method);
iveresov@2146	1505	c->set_profiled_bci(profiled_bci);
iveresov@2146	1506	c->set_should_profile(true);
iveresov@2146	1507	}
iveresov@2146	1508	append(c);
duke@435	1509	}
duke@435	1510
duke@435	1511
iveresov@3153	1512	void LIR_List::store_check(LIR_Opr object, LIR_Opr array, LIR_Opr tmp1, LIR_Opr tmp2, LIR_Opr tmp3,
iveresov@3153	1513	CodeEmitInfo* info_for_exception, ciMethod* profiled_method, int profiled_bci) {
iveresov@3153	1514	LIR_OpTypeCheck* c = new LIR_OpTypeCheck(lir_store_check, object, array, tmp1, tmp2, tmp3, info_for_exception);
iveresov@3153	1515	if (profiled_method != NULL) {
iveresov@3153	1516	c->set_profiled_method(profiled_method);
iveresov@3153	1517	c->set_profiled_bci(profiled_bci);
iveresov@3153	1518	c->set_should_profile(true);
iveresov@3153	1519	}
iveresov@3153	1520	append(c);
duke@435	1521	}
duke@435	1522
duke@435	1523
bobv@2036	1524	void LIR_List::cas_long(LIR_Opr addr, LIR_Opr cmp_value, LIR_Opr new_value,
bobv@2036	1525	LIR_Opr t1, LIR_Opr t2, LIR_Opr result) {
bobv@2036	1526	append(new LIR_OpCompareAndSwap(lir_cas_long, addr, cmp_value, new_value, t1, t2, result));
duke@435	1527	}
duke@435	1528
bobv@2036	1529	void LIR_List::cas_obj(LIR_Opr addr, LIR_Opr cmp_value, LIR_Opr new_value,
bobv@2036	1530	LIR_Opr t1, LIR_Opr t2, LIR_Opr result) {
bobv@2036	1531	append(new LIR_OpCompareAndSwap(lir_cas_obj, addr, cmp_value, new_value, t1, t2, result));
duke@435	1532	}
duke@435	1533
bobv@2036	1534	void LIR_List::cas_int(LIR_Opr addr, LIR_Opr cmp_value, LIR_Opr new_value,
bobv@2036	1535	LIR_Opr t1, LIR_Opr t2, LIR_Opr result) {
bobv@2036	1536	append(new LIR_OpCompareAndSwap(lir_cas_int, addr, cmp_value, new_value, t1, t2, result));
duke@435	1537	}
duke@435	1538
duke@435	1539
duke@435	1540	#ifdef PRODUCT
duke@435	1541
duke@435	1542	void print_LIR(BlockList* blocks) {
duke@435	1543	}
duke@435	1544
duke@435	1545	#else
duke@435	1546	// LIR_OprDesc
duke@435	1547	void LIR_OprDesc::print() const {
duke@435	1548	print(tty);
duke@435	1549	}
duke@435	1550
duke@435	1551	void LIR_OprDesc::print(outputStream* out) const {
duke@435	1552	if (is_illegal()) {
duke@435	1553	return;
duke@435	1554	}
duke@435	1555
duke@435	1556	out->print("[");
duke@435	1557	if (is_pointer()) {
duke@435	1558	pointer()->print_value_on(out);
duke@435	1559	} else if (is_single_stack()) {
duke@435	1560	out->print("stack:%d", single_stack_ix());
duke@435	1561	} else if (is_double_stack()) {
duke@435	1562	out->print("dbl_stack:%d",double_stack_ix());
duke@435	1563	} else if (is_virtual()) {
duke@435	1564	out->print("R%d", vreg_number());
duke@435	1565	} else if (is_single_cpu()) {
drchase@6680	1566	out->print("%s", as_register()->name());
duke@435	1567	} else if (is_double_cpu()) {
drchase@6680	1568	out->print("%s", as_register_hi()->name());
drchase@6680	1569	out->print("%s", as_register_lo()->name());
never@739	1570	#if defined(X86)
duke@435	1571	} else if (is_single_xmm()) {
drchase@6680	1572	out->print("%s", as_xmm_float_reg()->name());
duke@435	1573	} else if (is_double_xmm()) {
drchase@6680	1574	out->print("%s", as_xmm_double_reg()->name());
duke@435	1575	} else if (is_single_fpu()) {
duke@435	1576	out->print("fpu%d", fpu_regnr());
duke@435	1577	} else if (is_double_fpu()) {
duke@435	1578	out->print("fpu%d", fpu_regnrLo());
bobv@2036	1579	#elif defined(ARM)
bobv@2036	1580	} else if (is_single_fpu()) {
bobv@2036	1581	out->print("s%d", fpu_regnr());
bobv@2036	1582	} else if (is_double_fpu()) {
bobv@2036	1583	out->print("d%d", fpu_regnrLo() >> 1);
duke@435	1584	#else
duke@435	1585	} else if (is_single_fpu()) {
drchase@6680	1586	out->print("%s", as_float_reg()->name());
duke@435	1587	} else if (is_double_fpu()) {
drchase@6680	1588	out->print("%s", as_double_reg()->name());
duke@435	1589	#endif
duke@435	1590
duke@435	1591	} else if (is_illegal()) {
duke@435	1592	out->print("-");
duke@435	1593	} else {
duke@435	1594	out->print("Unknown Operand");
duke@435	1595	}
duke@435	1596	if (!is_illegal()) {
duke@435	1597	out->print("|%c", type_char());
duke@435	1598	}
duke@435	1599	if (is_register() && is_last_use()) {
duke@435	1600	out->print("(last_use)");
duke@435	1601	}
duke@435	1602	out->print("]");
duke@435	1603	}
duke@435	1604
duke@435	1605
duke@435	1606	// LIR_Address
duke@435	1607	void LIR_Const::print_value_on(outputStream* out) const {
duke@435	1608	switch (type()) {
roland@1732	1609	case T_ADDRESS:out->print("address:%d",as_jint()); break;
duke@435	1610	case T_INT: out->print("int:%d", as_jint()); break;
hseigel@4465	1611	case T_LONG: out->print("lng:" JLONG_FORMAT, as_jlong()); break;
duke@435	1612	case T_FLOAT: out->print("flt:%f", as_jfloat()); break;
duke@435	1613	case T_DOUBLE: out->print("dbl:%f", as_jdouble()); break;
drchase@6680	1614	case T_OBJECT: out->print("obj:" INTPTR_FORMAT, p2i(as_jobject())); break;
drchase@6680	1615	case T_METADATA: out->print("metadata:" INTPTR_FORMAT, p2i(as_metadata()));break;
drchase@6680	1616	default: out->print("%3d:0x" UINT64_FORMAT_X, type(), (uint64_t)as_jlong()); break;
duke@435	1617	}
duke@435	1618	}
duke@435	1619
duke@435	1620	// LIR_Address
duke@435	1621	void LIR_Address::print_value_on(outputStream* out) const {
duke@435	1622	out->print("Base:"); _base->print(out);
duke@435	1623	if (!_index->is_illegal()) {
duke@435	1624	out->print(" Index:"); _index->print(out);
duke@435	1625	switch (scale()) {
duke@435	1626	case times_1: break;
duke@435	1627	case times_2: out->print(" * 2"); break;
duke@435	1628	case times_4: out->print(" * 4"); break;
duke@435	1629	case times_8: out->print(" * 8"); break;
duke@435	1630	}
duke@435	1631	}
drchase@6680	1632	out->print(" Disp: " INTX_FORMAT, _disp);
duke@435	1633	}
duke@435	1634
duke@435	1635	// debug output of block header without InstructionPrinter
duke@435	1636	// (because phi functions are not necessary for LIR)
duke@435	1637	static void print_block(BlockBegin* x) {
duke@435	1638	// print block id
duke@435	1639	BlockEnd* end = x->end();
duke@435	1640	tty->print("B%d ", x->block_id());
duke@435	1641
duke@435	1642	// print flags
duke@435	1643	if (x->is_set(BlockBegin::std_entry_flag)) tty->print("std ");
duke@435	1644	if (x->is_set(BlockBegin::osr_entry_flag)) tty->print("osr ");
duke@435	1645	if (x->is_set(BlockBegin::exception_entry_flag)) tty->print("ex ");
duke@435	1646	if (x->is_set(BlockBegin::subroutine_entry_flag)) tty->print("jsr ");
duke@435	1647	if (x->is_set(BlockBegin::backward_branch_target_flag)) tty->print("bb ");
duke@435	1648	if (x->is_set(BlockBegin::linear_scan_loop_header_flag)) tty->print("lh ");
duke@435	1649	if (x->is_set(BlockBegin::linear_scan_loop_end_flag)) tty->print("le ");
duke@435	1650
duke@435	1651	// print block bci range
roland@2174	1652	tty->print("[%d, %d] ", x->bci(), (end == NULL ? -1 : end->printable_bci()));
duke@435	1653
duke@435	1654	// print predecessors and successors
duke@435	1655	if (x->number_of_preds() > 0) {
duke@435	1656	tty->print("preds: ");
duke@435	1657	for (int i = 0; i < x->number_of_preds(); i ++) {
duke@435	1658	tty->print("B%d ", x->pred_at(i)->block_id());
duke@435	1659	}
duke@435	1660	}
duke@435	1661
duke@435	1662	if (x->number_of_sux() > 0) {
duke@435	1663	tty->print("sux: ");
duke@435	1664	for (int i = 0; i < x->number_of_sux(); i ++) {
duke@435	1665	tty->print("B%d ", x->sux_at(i)->block_id());
duke@435	1666	}
duke@435	1667	}
duke@435	1668
duke@435	1669	// print exception handlers
duke@435	1670	if (x->number_of_exception_handlers() > 0) {
duke@435	1671	tty->print("xhandler: ");
duke@435	1672	for (int i = 0; i < x->number_of_exception_handlers(); i++) {
duke@435	1673	tty->print("B%d ", x->exception_handler_at(i)->block_id());
duke@435	1674	}
duke@435	1675	}
duke@435	1676
duke@435	1677	tty->cr();
duke@435	1678	}
duke@435	1679
duke@435	1680	void print_LIR(BlockList* blocks) {
duke@435	1681	tty->print_cr("LIR:");
duke@435	1682	int i;
duke@435	1683	for (i = 0; i < blocks->length(); i++) {
duke@435	1684	BlockBegin* bb = blocks->at(i);
duke@435	1685	print_block(bb);
duke@435	1686	tty->print("__id_Instruction___________________________________________"); tty->cr();
duke@435	1687	bb->lir()->print_instructions();
duke@435	1688	}
duke@435	1689	}
duke@435	1690
duke@435	1691	void LIR_List::print_instructions() {
duke@435	1692	for (int i = 0; i < _operations.length(); i++) {
duke@435	1693	_operations.at(i)->print(); tty->cr();
duke@435	1694	}
duke@435	1695	tty->cr();
duke@435	1696	}
duke@435	1697
duke@435	1698	// LIR_Ops printing routines
duke@435	1699	// LIR_Op
duke@435	1700	void LIR_Op::print_on(outputStream* out) const {
duke@435	1701	if (id() != -1 || PrintCFGToFile) {
duke@435	1702	out->print("%4d ", id());
duke@435	1703	} else {
duke@435	1704	out->print(" ");
duke@435	1705	}
drchase@6680	1706	out->print("%s ", name());
duke@435	1707	print_instr(out);
roland@2174	1708	if (info() != NULL) out->print(" [bci:%d]", info()->stack()->bci());
duke@435	1709	#ifdef ASSERT
duke@435	1710	if (Verbose && _file != NULL) {
duke@435	1711	out->print(" (%s:%d)", _file, _line);
duke@435	1712	}
duke@435	1713	#endif
duke@435	1714	}
duke@435	1715
duke@435	1716	const char * LIR_Op::name() const {
duke@435	1717	const char* s = NULL;
duke@435	1718	switch(code()) {
duke@435	1719	// LIR_Op0
duke@435	1720	case lir_membar: s = "membar"; break;
duke@435	1721	case lir_membar_acquire: s = "membar_acquire"; break;
duke@435	1722	case lir_membar_release: s = "membar_release"; break;
jiangli@3592	1723	case lir_membar_loadload: s = "membar_loadload"; break;
jiangli@3592	1724	case lir_membar_storestore: s = "membar_storestore"; break;
jiangli@3592	1725	case lir_membar_loadstore: s = "membar_loadstore"; break;
jiangli@3592	1726	case lir_membar_storeload: s = "membar_storeload"; break;
duke@435	1727	case lir_word_align: s = "word_align"; break;
duke@435	1728	case lir_label: s = "label"; break;
duke@435	1729	case lir_nop: s = "nop"; break;
duke@435	1730	case lir_backwardbranch_target: s = "backbranch"; break;
duke@435	1731	case lir_std_entry: s = "std_entry"; break;
duke@435	1732	case lir_osr_entry: s = "osr_entry"; break;
duke@435	1733	case lir_build_frame: s = "build_frm"; break;
duke@435	1734	case lir_fpop_raw: s = "fpop_raw"; break;
duke@435	1735	case lir_24bit_FPU: s = "24bit_FPU"; break;
duke@435	1736	case lir_reset_FPU: s = "reset_FPU"; break;
duke@435	1737	case lir_breakpoint: s = "breakpoint"; break;
duke@435	1738	case lir_get_thread: s = "get_thread"; break;
duke@435	1739	// LIR_Op1
duke@435	1740	case lir_fxch: s = "fxch"; break;
duke@435	1741	case lir_fld: s = "fld"; break;
duke@435	1742	case lir_ffree: s = "ffree"; break;
duke@435	1743	case lir_push: s = "push"; break;
duke@435	1744	case lir_pop: s = "pop"; break;
duke@435	1745	case lir_null_check: s = "null_check"; break;
duke@435	1746	case lir_return: s = "return"; break;
duke@435	1747	case lir_safepoint: s = "safepoint"; break;
duke@435	1748	case lir_neg: s = "neg"; break;
duke@435	1749	case lir_leal: s = "leal"; break;
duke@435	1750	case lir_branch: s = "branch"; break;
duke@435	1751	case lir_cond_float_branch: s = "flt_cond_br"; break;
duke@435	1752	case lir_move: s = "move"; break;
duke@435	1753	case lir_roundfp: s = "roundfp"; break;
duke@435	1754	case lir_rtcall: s = "rtcall"; break;
duke@435	1755	case lir_throw: s = "throw"; break;
duke@435	1756	case lir_unwind: s = "unwind"; break;
duke@435	1757	case lir_convert: s = "convert"; break;
duke@435	1758	case lir_alloc_object: s = "alloc_obj"; break;
duke@435	1759	case lir_monaddr: s = "mon_addr"; break;
iveresov@2138	1760	case lir_pack64: s = "pack64"; break;
iveresov@2138	1761	case lir_unpack64: s = "unpack64"; break;
duke@435	1762	// LIR_Op2
duke@435	1763	case lir_cmp: s = "cmp"; break;
duke@435	1764	case lir_cmp_l2i: s = "cmp_l2i"; break;
duke@435	1765	case lir_ucmp_fd2i: s = "ucomp_fd2i"; break;
duke@435	1766	case lir_cmp_fd2i: s = "comp_fd2i"; break;
duke@435	1767	case lir_cmove: s = "cmove"; break;
duke@435	1768	case lir_add: s = "add"; break;
duke@435	1769	case lir_sub: s = "sub"; break;
duke@435	1770	case lir_mul: s = "mul"; break;
duke@435	1771	case lir_mul_strictfp: s = "mul_strictfp"; break;
duke@435	1772	case lir_div: s = "div"; break;
duke@435	1773	case lir_div_strictfp: s = "div_strictfp"; break;
duke@435	1774	case lir_rem: s = "rem"; break;
duke@435	1775	case lir_abs: s = "abs"; break;
duke@435	1776	case lir_sqrt: s = "sqrt"; break;
duke@435	1777	case lir_sin: s = "sin"; break;
duke@435	1778	case lir_cos: s = "cos"; break;
duke@435	1779	case lir_tan: s = "tan"; break;
duke@435	1780	case lir_log: s = "log"; break;
duke@435	1781	case lir_log10: s = "log10"; break;
roland@3787	1782	case lir_exp: s = "exp"; break;
roland@3787	1783	case lir_pow: s = "pow"; break;
duke@435	1784	case lir_logic_and: s = "logic_and"; break;
duke@435	1785	case lir_logic_or: s = "logic_or"; break;
duke@435	1786	case lir_logic_xor: s = "logic_xor"; break;
duke@435	1787	case lir_shl: s = "shift_left"; break;
duke@435	1788	case lir_shr: s = "shift_right"; break;
duke@435	1789	case lir_ushr: s = "ushift_right"; break;
duke@435	1790	case lir_alloc_array: s = "alloc_array"; break;
roland@4106	1791	case lir_xadd: s = "xadd"; break;
roland@4106	1792	case lir_xchg: s = "xchg"; break;
duke@435	1793	// LIR_Op3
duke@435	1794	case lir_idiv: s = "idiv"; break;
duke@435	1795	case lir_irem: s = "irem"; break;
duke@435	1796	// LIR_OpJavaCall
duke@435	1797	case lir_static_call: s = "static"; break;
duke@435	1798	case lir_optvirtual_call: s = "optvirtual"; break;
duke@435	1799	case lir_icvirtual_call: s = "icvirtual"; break;
duke@435	1800	case lir_virtual_call: s = "virtual"; break;
twisti@1730	1801	case lir_dynamic_call: s = "dynamic"; break;
duke@435	1802	// LIR_OpArrayCopy
duke@435	1803	case lir_arraycopy: s = "arraycopy"; break;
drchase@5353	1804	// LIR_OpUpdateCRC32
drchase@5353	1805	case lir_updatecrc32: s = "updatecrc32"; break;
duke@435	1806	// LIR_OpLock
duke@435	1807	case lir_lock: s = "lock"; break;
duke@435	1808	case lir_unlock: s = "unlock"; break;
duke@435	1809	// LIR_OpDelay
duke@435	1810	case lir_delay_slot: s = "delay"; break;
duke@435	1811	// LIR_OpTypeCheck
duke@435	1812	case lir_instanceof: s = "instanceof"; break;
duke@435	1813	case lir_checkcast: s = "checkcast"; break;
duke@435	1814	case lir_store_check: s = "store_check"; break;
duke@435	1815	// LIR_OpCompareAndSwap
duke@435	1816	case lir_cas_long: s = "cas_long"; break;
duke@435	1817	case lir_cas_obj: s = "cas_obj"; break;
duke@435	1818	case lir_cas_int: s = "cas_int"; break;
duke@435	1819	// LIR_OpProfileCall
duke@435	1820	case lir_profile_call: s = "profile_call"; break;
roland@5914	1821	// LIR_OpProfileType
roland@5914	1822	case lir_profile_type: s = "profile_type"; break;
roland@4860	1823	// LIR_OpAssert
roland@4947	1824	#ifdef ASSERT
roland@4860	1825	case lir_assert: s = "assert"; break;
roland@4947	1826	#endif
duke@435	1827	case lir_none: ShouldNotReachHere();break;
duke@435	1828	default: s = "illegal_op"; break;
duke@435	1829	}
duke@435	1830	return s;
duke@435	1831	}
duke@435	1832
duke@435	1833	// LIR_OpJavaCall
duke@435	1834	void LIR_OpJavaCall::print_instr(outputStream* out) const {
duke@435	1835	out->print("call: ");
drchase@6680	1836	out->print("[addr: " INTPTR_FORMAT "]", p2i(address()));
duke@435	1837	if (receiver()->is_valid()) {
duke@435	1838	out->print(" [recv: "); receiver()->print(out); out->print("]");
duke@435	1839	}
duke@435	1840	if (result_opr()->is_valid()) {
duke@435	1841	out->print(" [result: "); result_opr()->print(out); out->print("]");
duke@435	1842	}
duke@435	1843	}
duke@435	1844
duke@435	1845	// LIR_OpLabel
duke@435	1846	void LIR_OpLabel::print_instr(outputStream* out) const {
drchase@6680	1847	out->print("[label:" INTPTR_FORMAT "]", p2i(_label));
duke@435	1848	}
duke@435	1849
duke@435	1850	// LIR_OpArrayCopy
duke@435	1851	void LIR_OpArrayCopy::print_instr(outputStream* out) const {
duke@435	1852	src()->print(out); out->print(" ");
duke@435	1853	src_pos()->print(out); out->print(" ");
duke@435	1854	dst()->print(out); out->print(" ");
duke@435	1855	dst_pos()->print(out); out->print(" ");
duke@435	1856	length()->print(out); out->print(" ");
duke@435	1857	tmp()->print(out); out->print(" ");
duke@435	1858	}
duke@435	1859
drchase@5353	1860	// LIR_OpUpdateCRC32
drchase@5353	1861	void LIR_OpUpdateCRC32::print_instr(outputStream* out) const {
drchase@5353	1862	crc()->print(out); out->print(" ");
drchase@5353	1863	val()->print(out); out->print(" ");
drchase@5353	1864	result_opr()->print(out); out->print(" ");
drchase@5353	1865	}
drchase@5353	1866
duke@435	1867	// LIR_OpCompareAndSwap
duke@435	1868	void LIR_OpCompareAndSwap::print_instr(outputStream* out) const {
duke@435	1869	addr()->print(out); out->print(" ");
duke@435	1870	cmp_value()->print(out); out->print(" ");
duke@435	1871	new_value()->print(out); out->print(" ");
duke@435	1872	tmp1()->print(out); out->print(" ");
duke@435	1873	tmp2()->print(out); out->print(" ");
duke@435	1874
duke@435	1875	}
duke@435	1876
duke@435	1877	// LIR_Op0
duke@435	1878	void LIR_Op0::print_instr(outputStream* out) const {
duke@435	1879	result_opr()->print(out);
duke@435	1880	}
duke@435	1881
duke@435	1882	// LIR_Op1
duke@435	1883	const char * LIR_Op1::name() const {
duke@435	1884	if (code() == lir_move) {
duke@435	1885	switch (move_kind()) {
duke@435	1886	case lir_move_normal:
duke@435	1887	return "move";
duke@435	1888	case lir_move_unaligned:
duke@435	1889	return "unaligned move";
duke@435	1890	case lir_move_volatile:
duke@435	1891	return "volatile_move";
iveresov@2344	1892	case lir_move_wide:
iveresov@2344	1893	return "wide_move";
duke@435	1894	default:
duke@435	1895	ShouldNotReachHere();
duke@435	1896	return "illegal_op";
duke@435	1897	}
duke@435	1898	} else {
duke@435	1899	return LIR_Op::name();
duke@435	1900	}
duke@435	1901	}
duke@435	1902
duke@435	1903
duke@435	1904	void LIR_Op1::print_instr(outputStream* out) const {
duke@435	1905	_opr->print(out); out->print(" ");
duke@435	1906	result_opr()->print(out); out->print(" ");
duke@435	1907	print_patch_code(out, patch_code());
duke@435	1908	}
duke@435	1909
duke@435	1910
duke@435	1911	// LIR_Op1
duke@435	1912	void LIR_OpRTCall::print_instr(outputStream* out) const {
duke@435	1913	intx a = (intx)addr();
drchase@6680	1914	out->print("%s", Runtime1::name_for_address(addr()));
duke@435	1915	out->print(" ");
duke@435	1916	tmp()->print(out);
duke@435	1917	}
duke@435	1918
duke@435	1919	void LIR_Op1::print_patch_code(outputStream* out, LIR_PatchCode code) {
duke@435	1920	switch(code) {
duke@435	1921	case lir_patch_none: break;
duke@435	1922	case lir_patch_low: out->print("[patch_low]"); break;
duke@435	1923	case lir_patch_high: out->print("[patch_high]"); break;
duke@435	1924	case lir_patch_normal: out->print("[patch_normal]"); break;
duke@435	1925	default: ShouldNotReachHere();
duke@435	1926	}
duke@435	1927	}
duke@435	1928
duke@435	1929	// LIR_OpBranch
duke@435	1930	void LIR_OpBranch::print_instr(outputStream* out) const {
duke@435	1931	print_condition(out, cond()); out->print(" ");
duke@435	1932	if (block() != NULL) {
duke@435	1933	out->print("[B%d] ", block()->block_id());
duke@435	1934	} else if (stub() != NULL) {
duke@435	1935	out->print("[");
duke@435	1936	stub()->print_name(out);
drchase@6680	1937	out->print(": " INTPTR_FORMAT "]", p2i(stub()));
roland@2174	1938	if (stub()->info() != NULL) out->print(" [bci:%d]", stub()->info()->stack()->bci());
duke@435	1939	} else {
drchase@6680	1940	out->print("[label:" INTPTR_FORMAT "] ", p2i(label()));
duke@435	1941	}
duke@435	1942	if (ublock() != NULL) {
duke@435	1943	out->print("unordered: [B%d] ", ublock()->block_id());
duke@435	1944	}
duke@435	1945	}
duke@435	1946
duke@435	1947	void LIR_Op::print_condition(outputStream* out, LIR_Condition cond) {
duke@435	1948	switch(cond) {
duke@435	1949	case lir_cond_equal: out->print("[EQ]"); break;
duke@435	1950	case lir_cond_notEqual: out->print("[NE]"); break;
duke@435	1951	case lir_cond_less: out->print("[LT]"); break;
duke@435	1952	case lir_cond_lessEqual: out->print("[LE]"); break;
duke@435	1953	case lir_cond_greaterEqual: out->print("[GE]"); break;
duke@435	1954	case lir_cond_greater: out->print("[GT]"); break;
duke@435	1955	case lir_cond_belowEqual: out->print("[BE]"); break;
duke@435	1956	case lir_cond_aboveEqual: out->print("[AE]"); break;
duke@435	1957	case lir_cond_always: out->print("[AL]"); break;
duke@435	1958	default: out->print("[%d]",cond); break;
duke@435	1959	}
duke@435	1960	}
duke@435	1961
duke@435	1962	// LIR_OpConvert
duke@435	1963	void LIR_OpConvert::print_instr(outputStream* out) const {
duke@435	1964	print_bytecode(out, bytecode());
duke@435	1965	in_opr()->print(out); out->print(" ");
duke@435	1966	result_opr()->print(out); out->print(" ");
bobv@2036	1967	#ifdef PPC
bobv@2036	1968	if(tmp1()->is_valid()) {
bobv@2036	1969	tmp1()->print(out); out->print(" ");
bobv@2036	1970	tmp2()->print(out); out->print(" ");
bobv@2036	1971	}
bobv@2036	1972	#endif
duke@435	1973	}
duke@435	1974
duke@435	1975	void LIR_OpConvert::print_bytecode(outputStream* out, Bytecodes::Code code) {
duke@435	1976	switch(code) {
duke@435	1977	case Bytecodes::_d2f: out->print("[d2f] "); break;
duke@435	1978	case Bytecodes::_d2i: out->print("[d2i] "); break;
duke@435	1979	case Bytecodes::_d2l: out->print("[d2l] "); break;
duke@435	1980	case Bytecodes::_f2d: out->print("[f2d] "); break;
duke@435	1981	case Bytecodes::_f2i: out->print("[f2i] "); break;
duke@435	1982	case Bytecodes::_f2l: out->print("[f2l] "); break;
duke@435	1983	case Bytecodes::_i2b: out->print("[i2b] "); break;
duke@435	1984	case Bytecodes::_i2c: out->print("[i2c] "); break;
duke@435	1985	case Bytecodes::_i2d: out->print("[i2d] "); break;
duke@435	1986	case Bytecodes::_i2f: out->print("[i2f] "); break;
duke@435	1987	case Bytecodes::_i2l: out->print("[i2l] "); break;
duke@435	1988	case Bytecodes::_i2s: out->print("[i2s] "); break;
duke@435	1989	case Bytecodes::_l2i: out->print("[l2i] "); break;
duke@435	1990	case Bytecodes::_l2f: out->print("[l2f] "); break;
duke@435	1991	case Bytecodes::_l2d: out->print("[l2d] "); break;
duke@435	1992	default:
duke@435	1993	out->print("[?%d]",code);
duke@435	1994	break;
duke@435	1995	}
duke@435	1996	}
duke@435	1997
duke@435	1998	void LIR_OpAllocObj::print_instr(outputStream* out) const {
duke@435	1999	klass()->print(out); out->print(" ");
duke@435	2000	obj()->print(out); out->print(" ");
duke@435	2001	tmp1()->print(out); out->print(" ");
duke@435	2002	tmp2()->print(out); out->print(" ");
duke@435	2003	tmp3()->print(out); out->print(" ");
duke@435	2004	tmp4()->print(out); out->print(" ");
duke@435	2005	out->print("[hdr:%d]", header_size()); out->print(" ");
duke@435	2006	out->print("[obj:%d]", object_size()); out->print(" ");
drchase@6680	2007	out->print("[lbl:" INTPTR_FORMAT "]", p2i(stub()->entry()));
duke@435	2008	}
duke@435	2009
duke@435	2010	void LIR_OpRoundFP::print_instr(outputStream* out) const {
duke@435	2011	_opr->print(out); out->print(" ");
duke@435	2012	tmp()->print(out); out->print(" ");
duke@435	2013	result_opr()->print(out); out->print(" ");
duke@435	2014	}
duke@435	2015
duke@435	2016	// LIR_Op2
duke@435	2017	void LIR_Op2::print_instr(outputStream* out) const {
duke@435	2018	if (code() == lir_cmove) {
duke@435	2019	print_condition(out, condition()); out->print(" ");
duke@435	2020	}
duke@435	2021	in_opr1()->print(out); out->print(" ");
duke@435	2022	in_opr2()->print(out); out->print(" ");
roland@3787	2023	if (tmp1_opr()->is_valid()) { tmp1_opr()->print(out); out->print(" "); }
roland@3787	2024	if (tmp2_opr()->is_valid()) { tmp2_opr()->print(out); out->print(" "); }
roland@3787	2025	if (tmp3_opr()->is_valid()) { tmp3_opr()->print(out); out->print(" "); }
roland@3787	2026	if (tmp4_opr()->is_valid()) { tmp4_opr()->print(out); out->print(" "); }
roland@3787	2027	if (tmp5_opr()->is_valid()) { tmp5_opr()->print(out); out->print(" "); }
duke@435	2028	result_opr()->print(out);
duke@435	2029	}
duke@435	2030
duke@435	2031	void LIR_OpAllocArray::print_instr(outputStream* out) const {
duke@435	2032	klass()->print(out); out->print(" ");
duke@435	2033	len()->print(out); out->print(" ");
duke@435	2034	obj()->print(out); out->print(" ");
duke@435	2035	tmp1()->print(out); out->print(" ");
duke@435	2036	tmp2()->print(out); out->print(" ");
duke@435	2037	tmp3()->print(out); out->print(" ");
duke@435	2038	tmp4()->print(out); out->print(" ");
duke@435	2039	out->print("[type:0x%x]", type()); out->print(" ");
drchase@6680	2040	out->print("[label:" INTPTR_FORMAT "]", p2i(stub()->entry()));
duke@435	2041	}
duke@435	2042
duke@435	2043
duke@435	2044	void LIR_OpTypeCheck::print_instr(outputStream* out) const {
duke@435	2045	object()->print(out); out->print(" ");
duke@435	2046	if (code() == lir_store_check) {
duke@435	2047	array()->print(out); out->print(" ");
duke@435	2048	}
duke@435	2049	if (code() != lir_store_check) {
duke@435	2050	klass()->print_name_on(out); out->print(" ");
duke@435	2051	if (fast_check()) out->print("fast_check ");
duke@435	2052	}
duke@435	2053	tmp1()->print(out); out->print(" ");
duke@435	2054	tmp2()->print(out); out->print(" ");
duke@435	2055	tmp3()->print(out); out->print(" ");
duke@435	2056	result_opr()->print(out); out->print(" ");
roland@2174	2057	if (info_for_exception() != NULL) out->print(" [bci:%d]", info_for_exception()->stack()->bci());
duke@435	2058	}
duke@435	2059
duke@435	2060
duke@435	2061	// LIR_Op3
duke@435	2062	void LIR_Op3::print_instr(outputStream* out) const {
duke@435	2063	in_opr1()->print(out); out->print(" ");
duke@435	2064	in_opr2()->print(out); out->print(" ");
duke@435	2065	in_opr3()->print(out); out->print(" ");
duke@435	2066	result_opr()->print(out);
duke@435	2067	}
duke@435	2068
duke@435	2069
duke@435	2070	void LIR_OpLock::print_instr(outputStream* out) const {
duke@435	2071	hdr_opr()->print(out); out->print(" ");
duke@435	2072	obj_opr()->print(out); out->print(" ");
duke@435	2073	lock_opr()->print(out); out->print(" ");
duke@435	2074	if (_scratch->is_valid()) {
duke@435	2075	_scratch->print(out); out->print(" ");
duke@435	2076	}
drchase@6680	2077	out->print("[lbl:" INTPTR_FORMAT "]", p2i(stub()->entry()));
duke@435	2078	}
duke@435	2079
roland@4947	2080	#ifdef ASSERT
roland@4860	2081	void LIR_OpAssert::print_instr(outputStream* out) const {
roland@4860	2082	print_condition(out, condition()); out->print(" ");
roland@4860	2083	in_opr1()->print(out); out->print(" ");
roland@4860	2084	in_opr2()->print(out); out->print(", \"");
drchase@6680	2085	out->print("%s", msg()); out->print("\"");
roland@4860	2086	}
roland@4947	2087	#endif
roland@4860	2088
duke@435	2089
duke@435	2090	void LIR_OpDelay::print_instr(outputStream* out) const {
duke@435	2091	_op->print_on(out);
duke@435	2092	}
duke@435	2093
duke@435	2094
duke@435	2095	// LIR_OpProfileCall
duke@435	2096	void LIR_OpProfileCall::print_instr(outputStream* out) const {
duke@435	2097	profiled_method()->name()->print_symbol_on(out);
duke@435	2098	out->print(".");
duke@435	2099	profiled_method()->holder()->name()->print_symbol_on(out);
duke@435	2100	out->print(" @ %d ", profiled_bci());
duke@435	2101	mdo()->print(out); out->print(" ");
duke@435	2102	recv()->print(out); out->print(" ");
duke@435	2103	tmp1()->print(out); out->print(" ");
duke@435	2104	}
duke@435	2105
roland@5914	2106	// LIR_OpProfileType
roland@5914	2107	void LIR_OpProfileType::print_instr(outputStream* out) const {
roland@5914	2108	out->print("exact = "); exact_klass()->print_name_on(out);
roland@5914	2109	out->print("current = "); ciTypeEntries::print_ciklass(out, current_klass());
roland@5914	2110	mdp()->print(out); out->print(" ");
roland@5914	2111	obj()->print(out); out->print(" ");
roland@5914	2112	tmp()->print(out); out->print(" ");
roland@5914	2113	}
roland@5914	2114
duke@435	2115	#endif // PRODUCT
duke@435	2116
duke@435	2117	// Implementation of LIR_InsertionBuffer
duke@435	2118
duke@435	2119	void LIR_InsertionBuffer::append(int index, LIR_Op* op) {
duke@435	2120	assert(_index_and_count.length() % 2 == 0, "must have a count for each index");
duke@435	2121
duke@435	2122	int i = number_of_insertion_points() - 1;
duke@435	2123	if (i < 0 || index_at(i) < index) {
duke@435	2124	append_new(index, 1);
duke@435	2125	} else {
duke@435	2126	assert(index_at(i) == index, "can append LIR_Ops in ascending order only");
duke@435	2127	assert(count_at(i) > 0, "check");
duke@435	2128	set_count_at(i, count_at(i) + 1);
duke@435	2129	}
duke@435	2130	_ops.push(op);
duke@435	2131
duke@435	2132	DEBUG_ONLY(verify());
duke@435	2133	}
duke@435	2134
duke@435	2135	#ifdef ASSERT
duke@435	2136	void LIR_InsertionBuffer::verify() {
duke@435	2137	int sum = 0;
duke@435	2138	int prev_idx = -1;
duke@435	2139
duke@435	2140	for (int i = 0; i < number_of_insertion_points(); i++) {
duke@435	2141	assert(prev_idx < index_at(i), "index must be ordered ascending");
duke@435	2142	sum += count_at(i);
duke@435	2143	}
duke@435	2144	assert(sum == number_of_ops(), "wrong total sum");
duke@435	2145	}
duke@435	2146	#endif